diff options
Diffstat (limited to 'src/tb')
| -rw-r--r-- | src/tb/tb_keywrap.v | 97 |
1 files changed, 30 insertions, 67 deletions
diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v index ef266ab..82a827c 100644 --- a/src/tb/tb_keywrap.v +++ b/src/tb/tb_keywrap.v @@ -1292,14 +1292,14 @@ module tb_keywrap(); tc_ctr = tc_ctr + 1; // Write key and keylength, we also want to encrypt/wrap. - write_word(ADDR_KEY0, 32'h55aa55aa); - write_word(ADDR_KEY1, 32'h55aa55aa); - write_word(ADDR_KEY2, 32'h55aa55aa); - write_word(ADDR_KEY3, 32'h55aa55aa); - write_word(ADDR_KEY4, 32'h55aa55aa); - write_word(ADDR_KEY5, 32'h55aa55aa); - write_word(ADDR_KEY6, 32'h55aa55aa); - write_word(ADDR_KEY7, 32'h55aa55aa); + write_word(ADDR_KEY0, 32'haa55aa55); + write_word(ADDR_KEY1, 32'haa55aa55); + write_word(ADDR_KEY2, 32'haa55aa55); + write_word(ADDR_KEY3, 32'haa55aa55); + write_word(ADDR_KEY4, 32'haa55aa55); + write_word(ADDR_KEY5, 32'haa55aa55); + write_word(ADDR_KEY6, 32'haa55aa55); + write_word(ADDR_KEY7, 32'haa55aa55); write_word(ADDR_CONFIG, 32'h00000003); read_word(ADDR_STATUS); @@ -1418,28 +1418,15 @@ module tb_keywrap(); tc_ctr = tc_ctr + 1; // Write key and keylength, we also want to encrypt/wrap. - write_word(ADDR_KEY0, 32'h55aa55aa); - write_word(ADDR_KEY1, 32'h55aa55aa); - write_word(ADDR_KEY2, 32'h55aa55aa); - write_word(ADDR_KEY3, 32'h55aa55aa); - write_word(ADDR_KEY4, 32'h55aa55aa); - write_word(ADDR_KEY5, 32'h55aa55aa); - write_word(ADDR_KEY6, 32'h55aa55aa); - write_word(ADDR_KEY7, 32'h55aa55aa); - write_word(ADDR_CONFIG, 32'h00000003); - - read_word(ADDR_STATUS); - $display("Status register: 0x%032b", read_data); - - // Set the key timeout to 256 cycles. - write_word(ADDR_TIMEOUT, 32'hdeadbeef); - read_word(ADDR_TIMEOUT); - if (read_data != 32'hdeadbeef) - $display("Error. Timout value = 0x%04x, expected 0xdeadbeef", read_data); - - // Display contents in key expansion register 2. - $display("Contents of the key_mem[2] before init: 0x%016x", - dut.core.aes.keymem.key_mem[2]); + write_word(ADDR_KEY0, 32'h13371337); + write_word(ADDR_KEY1, 32'h13371337); + write_word(ADDR_KEY2, 32'h13371337); + write_word(ADDR_KEY3, 32'h13371337); + write_word(ADDR_KEY4, 32'h13371337); + write_word(ADDR_KEY5, 32'h13371337); + write_word(ADDR_KEY6, 32'h13371337); + write_word(ADDR_KEY7, 32'h13371337); + write_word(ADDR_CONFIG, 32'h13371337); // Initialize the AES engine (to expand the key). // Wait for init to complete. @@ -1450,53 +1437,29 @@ module tb_keywrap(); wait_ready(); $display("* Init done."); - // Display contents in key expansion register 2 again. - $display("Contents of the key_mem[2] after init: 0x%016x", - dut.core.aes.keymem.key_mem[2]); - // Check if key is loaded, according to the loaded flag. read_word(ADDR_STATUS); $display("Status register: 0b%032b", read_data); - // Display the timeout counter a few times. - $display("Contents of timeout counter: 0x%04x", - dut.core.key_timeout_ctr_reg); - #(2 * CLK_PERIOD); - $display("Contents of timeout counter: 0x%04x", - dut.core.key_timeout_ctr_reg); - #(2 * CLK_PERIOD); + // Display contents in key expansion register 2. + $display("Contents of the key_mem[2] after init: 0x%016x", + dut.core.aes.keymem.key_mem[2]); + $display("Contents of timeout counter: 0x%04x", dut.core.key_timeout_ctr_reg); - #(2 * CLK_PERIOD); + #(40 * CLK_PERIOD); $display("Contents of timeout counter: 0x%04x", dut.core.key_timeout_ctr_reg); - #(2 * CLK_PERIOD); - - read_word(ADDR_STATUS); - $display("Status register: 0x%032b", read_data); - - // Display contents in one of the key expansion registers - $display("Contents of the key_mem[2]: 0x%016x", - dut.core.aes.keymem.key_mem[2]); - // Display contents in one of the key expansion registers - $display("Contents of the key_mem[2]: 0x%016x", - dut.core.aes.keymem.key_mem[2]); - // Display contents in one of the key expansion registers - $display("Contents of the key_mem[2]: 0x%016x", - dut.core.aes.keymem.key_mem[2]); + $display("* Trigger zeroisation."); + write_word(ADDR_CTRL, 32'h00000004); #(40 * CLK_PERIOD); - - // Set the key timeout to 16 cycles. - // Read status to perform ping. - write_word(ADDR_TIMEOUT, 32'h00000010); - read_word(ADDR_STATUS); - #(400 * CLK_PERIOD); - - read_word(ADDR_STATUS); $display("Status register: 0x%032b", read_data); + // Display contents in key expansion register 2. + $display("Contents of the key_mem[2] after zeroisation: 0x%016x", + dut.core.aes.keymem.key_mem[2]); $display("** TC test_zerois3 END.\n"); end @@ -1522,19 +1485,19 @@ module tb_keywrap(); reset_dut(); dump_dut_state(); -// test_core_access(); + test_core_access(); // test_kwp_ae_128_1(); // test_kwp_ad_128_1(); // test_kwp_ae_128_2(); // test_kwp_ad_128_2(); -// test_big_wrap_256(); +// test_big_wrap_256(); reset_dut(); test_zeroise1(); test_zeroise2(); -// test_zeroise3(); + test_zeroise3(); display_test_results(); |