diff options
Diffstat (limited to 'src/tb')
| -rw-r--r-- | src/tb/tb_keywrap.v | 105 |
1 files changed, 73 insertions, 32 deletions
diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v index 04efa44..8a8344b 100644 --- a/src/tb/tb_keywrap.v +++ b/src/tb/tb_keywrap.v @@ -39,7 +39,9 @@ module tb_keywrap(); - parameter DEBUG = 0; + parameter DEBUG = 1; + parameter DUMP_TOP = 1; + parameter DUMP_CORE = 1; parameter CLK_HALF_PERIOD = 1; parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD; @@ -62,8 +64,8 @@ module tb_keywrap(); localparam CTRL_KEYLEN_BIT = 1; localparam ADDR_RLEN = 8'h0c; - localparam ADDR_A_LSB = 8'h0e; - localparam ADDR_A_MSB = 8'h0f; + localparam ADDR_A0 = 8'h0e; + localparam ADDR_A1 = 8'h0f; localparam ADDR_KEY0 = 8'h10; localparam ADDR_KEY1 = 8'h11; @@ -135,25 +137,12 @@ module tb_keywrap(); always begin : sys_monitor cycle_ctr = cycle_ctr + 1; - + if (DEBUG) + dump_dut_state(); #(CLK_PERIOD); end - //---------------------------------------------------------------- - // dump_mem() - // - // Dump the n first memory positions in the dut internal memory. - //---------------------------------------------------------------- - task dump_mem(integer n); - begin : dump_mem - integer i; - for (i = 0 ; i < n ; i = i + 2) - $display("mem0[0x%06x] = 0x%08x mem1[0x%06x] = 0x%08x", - i, dut.core.mem.mem0[i], i, dut.core.mem.mem1[i]); - end - endtask // dump_mem - //---------------------------------------------------------------- // read_word() @@ -227,6 +216,22 @@ module tb_keywrap(); //---------------------------------------------------------------- + // dump_mem() + // + // Dump the n first memory positions in the dut internal memory. + //---------------------------------------------------------------- + task dump_mem(integer n); + begin : dump_mem + integer i; + for (i = 0 ; i < n ; i = i + 2) + $display("mem0[0x%06x] = 0x%08x mem1[0x%06x] = 0x%08x", + i, dut.core.mem.mem0[i], i, dut.core.mem.mem1[i]); + $display(""); + end + endtask // dump_mem + + + //---------------------------------------------------------------- // dump_dut_state() // // Dump the state of the dump when needed. @@ -236,6 +241,28 @@ module tb_keywrap(); $display("cycle: 0x%016x", cycle_ctr); $display("State of DUT"); $display("------------"); + + if (DUMP_TOP) + begin + $display("top level state:"); + $display("init_reg = 0x%x next_reg = 0x%x", dut.init_reg, dut.next_reg); + $display("endec_reg = 0x%x keylen_reg = 0x%x", dut.encdec_reg, dut.keylen_reg); + $display("rlen_reg = 0x%06x", dut.rlen_reg); + $display("a0_reg = 0x%08x a1_reg = 0x%08x", dut.a0_reg, dut.a1_reg); + $display(""); + end + + if (DUMP_CORE) + begin + $display("core level state:"); + $display("init = 0x%0x next = 0x%0x ready = 0x%0x valid = 0x%0x", + dut.core.init, dut.core.next, dut.core.ready, dut.core.valid); + $display("key = 0x%0x", dut.core.key); + $display("a_init = 0x%0x a_result = 0x%0x", dut.core.a_init, dut.core.a_result); + $display("a_reg = 0x%0x", dut.core.a_reg); + $display("keywrap_core_ctrl_reg = 0x%0x", dut.core.keywrap_core_ctrl_reg); + end + $display(""); end endtask // dump_dut_state @@ -314,26 +341,31 @@ module tb_keywrap(); // Write key and keylength, we also want to encrypt/wrap. - write_word(ADDR_KEY3, 32'hc03db3cc); - write_word(ADDR_KEY2, 32'h1416dcd1); - write_word(ADDR_KEY1, 32'hc069a195); - write_word(ADDR_KEY0, 32'ha8d77e3d); + write_word(ADDR_KEY0, 32'hc03db3cc); + write_word(ADDR_KEY1, 32'h1416dcd1); + write_word(ADDR_KEY2, 32'hc069a195); + write_word(ADDR_KEY3, 32'ha8d77e3d); write_word(ADDR_CONFIG, 32'h00000001); - - // Write magic words to the A state regs. - // Also set the rlen. - write_word(ADDR_A_LSB, 32'h0000001f); - write_word(ADDR_A_MSB, 32'ha65959a6); - write_word(ADDR_RLEN, 32'h00000004); + $display("* State after key has been set:"); + dump_dut_state(); // Initialize the AES engine and reset counters. // Wait for init to complete. + $display("* Trying to initialize."); write_word(ADDR_CTRL, 32'h00000001); + #(2 * CLK_PERIOD); wait_ready(); + $display("* Init should be done."); + // Write magic words to the A state regs. + // Also set the rlen. + write_word(ADDR_A0, 32'ha65959a6); + write_word(ADDR_A1, 32'h0000001f); + write_word(ADDR_RLEN, 32'h00000004); + // Write the R blocks to be processed. write_word(ADDR_WRITE_DATA, 32'hcdda4200); write_word(ADDR_WRITE_DATA, 32'h46f87f58); @@ -347,19 +379,28 @@ module tb_keywrap(); write_word(ADDR_WRITE_DATA, 32'h45a28800); write_word(ADDR_WRITE_DATA, 32'h5f37a27d); + $display("* Contents of memory and dut before wrap processing:"); dump_mem(6); // Start wrapping and wait for wrap to complete. + $display("* Trying to start processing."); write_word(ADDR_CTRL, 32'h00000002); + #(2 * CLK_PERIOD); wait_ready(); + $display("* Processing should be done."); + + + $display("Contents of memory and dut after wrap processing:"); + dump_mem(6); + dump_dut_state(); // Read and display the A registers. - read_word(ADDR_A_LSB); - $display("A LSB after wrap: 0x%08x", read_data); - read_word(ADDR_A_MSB); - $display("A MSB after wrap: 0x%08x", read_data); + read_word(ADDR_A0); + $display("A0 after wrap: 0x%08x", read_data); + read_word(ADDR_A1); + $display("A1 after wrap: 0x%08x", read_data); // Read and display the R blocks that has been processed. for (i = 0 ; i < 8 ; i = i + 1) |