diff options
Diffstat (limited to 'src/tb')
| -rw-r--r-- | src/tb/tb_keywrap.v | 143 |
1 files changed, 123 insertions, 20 deletions
diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v index 88aba9b..59409e9 100644 --- a/src/tb/tb_keywrap.v +++ b/src/tb/tb_keywrap.v @@ -155,7 +155,7 @@ module tb_keywrap(); // the word read will be available in the global variable // read_data. //---------------------------------------------------------------- - task read_word(input [11 : 0] address); + task read_word(input [(ADDR_BITS - 1) : 0] address); begin tb_address = address; tb_cs = 1; @@ -179,7 +179,7 @@ module tb_keywrap(); // // Write the given word to the DUT using the DUT interface. //---------------------------------------------------------------- - task write_word(input [11 : 0] address, + task write_word(input [(ADDR_BITS - 1) : 0] address, input [31 : 0] word); begin if (DEBUG) @@ -377,9 +377,9 @@ module tb_keywrap(); $display("NAME1: %s", read_data); read_word(ADDR_VERSION); $display("version: %s", read_data); - $display(""); $display("** TC test_core_access END."); + $display(""); end endtask // test_core_access @@ -392,6 +392,10 @@ module tb_keywrap(); task test_kwp_ae_128_1; begin : kwp_ae_128_1 integer i; + integer err; + + err = 0; + tc_ctr = tc_ctr + 1; $display("** TC kwp_ae_128_1 START."); @@ -403,7 +407,6 @@ module tb_keywrap(); write_word(ADDR_KEY3, 32'ha8d77e3d); write_word(ADDR_CONFIG, 32'h00000001); - // Initialize the AES engine (to expand the key). // Wait for init to complete. // Note, not actually needed to wait. We can write R data during init. @@ -419,6 +422,8 @@ module tb_keywrap(); // Write the R blocks to be processed. write_word(ADDR_RLEN, 32'h00000004); + + // Write the data to be wrapped. write_word(MEM_BASE + 0, 32'h46f87f58); write_word(MEM_BASE + 1, 32'hcdda4200); write_word(MEM_BASE + 2, 32'hf53d99ce); @@ -433,6 +438,12 @@ module tb_keywrap(); write_word(ADDR_A1, 32'h0000001f); + $display("* Dumping state and mem after data write and A words."); + dump_dut_state(); + dump_mem(6); + + + $display("* Contents of memory and dut before wrap processing:"); dump_mem(6); @@ -449,23 +460,32 @@ module tb_keywrap(); dump_mem(6); dump_dut_state(); - - // Read and display the A registers. + // Read and check the A registers. read_word(ADDR_A0); - $display("A0 after wrap: 0x%08x", read_data); + if (read_data != 32'h57e3b669) + begin + $display("Error A0 after wrap: 0x%08x, expected 0x57e3b669", read_data); + err = 1; + end + read_word(ADDR_A1); - $display("A1 after wrap: 0x%08x", read_data); + if (read_data != 32'h9c6e8177) + begin + $display("Error A1 after wrap: 0x%08x, expected 0x9c6e8177", read_data); + err = 1; + end - // Read and display the R blocks that has been processed. - for (i = 0 ; i < 8 ; i = i + 1) + if (err) begin - read_word(ADDR_R_DATA0 + i); - $display("mem[0x%07x] = 0x%08x", i, read_data); + $display("kwp_ae_128_1 completed with errors."); + error_ctr = error_ctr + 1; end + else + $display("kwp_ae_128_1 completed successfully."); - $display("** TC kwp_ae_128_2 END.\n"); + $display("** TC kwp_ae_128_1 END.\n"); end - endtask // test_kwp_ae_128_2 + endtask // test_kwp_ae_128_1 @@ -477,6 +497,10 @@ module tb_keywrap(); task test_kwp_ad_128_1; begin : kwp_ad_128_1 integer i; + integer err; + + err = 0; + tc_ctr = tc_ctr + 1; $display("** TC kwp_ad_128_1 START."); @@ -544,10 +568,33 @@ module tb_keywrap(); // Read and display the R blocks that has been processed. for (i = 0 ; i < 8 ; i = i + 1) begin - read_word(ADDR_R_DATA0 + i); - $display("mem[0x%07x] = 0x%08x", i, read_data); + read_word(MEM_BASE + i); + $display("mem[0x%08x] = 0x%08x", i, read_data); + end + + // Read and check the A registers. + read_word(ADDR_A0); + if (read_data != 32'ha65959a6) + begin + $display("Error A0 after wrap: 0x%08x, expected 0xa65959a6", read_data); + err = 1; end + read_word(ADDR_A1); + if (read_data != 32'h0000001f) + begin + $display("Error A1 after wrap: 0x%08x, expected 0x0000001f", read_data); + err = 1; + end + + if (err) + begin + $display("kwp_ad_128_1 completed with errors."); + error_ctr = error_ctr + 1; + end + else + $display("kwp_ad_128_1 completed successfully."); + $display("** TC kwp_ad_128_1 END.\n"); end endtask // test_kwp_ad_128_1 @@ -561,6 +608,9 @@ module tb_keywrap(); task test_kwp_ae_128_2; begin : kwp_ae_128_2 integer i; + integer err; + + err = 0; tc_ctr = tc_ctr + 1; $display("** TC kwp_ae_128_2 START."); @@ -745,10 +795,33 @@ module tb_keywrap(); // Read and display the R blocks that has been processed. for (i = 0 ; i < 128 ; i = i + 1) begin - read_word(ADDR_R_DATA0 + i); - $display("mem[0x%07x] = 0x%08x", i, read_data); + read_word(MEM_BASE + i); + $display("mem[0x%08x] = 0x%08x", i, read_data); end + // Read and check the A registers. + read_word(ADDR_A0); + if (read_data != 32'haea19443) + begin + $display("Error A0 after wrap: 0x%08x, expected 0xaea19443", read_data); + err = 1; + end + + read_word(ADDR_A1); + if (read_data != 32'hd7f8ad7d) + begin + $display("Error A1 after wrap: 0x%08x, expected 0xd7f8ad7d", read_data); + err = 1; + end + + if (err) + begin + $display("kwp_ae_128_2 completed with errors."); + error_ctr = error_ctr + 1; + end + else + $display("kwp_ae_128_2 completed successfully."); + $display("** TC kwp_ae_128_2 END.\n"); end endtask // test_kwp_ae_128_2 @@ -762,6 +835,9 @@ module tb_keywrap(); task test_kwp_ad_128_2; begin : kwp_ad_128_2 integer i; + integer err; + + err = 0; tc_ctr = tc_ctr + 1; $display("** TC kwp_ad_128_2 START."); @@ -947,9 +1023,32 @@ module tb_keywrap(); // Read and display the R blocks that has been processed. for (i = 0 ; i < 128 ; i = i + 1) begin - read_word(ADDR_R_DATA0 + i); - $display("mem[0x%07x] = 0x%08x", i, read_data); + read_word(MEM_BASE + i); + $display("mem[0x%08x] = 0x%08x", i, read_data); + end + + // Read and check the A registers. + read_word(ADDR_A0); + if (read_data != 32'ha65959a6) + begin + $display("Error A0 after wrap: 0x%08x, expected 0xa65959a6", read_data); + err = 1; + end + + read_word(ADDR_A1); + if (read_data != 32'h00000200) + begin + $display("Error A1 after wrap: 0x%08x, expected 0x00000200", read_data); + err = 1; + end + + if (err) + begin + $display("kwp_ad_128_2 completed with errors."); + error_ctr = error_ctr + 1; end + else + $display("kwp_ad_128_2 completed successfully."); $display("** TC kwp_ad_128_2 END.\n"); end @@ -965,6 +1064,10 @@ module tb_keywrap(); $display(" =================================="); $display(""); + $display("Address bits: %d", ADDR_BITS); + $display("MEM_BASE: 0x%08x", MEM_BASE); + $display(""); + init_sim(); dump_dut_state(); |