diff options
Diffstat (limited to 'src/tb/tb_keywrap.v')
| -rw-r--r-- | src/tb/tb_keywrap.v | 210 |
1 files changed, 207 insertions, 3 deletions
diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v index edbbbcf..c8fb927 100644 --- a/src/tb/tb_keywrap.v +++ b/src/tb/tb_keywrap.v @@ -40,8 +40,8 @@ module tb_keywrap(); parameter DEBUG = 1; - parameter DUMP_TOP = 1; - parameter DUMP_CORE = 1; + parameter DUMP_TOP = 0; + parameter DUMP_CORE = 0; parameter CLK_HALF_PERIOD = 1; parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD; @@ -732,6 +732,209 @@ module tb_keywrap(); //---------------------------------------------------------------- + // test_kwp_ad_128_2 + // Implements wrap test based on NIST KWP_AD 128 bit key with + // 4096 bit plaintext. + //---------------------------------------------------------------- + task test_kwp_ad_128_2; + begin : kwp_ad_128_2 + integer i; + tc_ctr = tc_ctr + 1; + + $display("** TC kwp_ad_128_2 START."); + + // Write key and keylength, we also want to unwrap/decrypt. + write_word(ADDR_KEY0, 32'h6b8ba9cc); + write_word(ADDR_KEY1, 32'h9b31068b); + write_word(ADDR_KEY2, 32'ha175abfc); + write_word(ADDR_KEY3, 32'hc60c1338); + write_word(ADDR_CONFIG, 32'h00000000); + + + // Initialize the AES engine (to expand the key). + // Wait for init to complete. + $display("* Trying to initialize."); + write_word(ADDR_CTRL, 32'h00000001); + #(2 * CLK_PERIOD); + wait_ready(); + $display("* Init should be done."); + + + // Set the length or R in blocks. + // Write the R bank to be written to. + // Write the R blocks to be processed. + write_word(ADDR_RLEN, 32'h00000040); + write_word(ADDR_R_BANK, 32'h0); + + write_word(ADDR_R_DATA0 + 0, 32'h4501c1ec); + write_word(ADDR_R_DATA0 + 1, 32'hadc6b5e3); + write_word(ADDR_R_DATA0 + 2, 32'hf1c23c29); + write_word(ADDR_R_DATA0 + 3, 32'heca60890); + write_word(ADDR_R_DATA0 + 4, 32'h5f9cabdd); + write_word(ADDR_R_DATA0 + 5, 32'h46e34a55); + write_word(ADDR_R_DATA0 + 6, 32'he1f7ac83); + write_word(ADDR_R_DATA0 + 7, 32'h08e75c90); + write_word(ADDR_R_DATA0 + 8, 32'h3675982b); + write_word(ADDR_R_DATA0 + 9, 32'hda99173a); + write_word(ADDR_R_DATA0 + 10, 32'h2ba57d2c); + write_word(ADDR_R_DATA0 + 11, 32'hcf2e01a0); + write_word(ADDR_R_DATA0 + 12, 32'h2589f89d); + write_word(ADDR_R_DATA0 + 13, 32'hfd4b3c7f); + write_word(ADDR_R_DATA0 + 14, 32'hd229ec91); + write_word(ADDR_R_DATA0 + 15, 32'hc9d0c46e); + write_word(ADDR_R_DATA0 + 16, 32'ha5dee3c0); + write_word(ADDR_R_DATA0 + 17, 32'h48cd4611); + write_word(ADDR_R_DATA0 + 18, 32'hbfeadc9b); + write_word(ADDR_R_DATA0 + 19, 32'hf26daa1e); + write_word(ADDR_R_DATA0 + 20, 32'h02cb72e2); + write_word(ADDR_R_DATA0 + 21, 32'h22cf3dab); + write_word(ADDR_R_DATA0 + 22, 32'h120dd1e8); + write_word(ADDR_R_DATA0 + 23, 32'hc2dd9bd5); + write_word(ADDR_R_DATA0 + 24, 32'h8bbefa5d); + write_word(ADDR_R_DATA0 + 25, 32'h14526abd); + write_word(ADDR_R_DATA0 + 26, 32'h1e8d2170); + write_word(ADDR_R_DATA0 + 27, 32'ha6ba8283); + write_word(ADDR_R_DATA0 + 28, 32'hc243ec2f); + write_word(ADDR_R_DATA0 + 29, 32'hd5ef0703); + write_word(ADDR_R_DATA0 + 30, 32'h0b1ef5f6); + write_word(ADDR_R_DATA0 + 31, 32'h9f9620e4); + write_word(ADDR_R_DATA0 + 32, 32'hb17a3639); + write_word(ADDR_R_DATA0 + 33, 32'h34100588); + write_word(ADDR_R_DATA0 + 34, 32'h7b9ffc79); + write_word(ADDR_R_DATA0 + 35, 32'h35335947); + write_word(ADDR_R_DATA0 + 36, 32'h03e5dcae); + write_word(ADDR_R_DATA0 + 37, 32'h67bd0ce7); + write_word(ADDR_R_DATA0 + 38, 32'ha3c98ca6); + write_word(ADDR_R_DATA0 + 39, 32'h5815a4d0); + write_word(ADDR_R_DATA0 + 40, 32'h67f27e6e); + write_word(ADDR_R_DATA0 + 41, 32'h66d6636c); + write_word(ADDR_R_DATA0 + 42, 32'hebb78973); + write_word(ADDR_R_DATA0 + 43, 32'h2566a52a); + write_word(ADDR_R_DATA0 + 44, 32'hc3970e14); + write_word(ADDR_R_DATA0 + 45, 32'hc37310dc); + write_word(ADDR_R_DATA0 + 46, 32'h2fcee0e7); + write_word(ADDR_R_DATA0 + 47, 32'h39a16291); + write_word(ADDR_R_DATA0 + 48, 32'h029fd2b4); + write_word(ADDR_R_DATA0 + 49, 32'hd534e304); + write_word(ADDR_R_DATA0 + 50, 32'h45474b26); + write_word(ADDR_R_DATA0 + 51, 32'h711a8b3e); + write_word(ADDR_R_DATA0 + 52, 32'h1ee3cc88); + write_word(ADDR_R_DATA0 + 53, 32'hb09e8b17); + write_word(ADDR_R_DATA0 + 54, 32'h45b6cc0f); + write_word(ADDR_R_DATA0 + 55, 32'h067624ec); + write_word(ADDR_R_DATA0 + 56, 32'hb232db75); + write_word(ADDR_R_DATA0 + 57, 32'h0b01fe54); + write_word(ADDR_R_DATA0 + 58, 32'h57fdea77); + write_word(ADDR_R_DATA0 + 59, 32'hb251b10f); + write_word(ADDR_R_DATA0 + 60, 32'he95d3eee); + write_word(ADDR_R_DATA0 + 61, 32'hdb083bdf); + write_word(ADDR_R_DATA0 + 62, 32'h109c41db); + write_word(ADDR_R_DATA0 + 63, 32'ha26cc965); + write_word(ADDR_R_DATA0 + 64, 32'h4f787bf9); + write_word(ADDR_R_DATA0 + 65, 32'h5735ff07); + write_word(ADDR_R_DATA0 + 66, 32'h070b175c); + write_word(ADDR_R_DATA0 + 67, 32'hea8b6230); + write_word(ADDR_R_DATA0 + 68, 32'h2e6087b9); + write_word(ADDR_R_DATA0 + 69, 32'h1a041547); + write_word(ADDR_R_DATA0 + 70, 32'h46056910); + write_word(ADDR_R_DATA0 + 71, 32'h99f1a9e2); + write_word(ADDR_R_DATA0 + 72, 32'hb626c4b3); + write_word(ADDR_R_DATA0 + 73, 32'hbb7aeb8e); + write_word(ADDR_R_DATA0 + 74, 32'had9922bc); + write_word(ADDR_R_DATA0 + 75, 32'h3617cb42); + write_word(ADDR_R_DATA0 + 76, 32'h7c669b88); + write_word(ADDR_R_DATA0 + 77, 32'hbe5f98ae); + write_word(ADDR_R_DATA0 + 78, 32'ha7edb8b0); + write_word(ADDR_R_DATA0 + 79, 32'h063bec80); + write_word(ADDR_R_DATA0 + 80, 32'haf4c081f); + write_word(ADDR_R_DATA0 + 81, 32'h89778d7c); + write_word(ADDR_R_DATA0 + 82, 32'h7242ddae); + write_word(ADDR_R_DATA0 + 83, 32'h88e8d3af); + write_word(ADDR_R_DATA0 + 84, 32'hf1f80e57); + write_word(ADDR_R_DATA0 + 85, 32'h5e1aab4a); + write_word(ADDR_R_DATA0 + 86, 32'h5d115bc2); + write_word(ADDR_R_DATA0 + 87, 32'h7636fd14); + write_word(ADDR_R_DATA0 + 88, 32'hd19bc594); + write_word(ADDR_R_DATA0 + 89, 32'h33f69763); + write_word(ADDR_R_DATA0 + 90, 32'h5ecd870d); + write_word(ADDR_R_DATA0 + 91, 32'h17e7f5b0); + write_word(ADDR_R_DATA0 + 92, 32'h04dee400); + write_word(ADDR_R_DATA0 + 93, 32'h1cddc34a); + write_word(ADDR_R_DATA0 + 94, 32'hb6e377ee); + write_word(ADDR_R_DATA0 + 95, 32'hb3fb08e9); + write_word(ADDR_R_DATA0 + 96, 32'h47697076); + write_word(ADDR_R_DATA0 + 97, 32'h5105d93e); + write_word(ADDR_R_DATA0 + 98, 32'h4558fe3d); + write_word(ADDR_R_DATA0 + 99, 32'h4fc6fe05); + write_word(ADDR_R_DATA0 + 100, 32'h3aab9c6c); + write_word(ADDR_R_DATA0 + 101, 32'hf032f111); + write_word(ADDR_R_DATA0 + 102, 32'h6e70c2d6); + write_word(ADDR_R_DATA0 + 103, 32'h5f7c8cde); + write_word(ADDR_R_DATA0 + 104, 32'hb6ad63ac); + write_word(ADDR_R_DATA0 + 105, 32'h4291f93d); + write_word(ADDR_R_DATA0 + 106, 32'h467ebbb2); + write_word(ADDR_R_DATA0 + 107, 32'h9ead265c); + write_word(ADDR_R_DATA0 + 108, 32'h05ac684d); + write_word(ADDR_R_DATA0 + 109, 32'h20a6bef0); + write_word(ADDR_R_DATA0 + 110, 32'h9b71830f); + write_word(ADDR_R_DATA0 + 111, 32'h717e08bc); + write_word(ADDR_R_DATA0 + 112, 32'hb4f9d377); + write_word(ADDR_R_DATA0 + 113, 32'h3bec928f); + write_word(ADDR_R_DATA0 + 114, 32'h66eeb64d); + write_word(ADDR_R_DATA0 + 115, 32'hc451e958); + write_word(ADDR_R_DATA0 + 116, 32'he357ebbf); + write_word(ADDR_R_DATA0 + 117, 32'hef5a342d); + write_word(ADDR_R_DATA0 + 118, 32'hf28707ac); + write_word(ADDR_R_DATA0 + 119, 32'h4b8e3e8c); + write_word(ADDR_R_DATA0 + 120, 32'h854e8d69); + write_word(ADDR_R_DATA0 + 121, 32'h1cb92e87); + write_word(ADDR_R_DATA0 + 122, 32'hc0d57558); + write_word(ADDR_R_DATA0 + 123, 32'he44cd754); + write_word(ADDR_R_DATA0 + 124, 32'h424865c2); + write_word(ADDR_R_DATA0 + 125, 32'h29c9e1ab); + write_word(ADDR_R_DATA0 + 126, 32'hb28e003b); + write_word(ADDR_R_DATA0 + 127, 32'h6819400b); + + // Write magic words to A. + write_word(ADDR_A0, 32'haea19443); + write_word(ADDR_A1, 32'hd7f8ad7d); + + + $display("* Contents of memory and dut before wrap processing:"); + dump_mem(65); + + // Start wrapping and wait for wrap to complete. + $display("* Trying to start processing."); + write_word(ADDR_CTRL, 32'h00000002); + #(2 * CLK_PERIOD); + wait_ready(); + $display("* Processing should be done."); + + + $display("Contents of memory and dut after wrap processing:"); + dump_mem(65); + dump_dut_state(); + + + // Read and display the A registers. + read_word(ADDR_A0); + $display("A0 after wrap: 0x%08x", read_data); + read_word(ADDR_A1); + $display("A1 after wrap: 0x%08x", read_data); + + // Read and display the R blocks that has been processed. + for (i = 0 ; i < 128 ; i = i + 1) + begin + read_word(ADDR_R_DATA0 + i); + $display("mem[0x%07x] = 0x%08x", i, read_data); + end + + $display("** TC kwp_ad_128_2 END.\n"); + end + endtask // test_kwp_ad_128_2 + + + //---------------------------------------------------------------- // main //---------------------------------------------------------------- initial @@ -747,8 +950,9 @@ module tb_keywrap(); dump_dut_state(); // test_kwp_ae_128_1(); - test_kwp_ad_128_1(); +// test_kwp_ad_128_1(); // test_kwp_ae_128_2(); + test_kwp_ad_128_2(); display_test_results(); |