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authorJoachim StroĢˆmbergson <joachim@secworks.se>2018-06-26 14:33:33 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2018-06-26 14:33:33 +0200
commit83df274a6141b291c4ba4df97ca4b4339a5561f1 (patch)
tree9bef8e7a5dbd7c99d296581d182717c6e2c1a0a9 /toolruns/Makefile
parent36fcc28a75ed9fa6d0dc76d9ff3351ee1dd63b89 (diff)
Adding more functionality in the core. Updated Makefile to build and simulate with the AES core. Minor update to header and README. Clarified that it is RFC 5649 we are implementing.
Diffstat (limited to 'toolruns/Makefile')
-rwxr-xr-xtoolruns/Makefile27
1 files changed, 22 insertions, 5 deletions
diff --git a/toolruns/Makefile b/toolruns/Makefile
index 8682672..996e6e7 100755
--- a/toolruns/Makefile
+++ b/toolruns/Makefile
@@ -37,8 +37,14 @@
#
#===================================================================
-MEM_SRC =../src/rtl/keywrap_mem.v
-TB_MEM_SRC =../src/tb/tb_keywrap_mem.v
+AES_PATH = ../../../../core/cipher/aes/src/rtl
+AES_SRC = $(AES_PATH)/aes_core.v $(AES_PATH)/aes_decipher_block.v $(AES_PATH)/aes_encipher_block.v $(AES_PATH)/aes_inv_sbox.v $(AES_PATH)/aes_key_mem.v $(AES_PATH)/aes_sbox.v
+
+MEM_SRC = ../src/rtl/keywrap_mem.v
+TB_MEM_SRC = ../src/tb/tb_keywrap_mem.v
+
+CORE_SRC = ../src/rtl/keywrap_core.v $(AES_SRC) $(MEM_SRC)
+TB_CORE_SRC = ../src/tb/tb_keywrap_core.v
CC = iverilog
CC_FLAGS = -Wall
@@ -46,22 +52,31 @@ CC_FLAGS = -Wall
LINT = verilator
LINT_FLAGS = +1364-2001ext+ --lint-only -Wall -Wno-fatal -Wno-DECLFILENAME
-all: mem.sim
+all: core.sim mem.sim
+
+
+core.sim: $(TB_CORE_SRC) $(CORE_SRC)
+ $(CC) $(CC_FLAGS) -o core.sim $(TB_CORE_SRC) $(CORE_SRC)
mem.sim: $(TB_MEM_SRC) $(MEM_SRC)
$(CC) $(CC_FLAGS) -o mem.sim $(TB_MEM_SRC) $(MEM_SRC)
+sim-core: core.sim
+ ./core.sim
+
+
sim-mem: mem.sim
./mem.sim
-lint: $(MEM_SRC)
- $(LINT) $(LINT_FLAGS) $(MEM_SRC)
+lint: $(CORE_SRC)
+ $(LINT) $(LINT_FLAGS) $(CORE_SRC)
clean:
+ rm -f core.sim
rm -f mem.sim
@@ -70,6 +85,8 @@ help:
@echo "------------------"
@echo "all: Build all simulation targets."
@echo "lint: Lint all rtl source files."
+ @echo "core.sim: Build core simulation target."
+ @echo "sim-core: Run core simulation."
@echo "mem.sim: Build mem simulation target."
@echo "sim-mem: Run mem simulation."
@echo "clean: Delete all built files."