diff options
author | Joachim StroĢmbergson <joachim@secworks.se> | 2018-07-03 14:28:30 +0200 |
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committer | Joachim StroĢmbergson <joachim@secworks.se> | 2018-07-03 14:28:30 +0200 |
commit | 156237ce5cd113bb3bb97abb02d6c3d962033d8d (patch) | |
tree | 2cfc93685b04eccb158e8ff6d97335226174924d /src | |
parent | 558493b2791b034de0f34ec11f872ce2a5b008c4 (diff) |
Good news: The core peformcs all AES operations and stops after correct number of operations. Bad news: All values are wrong.
Diffstat (limited to 'src')
-rw-r--r-- | src/rtl/keywrap.v | 2 | ||||
-rw-r--r-- | src/rtl/keywrap_core.v | 5 | ||||
-rw-r--r-- | src/tb/tb_keywrap.v | 18 |
3 files changed, 16 insertions, 9 deletions
diff --git a/src/rtl/keywrap.v b/src/rtl/keywrap.v index edfd8c3..02a426c 100644 --- a/src/rtl/keywrap.v +++ b/src/rtl/keywrap.v @@ -266,7 +266,7 @@ module keywrap( config_we = 1'h1; if (address == ADDR_RLEN) - config_we = 1'h1; + rlen_we = 1'h1; if (address == ADDR_A0) a0_we = 1'h1; diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v index d476152..59dbacb 100644 --- a/src/rtl/keywrap_core.v +++ b/src/rtl/keywrap_core.v @@ -82,8 +82,8 @@ module keywrap_core ( localparam CTRL_NEXT_WAIT0 = 4'h6; localparam CTRL_NEXT_WAIT = 4'h7; localparam CTRL_NEXT_UPDATE = 4'h9; - localparam CTRL_NEXT_CHECK = 4'h9; - localparam CTRL_NEXT_FINALIZE = 4'ha; + localparam CTRL_NEXT_CHECK = 4'ha; + localparam CTRL_NEXT_FINALIZE = 4'hb; //---------------------------------------------------------------- @@ -489,6 +489,7 @@ module keywrap_core ( ready_we = 1'h1; valid_new = 1'h1; valid_we = 1'h1; + api_addr_ctr_rst = 1'h1; keywrap_core_ctrl_new = CTRL_IDLE; keywrap_core_ctrl_we = 1'h1; end diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v index 8a8344b..aac3656 100644 --- a/src/tb/tb_keywrap.v +++ b/src/tb/tb_keywrap.v @@ -257,10 +257,15 @@ module tb_keywrap(); $display("core level state:"); $display("init = 0x%0x next = 0x%0x ready = 0x%0x valid = 0x%0x", dut.core.init, dut.core.next, dut.core.ready, dut.core.valid); + $display("rlen = 0x%0x", dut.core.rlen); $display("key = 0x%0x", dut.core.key); $display("a_init = 0x%0x a_result = 0x%0x", dut.core.a_init, dut.core.a_result); $display("a_reg = 0x%0x", dut.core.a_reg); + $display("block_ctr_reg = 0x%0x iteration_ctr_reg = 0x%0x", + dut.core.block_ctr_reg, dut.core.iteration_ctr_reg); $display("keywrap_core_ctrl_reg = 0x%0x", dut.core.keywrap_core_ctrl_reg); + $display("keywrap_core_ctrl_new = 0x%0x", dut.core.keywrap_core_ctrl_new); + $display("keywrap_core_ctrl_we = 0x%0x", dut.core.keywrap_core_ctrl_we); end $display(""); @@ -360,12 +365,6 @@ module tb_keywrap(); $display("* Init should be done."); - // Write magic words to the A state regs. - // Also set the rlen. - write_word(ADDR_A0, 32'ha65959a6); - write_word(ADDR_A1, 32'h0000001f); - write_word(ADDR_RLEN, 32'h00000004); - // Write the R blocks to be processed. write_word(ADDR_WRITE_DATA, 32'hcdda4200); write_word(ADDR_WRITE_DATA, 32'h46f87f58); @@ -379,6 +378,13 @@ module tb_keywrap(); write_word(ADDR_WRITE_DATA, 32'h45a28800); write_word(ADDR_WRITE_DATA, 32'h5f37a27d); + // Write magic words to the A state regs. + // Also set the rlen. + write_word(ADDR_A0, 32'ha65959a6); + write_word(ADDR_A1, 32'h0000001f); + write_word(ADDR_RLEN, 32'h00000004); + + $display("* Contents of memory and dut before wrap processing:"); dump_mem(6); |