diff options
author | Joachim StroĢmbergson <joachim@secworks.se> | 2018-07-03 09:10:31 +0200 |
---|---|---|
committer | Joachim StroĢmbergson <joachim@secworks.se> | 2018-07-03 09:10:31 +0200 |
commit | bdc6e6712f23e0457912b7bc0f226f9aed8d5ffc (patch) | |
tree | 681ed62e434cebabd4f90cf552cc23af7c8a0df1 /src/tb | |
parent | 1b89da82a35bbe8fbd40de84d3d62d52c8a84745 (diff) |
Added first tasks to test api write and core read. Everything works as expected.
Diffstat (limited to 'src/tb')
-rw-r--r-- | src/tb/tb_keywrap_mem.v | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/src/tb/tb_keywrap_mem.v b/src/tb/tb_keywrap_mem.v index 6e4a056..726e638 100644 --- a/src/tb/tb_keywrap_mem.v +++ b/src/tb/tb_keywrap_mem.v @@ -45,6 +45,9 @@ module tb_keywrap_mem(); parameter CLK_HALF_PERIOD = 1; parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD; + parameter API_ADDR_MAX = 2**14 - 1; + parameter CORE_ADDR_MAX = 2**13 - 1; + //---------------------------------------------------------------- // Variables, regs and wires. @@ -116,10 +119,60 @@ module tb_keywrap_mem(); begin cycle_ctr = 0; tb_clk = 0; + + tb_api_we = 0; + tb_api_addr = 14'h0; + tb_api_wr_data = 32'h0; + tb_core_we = 0; + tb_core_addr = 13'h0; + tb_core_wr_data = 64'h0; + + #(CLK_PERIOD); end endtask // init_sim + + //---------------------------------------------------------------- + // dump_mem; + //---------------------------------------------------------------- + task dump_mem; + begin : dump_mem + + reg [12 : 0] addr_ctr; + + for (addr_ctr = 0 ; addr_ctr < CORE_ADDR_MAX ; addr_ctr = addr_ctr + 1) + begin + tb_core_addr = addr_ctr; + #(CLK_PERIOD); + $display("core_mem [0x%04x] = 0x%016x", addr_ctr, tb_core_rd_data); + end + end + endtask // dump_mem + + + //---------------------------------------------------------------- + // test_api_write; + //---------------------------------------------------------------- + task test_api_write; + begin : test_api_write + reg [13 : 0] addr_ctr; + + for (addr_ctr = 0 ; addr_ctr < API_ADDR_MAX ; addr_ctr = addr_ctr + 1) + begin + tb_api_we = 1; + tb_api_addr = addr_ctr; + tb_api_wr_data = {2'h0, addr_ctr, 2'h0, addr_ctr}; + #(CLK_PERIOD); + tb_api_we = 0; + end + + #(CLK_PERIOD); + dump_mem(); + end + endtask // api_write + + //---------------------------------------------------------------- // main //---------------------------------------------------------------- @@ -130,6 +183,7 @@ module tb_keywrap_mem(); $display(""); init_sim(); + test_api_write(); $display(""); $display("*** Keywrap memory simulation done. ***"); |