diff options
author | Joachim StroĢmbergson <joachim@secworks.se> | 2018-06-26 14:33:33 +0200 |
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committer | Joachim StroĢmbergson <joachim@secworks.se> | 2018-06-26 14:33:33 +0200 |
commit | 83df274a6141b291c4ba4df97ca4b4339a5561f1 (patch) | |
tree | 9bef8e7a5dbd7c99d296581d182717c6e2c1a0a9 /src/tb | |
parent | 36fcc28a75ed9fa6d0dc76d9ff3351ee1dd63b89 (diff) |
Adding more functionality in the core. Updated Makefile to build and simulate with the AES core. Minor update to header and README. Clarified that it is RFC 5649 we are implementing.
Diffstat (limited to 'src/tb')
-rw-r--r-- | src/tb/tb_keywrap_core.v | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/src/tb/tb_keywrap_core.v b/src/tb/tb_keywrap_core.v new file mode 100644 index 0000000..875240c --- /dev/null +++ b/src/tb/tb_keywrap_core.v @@ -0,0 +1,100 @@ +//====================================================================== +// +// tb_keywrap_mem.v +// ---------------- +// Testbench for the keywrap core. +// +// +// Author: Joachim Strombergson +// Copyright (c) 2018, NORDUnet A/S +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are +// met: +// - Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// - Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// - Neither the name of the NORDUnet nor the names of its contributors may +// be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS +// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +//====================================================================== + +module tb_keywrap_core(); + + parameter CLK_HALF_PERIOD = 1; + parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD; + + integer cycle_ctr; + reg tb_sys_clk; + reg tb_reset_n; + + + //---------------------------------------------------------------- + // clk_gen + // + // Always running clock generator process. + //---------------------------------------------------------------- + always + begin : clk_gen + #CLK_HALF_PERIOD; + tb_sys_clk = !tb_sys_clk; + end // clk_gen + + + //---------------------------------------------------------------- + // sys_monitor() + // + // An always running process that creates a cycle counter and + // conditionally displays information about the DUT. + //---------------------------------------------------------------- + always + begin : sys_monitor + cycle_ctr = cycle_ctr + 1; + + #(CLK_PERIOD); + end + + + //---------------------------------------------------------------- + // init_sim() + // + // Initialize all counters and testbed functionality as well + // as setting the DUT inputs to defined values. + //---------------------------------------------------------------- + initial + begin + cycle_ctr = 0; + tb_sys_clk = 0; + tb_reset_n = 0; + + #(CLK_PERIOD * 10); + + tb_reset_n = 1; + + #(CLK_PERIOD * 10); + $finish; + end + +endmodule // tb_keywrap_core + +//====================================================================== +// EOF tb_keywrap_core.v +//====================================================================== |