Removed the streaming interface in favor of a normal address based interface. A bit more kludgy, esp since we need to use bank switching to be able to provide enough address space. But this removes a possible problem of the streaming address counter running wild.

1 files changed, 21 insertions, 21 deletions

diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v
index 32526db..6b553ab 100644
--- a/src/tb/tb_keywrap.v
+++ b/src/tb/tb_keywrap.v
@@ -64,6 +64,7 @@ module tb_keywrap();
   localparam CTRL_KEYLEN_BIT  = 1;
 
   localparam ADDR_RLEN        = 8'h0c;
+  localparam ADDR_R_BANK      = 8'h0d;
   localparam ADDR_A0          = 8'h0e;
   localparam ADDR_A1          = 8'h0f;
 
@@ -76,9 +77,8 @@ module tb_keywrap();
   localparam ADDR_KEY6        = 8'h16;
   localparam ADDR_KEY7        = 8'h17;
 
-  localparam ADDR_WRITE_DATA  = 8'h20;
-
-  localparam ADDR_READ_DATA   = 8'h30;
+  localparam ADDR_R_DATA0     = 8'h80;
+  localparam ADDR_R_DATA127   = 8'hff;
 
 
   //----------------------------------------------------------------
@@ -356,7 +356,6 @@ module tb_keywrap();
 
       $display("** TC kwp_ae_128_4 START.");
 
-
       // Write key and keylength, we also want to encrypt/wrap.
       write_word(ADDR_KEY0,   32'hc03db3cc);
       write_word(ADDR_KEY1,   32'h1416dcd1);
@@ -368,8 +367,9 @@ module tb_keywrap();
       dump_dut_state();
 
 
-      // Initialize the AES engine and reset counters.
+      // Initialize the AES engine (to expand the key).
       // Wait for init to complete.
+      // Note, not actually needed to wait. We can write R data during init.
       $display("* Trying to initialize.");
       write_word(ADDR_CTRL, 32'h00000001);
       #(2 * CLK_PERIOD);
@@ -377,24 +377,24 @@ module tb_keywrap();
       $display("* Init should be done.");
 
 
+      // Set the length or R in blocks.
+      // Write the R bank to be written to.
       // Write the R blocks to be processed.
-      write_word(ADDR_WRITE_DATA, 32'h46f87f58);
-      write_word(ADDR_WRITE_DATA, 32'hcdda4200);
-
-      write_word(ADDR_WRITE_DATA, 32'hf53d99ce);
-      write_word(ADDR_WRITE_DATA, 32'h2e49bdb7);
-
-      write_word(ADDR_WRITE_DATA, 32'h6212511f);
-      write_word(ADDR_WRITE_DATA, 32'he0cd4d0b);
-
-      write_word(ADDR_WRITE_DATA, 32'h5f37a27d);
-      write_word(ADDR_WRITE_DATA, 32'h45a28800);
-
-      // Write magic words to the A state regs.
-      // Also set the rlen.
+      write_word(ADDR_RLEN,  32'h00000004);
+      write_word(ADDR_R_BANK, 32'h0);
+
+      write_word(ADDR_R_DATA0 + 0, 32'h46f87f58);
+      write_word(ADDR_R_DATA0 + 1, 32'hcdda4200);
+      write_word(ADDR_R_DATA0 + 2, 32'hf53d99ce);
+      write_word(ADDR_R_DATA0 + 3, 32'h2e49bdb7);
+      write_word(ADDR_R_DATA0 + 4, 32'h6212511f);
+      write_word(ADDR_R_DATA0 + 5, 32'he0cd4d0b);
+      write_word(ADDR_R_DATA0 + 6, 32'h5f37a27d);
+      write_word(ADDR_R_DATA0 + 7, 32'h45a28800);
+
+      // Write magic words to A.
       write_word(ADDR_A0, 32'ha65959a6);
       write_word(ADDR_A1, 32'h0000001f);
-      write_word(ADDR_RLEN,  32'h00000004);
 
 
       $display("* Contents of memory and dut before wrap processing:");
@@ -423,7 +423,7 @@ module tb_keywrap();
       // Read and display the R blocks that has been processed.
       for (i = 0 ; i < 8 ; i = i + 1)
         begin
-          read_word(ADDR_READ_DATA);
+          read_word(ADDR_R_DATA0 + i);
           $display("mem[0x%07x] = 0x%08x", i, read_data);
         end