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author | Joachim StroĢmbergson <joachim@secworks.se> | 2018-09-18 09:54:20 +0200 |
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committer | Joachim StroĢmbergson <joachim@secworks.se> | 2018-09-18 09:54:20 +0200 |
commit | 00fd27b23e578f5c92d856951645805be5dbab1a (patch) | |
tree | 09e41a1a36dc06fb0e27a0e00b80ec36b5bddbb6 /src/rtl/keywrap_core.v | |
parent | f20979faa37d4f272fcce51af18b829027778614 (diff) |
Moved the mkmif instance into the core itself. Added API to read the key if DEBUG is set.
Diffstat (limited to 'src/rtl/keywrap_core.v')
-rw-r--r-- | src/rtl/keywrap_core.v | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v index d1e63b0..e9a7177 100644 --- a/src/rtl/keywrap_core.v +++ b/src/rtl/keywrap_core.v @@ -45,6 +45,11 @@ module keywrap_core #(parameter MEM_BITS = 11) input wire clk, input wire reset_n, + output wire mkm_spi_sclk, + output wire mkm_spi_cs_n, + input wire mkm_spi_do, + output wire mkm_spi_di, + input wire init, input wire next, input wire encdec, @@ -56,6 +61,7 @@ module keywrap_core #(parameter MEM_BITS = 11) input wire [255 : 0] key, input wire keylen, + output wire [255 : 0] read_key, input wire [63 : 0] a_init, output wire [63 : 0] a_result, @@ -84,6 +90,9 @@ module keywrap_core #(parameter MEM_BITS = 11) localparam CTRL_NEXT_UCHECK = 4'h9; localparam CTRL_NEXT_FINALIZE = 4'ha; + // If set to one, will allow read access to key memory. + localparam DEBUG_MKM_READ = 1'h1; + //---------------------------------------------------------------- // Registers and memories including control signals. @@ -139,6 +148,12 @@ module keywrap_core #(parameter MEM_BITS = 11) reg [63 : 0] core_wr_data; wire [63 : 0] core_rd_data; + reg mkm_cs; + reg mkm_we; + reg [7 : 0] mkm_address; + reg [31 : 0] mkm_write_data; + wire [31 : 0] mkm_read_data; + //---------------------------------------------------------------- // Instantiations. @@ -178,6 +193,23 @@ module keywrap_core #(parameter MEM_BITS = 11) ); + mkmif mkm( + .clk(clk), + .reset_n(reset_n), + + .spi_sclk(mkm_spi_sclk), + .spi_cs_n(mkm_spi_cs_n), + .spi_do(mkm_spi_do), + .spi_di(mkm_spi_di), + + .cs(mkm_cs), + .we(mkm_we), + .address(mkm_address), + .write_data(mkm_write_data), + .read_data(mkm_read_data) + ); + + //---------------------------------------------------------------- // Assignments for ports. //---------------------------------------------------------------- @@ -356,6 +388,10 @@ module keywrap_core #(parameter MEM_BITS = 11) iteration_ctr_dec = 1'h0; iteration_ctr_set = 1'h0; iteration_ctr_rst = 1'h0; + mkm_cs = 1'h0; + mkm_we = 1'h0; + mkm_address = 8'h0; + mkm_write_data = 32'h0; keywrap_core_ctrl_new = CTRL_IDLE; keywrap_core_ctrl_we = 1'h0; |