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authorJoachim StroĢˆmbergson <joachim@secworks.se>2018-09-25 15:08:30 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2018-09-25 15:08:30 +0200
commitaa31953d8789a7349970809955ee3a2f0ab78177 (patch)
treee3da96ab02a7c9c052a0492eae97d2c1664cf935 /src/rtl/keywrap.v
parentd3e94a0efeec9b2cbac41eea9a57dc3eaf848b21 (diff)
Added logic to perform status word read operation from the mkm. Adding interfaces and registers to be able to pass mkm status to host. Updated dut instantiation in core testbench to.
Diffstat (limited to 'src/rtl/keywrap.v')
-rw-r--r--src/rtl/keywrap.v12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/rtl/keywrap.v b/src/rtl/keywrap.v
index 829ddd1..cc6f8ac 100644
--- a/src/rtl/keywrap.v
+++ b/src/rtl/keywrap.v
@@ -152,6 +152,9 @@ module keywrap #(parameter ADDR_BITS = 13)
reg [31 : 0] key_reg [0 : 7];
reg key_we;
+ reg [31 : 0] mstatus_reg;
+ reg mstatus_we;
+
reg [31 : 0] api_rd_delay_reg;
reg [31 : 0] api_rd_delay_new;
@@ -218,6 +221,7 @@ module keywrap #(parameter ADDR_BITS = 13)
.key(core_key),
.keylen(keylen_reg),
+ .status(mstatus_reg),
.mkey(core_mkey),
.mstatus(core_mstatus),
@@ -250,6 +254,7 @@ module keywrap #(parameter ADDR_BITS = 13)
mkey_mstatus_reg <= 1'h0;
encdec_reg <= 1'h0;
keylen_reg <= 1'h0;
+ mstatus_reg <= 32'h0;
rlen_reg <= {RLEN_BITS{1'h0}};
valid_reg <= 1'h0;
ready_reg <= 1'h0;
@@ -284,6 +289,9 @@ module keywrap #(parameter ADDR_BITS = 13)
if (a1_we)
a1_reg <= write_data;
+ if (mstatus_we)
+ mstatus_reg <= write_data;
+
if (key_we)
key_reg[address[2 : 0]] <= write_data;
end
@@ -307,6 +315,7 @@ module keywrap #(parameter ADDR_BITS = 13)
core_api_we = 1'h0;
a0_we = 1'h0;
a1_we = 1'h0;
+ mstatus_we = 1'h0;
tmp_read_data = 32'h0;
tmp_error = 1'h0;
api_rd_delay_new = 32'h0;
@@ -342,6 +351,9 @@ module keywrap #(parameter ADDR_BITS = 13)
if (address == {{PAD{1'h0}}, ADDR_A1})
a1_we = 1'h1;
+ if (address == {{PAD{1'h0}}, ADDR_MSTATUS})
+ mstatus_we = 1'h1;
+
if ((address >= {{PAD{1'h0}}, ADDR_KEY0}) &&
(address <= {{PAD{1'h0}}, ADDR_KEY7}))
key_we = 1'h1;