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authorJoachim StroĢˆmbergson <joachim@secworks.se>2018-09-18 14:44:39 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2018-09-18 14:44:39 +0200
commit0c7becd454c9daf400eaff51978e7a27ed88f6c6 (patch)
treeae5e5d189bc797377d2b9d2595e8524d537c2acb
parentaefd88d9fbc525e4d3dc56b9e01e5ff21f9c1ff2 (diff)
Adding more functionality needed for the mkm integration.
-rw-r--r--src/rtl/keywrap_core.v33
1 files changed, 33 insertions, 0 deletions
diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v
index c517757..9ae1e75 100644
--- a/src/rtl/keywrap_core.v
+++ b/src/rtl/keywrap_core.v
@@ -96,6 +96,21 @@ module keywrap_core #(parameter MEM_BITS = 11)
localparam CTRL_WRITE_START = 5'h18;
localparam CTRL_WRITE_END = 5'h19;
+ // API for mkm used by the core.
+ localparam MKM_ADDR_CTRL = 8'h08;
+ localparam MKM_CTRL_READ_BIT = 0;
+ localparam MKM_CTRL_WRITE_BIT = 1;
+ localparam MKM_ADDR_STATUS = 8'h09;
+ localparam MKM_STATUS_READY_BIT = 0;
+ localparam MKM_STATUS_VALID_BIT = 1;
+ localparam MKM_ADDR_SCLK_DIV = 8'h0a;
+ localparam MKM_ADDR_EMEM_ADDR = 8'h10;
+ localparam MKM_ADDR_EMEM_DATA = 8'h20;
+
+ // Addresses for storage in the mkm
+ localparam MKM_STATUS_WORD = 8'h00;
+ localparam MKM_KEY_BASE_WORD = 8'h04;
+
//----------------------------------------------------------------
// Registers and memories including control signals.
@@ -129,6 +144,17 @@ module keywrap_core #(parameter MEM_BITS = 11)
reg iteration_ctr_set;
reg iteration_ctr_rst;
+ reg [31 : 0] core_key [0 : 7];
+ reg core_key_we;
+
+ reg [2 : 0] mkm_word_ctr_reg;
+ reg [2 : 0] mkm_word_ctr_new;
+ reg mkm_word_ctr_we;
+
+ reg [7 : 0] mkm_addr_reg;
+ reg [7 : 0] mkm_addr_new;
+ reg mkm_addr_we;
+
reg [4 : 0] keywrap_core_ctrl_reg;
reg [4 : 0] keywrap_core_ctrl_new;
reg keywrap_core_ctrl_we;
@@ -226,13 +252,20 @@ module keywrap_core #(parameter MEM_BITS = 11)
//----------------------------------------------------------------
always @ (posedge clk or negedge reset_n)
begin: reg_update
+ integer i;
+
if (!reset_n)
begin
+ for (i = 0 ; i < 8 ; i = i + 1)
+ core_key[i] <= 32'h0;
+
a_reg <= 64'h0;
ready_reg <= 1'h1;
valid_reg <= 1'h1;
block_ctr_reg <= {(MEM_BITS - 1){1'h0}};
iteration_ctr_reg <= 3'h0;
+ mkm_word_ctr_reg <= 3'h0;
+ mkm_addr_reg <= 8'h0;
keywrap_core_ctrl_reg <= CTRL_IDLE;
end