Debugged a lot of minor errors and added a lot of debug functions. Things are starting to work. As in AES is actually initialized and used.

3 files changed, 103 insertions, 49 deletions

diff --git a/src/rtl/keywrap.v b/src/rtl/keywrap.v
index 54bc547..edfd8c3 100644
--- a/src/rtl/keywrap.v
+++ b/src/rtl/keywrap.v
@@ -74,8 +74,8 @@ module keywrap(
   localparam CTRL_KEYLEN_BIT  = 1;
 
   localparam ADDR_RLEN        = 8'h0c;
-  localparam ADDR_A_LSB       = 8'h0e;
-  localparam ADDR_A_MSB       = 8'h0f;
+  localparam ADDR_A0          = 8'h0e;
+  localparam ADDR_A1          = 8'h0f;
 
   localparam ADDR_KEY0        = 8'h10;
   localparam ADDR_KEY7        = 8'h17;
@@ -133,6 +133,7 @@ module keywrap(
   wire           core_ready;
   wire           core_valid;
   wire [255 : 0] core_key;
+  wire [63 : 0]  core_a;
   wire [31 : 0]  core_api_rd_data;
   wire [63 : 0]  core_a_result;
 
@@ -146,6 +147,8 @@ module keywrap(
   assign core_key = {key_reg[0], key_reg[1], key_reg[2], key_reg[3],
                      key_reg[4], key_reg[5], key_reg[6], key_reg[7]};
 
+  assign core_a   = {a0_reg, a1_reg};
+
 
   //----------------------------------------------------------------
   // core instantiation.
@@ -166,7 +169,7 @@ module keywrap(
                     .key(core_key),
                     .keylen(keylen_reg),
 
-                    .a_init({a1_reg, a0_reg}),
+                    .a_init(core_a),
                     .a_result(core_a_result),
 
                     .api_cs(api_cs_reg),
@@ -244,8 +247,8 @@ module keywrap(
       key_we        = 1'h0;
       api_cs_new    = 1'h0;
       api_we_new    = 1'h0;
-      a0_we         = 1'h1;
-      a1_we         = 1'h1;
+      a0_we         = 1'h0;
+      a1_we         = 1'h0;
       tmp_read_data = 32'h0;
       tmp_error     = 1'h0;
 
@@ -265,10 +268,10 @@ module keywrap(
               if (address == ADDR_RLEN)
                 config_we = 1'h1;
 
-              if (address == ADDR_A_LSB)
+              if (address == ADDR_A0)
                 a0_we = 1'h1;
 
-              if (address == ADDR_A_MSB)
+              if (address == ADDR_A1)
                 a1_we = 1'h1;
 
               if ((address >= ADDR_KEY0) && (address <= ADDR_KEY7))
@@ -295,12 +298,12 @@ module keywrap(
                   end
               endcase // case (address)
 
-              if (address == ADDR_A_LSB)
-                tmp_read_data = core_a_result[31 : 0];
-
-              if (address == ADDR_A_MSB)
+              if (address == ADDR_A0)
                 tmp_read_data = core_a_result[63 : 32];
 
+              if (address == ADDR_A1)
+                tmp_read_data = core_a_result[31 : 0];
+
               if (address == ADDR_READ_DATA)
                 begin
                   api_cs_new    = 1'h1;
diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v
index aa6f0df..d476152 100644
--- a/src/rtl/keywrap_core.v
+++ b/src/rtl/keywrap_core.v
@@ -79,10 +79,11 @@ module keywrap_core (
 
   localparam CTRL_NEXT_START    = 4'h4;
   localparam CTRL_NEXT_LOOP     = 4'h5;
-  localparam CTRL_NEXT_WAIT     = 4'h6;
-  localparam CTRL_NEXT_UPDATE   = 4'h7;
-  localparam CTRL_NEXT_CHECK    = 4'h8;
-  localparam CTRL_NEXT_FINALIZE = 4'h9;
+  localparam CTRL_NEXT_WAIT0    = 4'h6;
+  localparam CTRL_NEXT_WAIT     = 4'h7;
+  localparam CTRL_NEXT_UPDATE   = 4'h9;
+  localparam CTRL_NEXT_CHECK    = 4'h9;
+  localparam CTRL_NEXT_FINALIZE = 4'ha;
 
 
   //----------------------------------------------------------------
@@ -195,8 +196,8 @@ module keywrap_core (
       if (!reset_n)
         begin
           a_reg                 <= 64'h0;
-          ready_reg             <= 1'h0;
-          valid_reg             <= 1'h0;
+          ready_reg             <= 1'h1;
+          valid_reg             <= 1'h1;
           api_addr_ctr_reg      <= 14'h0;
           block_ctr_reg         <= 13'h0;
           iteration_ctr_reg     <= 3'h0;
@@ -386,6 +387,8 @@ module keywrap_core (
               begin
                 ready_new             = 1'h0;
                 ready_we              = 1'h1;
+                valid_new             = 1'h0;
+                valid_we              = 1'h1;
                 keywrap_core_ctrl_new = CTRL_NEXT_START;
                 keywrap_core_ctrl_we  = 1'h1;
               end
@@ -430,6 +433,13 @@ module keywrap_core (
           end
 
 
+        CTRL_NEXT_WAIT0:
+          begin
+            keywrap_core_ctrl_new = CTRL_NEXT_WAIT;
+            keywrap_core_ctrl_we  = 1'h1;
+          end
+
+
         CTRL_NEXT_WAIT:
           begin
             if (aes_ready)
diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v
index 04efa44..8a8344b 100644
--- a/src/tb/tb_keywrap.v
+++ b/src/tb/tb_keywrap.v
@@ -39,7 +39,9 @@
 
 module tb_keywrap();
 
-  parameter DEBUG     = 0;
+  parameter DEBUG     = 1;
+  parameter DUMP_TOP  = 1;
+  parameter DUMP_CORE = 1;
 
   parameter CLK_HALF_PERIOD = 1;
   parameter CLK_PERIOD      = 2 * CLK_HALF_PERIOD;
@@ -62,8 +64,8 @@ module tb_keywrap();
   localparam CTRL_KEYLEN_BIT  = 1;
 
   localparam ADDR_RLEN        = 8'h0c;
-  localparam ADDR_A_LSB       = 8'h0e;
-  localparam ADDR_A_MSB       = 8'h0f;
+  localparam ADDR_A0          = 8'h0e;
+  localparam ADDR_A1          = 8'h0f;
 
   localparam ADDR_KEY0        = 8'h10;
   localparam ADDR_KEY1        = 8'h11;
@@ -135,25 +137,12 @@ module tb_keywrap();
   always
     begin : sys_monitor
       cycle_ctr = cycle_ctr + 1;
-
+      if (DEBUG)
+        dump_dut_state();
       #(CLK_PERIOD);
     end
 
 
-  //----------------------------------------------------------------
-  // dump_mem()
-  //
-  // Dump the n first memory positions in the dut internal memory.
-  //----------------------------------------------------------------
-  task dump_mem(integer n);
-    begin : dump_mem
-      integer i;
-      for (i  = 0 ; i < n ; i = i + 2)
-        $display("mem0[0x%06x] = 0x%08x  mem1[0x%06x] = 0x%08x",
-                 i, dut.core.mem.mem0[i], i, dut.core.mem.mem1[i]);
-    end
-  endtask // dump_mem
-
 
   //----------------------------------------------------------------
   // read_word()
@@ -227,6 +216,22 @@ module tb_keywrap();
 
 
   //----------------------------------------------------------------
+  // dump_mem()
+  //
+  // Dump the n first memory positions in the dut internal memory.
+  //----------------------------------------------------------------
+  task dump_mem(integer n);
+    begin : dump_mem
+      integer i;
+      for (i  = 0 ; i < n ; i = i + 2)
+        $display("mem0[0x%06x] = 0x%08x  mem1[0x%06x] = 0x%08x",
+                 i, dut.core.mem.mem0[i], i, dut.core.mem.mem1[i]);
+      $display("");
+    end
+  endtask // dump_mem
+
+
+  //----------------------------------------------------------------
   // dump_dut_state()
   //
   // Dump the state of the dump when needed.
@@ -236,6 +241,28 @@ module tb_keywrap();
       $display("cycle: 0x%016x", cycle_ctr);
       $display("State of DUT");
       $display("------------");
+
+      if (DUMP_TOP)
+        begin
+          $display("top level state:");
+          $display("init_reg  = 0x%x next_reg   = 0x%x", dut.init_reg, dut.next_reg);
+          $display("endec_reg = 0x%x keylen_reg = 0x%x", dut.encdec_reg, dut.keylen_reg);
+          $display("rlen_reg  = 0x%06x", dut.rlen_reg);
+          $display("a0_reg    = 0x%08x  a1_reg  = 0x%08x", dut.a0_reg, dut.a1_reg);
+          $display("");
+        end
+
+      if (DUMP_CORE)
+        begin
+          $display("core level state:");
+          $display("init   = 0x%0x  next = 0x%0x  ready = 0x%0x  valid = 0x%0x",
+                   dut.core.init, dut.core.next, dut.core.ready, dut.core.valid);
+          $display("key    = 0x%0x", dut.core.key);
+          $display("a_init = 0x%0x  a_result = 0x%0x", dut.core.a_init, dut.core.a_result);
+          $display("a_reg  = 0x%0x", dut.core.a_reg);
+          $display("keywrap_core_ctrl_reg = 0x%0x", dut.core.keywrap_core_ctrl_reg);
+        end
+
       $display("");
     end
   endtask // dump_dut_state
@@ -314,26 +341,31 @@ module tb_keywrap();
 
 
       // Write key and keylength, we also want to encrypt/wrap.
-      write_word(ADDR_KEY3,   32'hc03db3cc);
-      write_word(ADDR_KEY2,   32'h1416dcd1);
-      write_word(ADDR_KEY1,   32'hc069a195);
-      write_word(ADDR_KEY0,   32'ha8d77e3d);
+      write_word(ADDR_KEY0,   32'hc03db3cc);
+      write_word(ADDR_KEY1,   32'h1416dcd1);
+      write_word(ADDR_KEY2,   32'hc069a195);
+      write_word(ADDR_KEY3,   32'ha8d77e3d);
       write_word(ADDR_CONFIG, 32'h00000001);
 
-
-      // Write magic words to the A state regs.
-      // Also set the rlen.
-      write_word(ADDR_A_LSB, 32'h0000001f);
-      write_word(ADDR_A_MSB, 32'ha65959a6);
-      write_word(ADDR_RLEN,  32'h00000004);
+      $display("* State after key has been set:");
+      dump_dut_state();
 
 
       // Initialize the AES engine and reset counters.
       // Wait for init to complete.
+      $display("* Trying to initialize.");
       write_word(ADDR_CTRL, 32'h00000001);
+      #(2 * CLK_PERIOD);
       wait_ready();
+      $display("* Init should be done.");
 
 
+      // Write magic words to the A state regs.
+      // Also set the rlen.
+      write_word(ADDR_A0, 32'ha65959a6);
+      write_word(ADDR_A1, 32'h0000001f);
+      write_word(ADDR_RLEN,  32'h00000004);
+
       // Write the R blocks to be processed.
       write_word(ADDR_WRITE_DATA, 32'hcdda4200);
       write_word(ADDR_WRITE_DATA, 32'h46f87f58);
@@ -347,19 +379,28 @@ module tb_keywrap();
       write_word(ADDR_WRITE_DATA, 32'h45a28800);
       write_word(ADDR_WRITE_DATA, 32'h5f37a27d);
 
+      $display("* Contents of memory and dut before wrap processing:");
       dump_mem(6);
 
 
       // Start wrapping and wait for wrap to complete.
+      $display("* Trying to start processing.");
       write_word(ADDR_CTRL, 32'h00000002);
+      #(2 * CLK_PERIOD);
       wait_ready();
+      $display("* Processing should be done.");
+
+
+      $display("Contents of memory and dut after wrap processing:");
+      dump_mem(6);
+      dump_dut_state();
 
 
       // Read and display the A registers.
-      read_word(ADDR_A_LSB);
-      $display("A LSB after wrap: 0x%08x", read_data);
-      read_word(ADDR_A_MSB);
-      $display("A MSB after wrap: 0x%08x", read_data);
+      read_word(ADDR_A0);
+      $display("A0 after wrap: 0x%08x", read_data);
+      read_word(ADDR_A1);
+      $display("A1 after wrap: 0x%08x", read_data);
 
       // Read and display the R blocks that has been processed.
       for (i = 0 ; i < 8 ; i = i + 1)