From 3ad18f9945aa0f6a617fcd399a0a402db9a28027 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= <joachim@assured.se>
Date: Tue, 9 Apr 2019 16:10:55 +0200
Subject: Adding inital tb for the SPI slave. Debugging the SPI slave and the
 FPGA_MKM.

---
 src/rtl/fpga_mkm.v           | 46 ++++++++++++++++++++++++++++----------------
 src/rtl/fpga_mkm_spi_slave.v |  5 +++--
 2 files changed, 32 insertions(+), 19 deletions(-)

(limited to 'src/rtl')

diff --git a/src/rtl/fpga_mkm.v b/src/rtl/fpga_mkm.v
index 89825ed..38517e6 100644
--- a/src/rtl/fpga_mkm.v
+++ b/src/rtl/fpga_mkm.v
@@ -86,9 +86,9 @@ module fpga_mkm(
 
   reg [21 : 0] alarm_counter_reg = 22'h0;
 
-  reg alarm_reg = 1'h0;
-  reg alarm_new;
-  reg alarm_we;
+  reg tamper_reg = 1'h0;
+  reg tamper_new;
+  reg tamper_we;
 
   reg key_loaded_reg = 1'h0;
   reg key_loaded_new;
@@ -100,6 +100,14 @@ module fpga_mkm(
   reg [1 : 0] fpga_mkm_ctrl_new;
   reg         fpga_mkm_ctrl_we;
 
+  wire         spi_active;
+  wire         rx_byte_available;
+  wire [7 : 0] rx_byte;
+  reg          tx_byte_load;
+  reg  [7 : 0] tx_byte_reg;
+  reg  [7 : 0] tx_byte_new;
+  reg          tx_byte_we;
+
 
   //----------------------------------------------------------------
   // Concurrent connectivity for ports etc.
@@ -111,7 +119,6 @@ module fpga_mkm(
   assign gled5 = key_loaded_reg;
 
 
-
   //----------------------------------------------------------------
   // Module instantiations.
   //----------------------------------------------------------------
@@ -121,11 +128,11 @@ module fpga_mkm(
                                .sclk(sclk),
                                .mosi(mosi),
                                .miso(miso),
-                               .spi_active(),
-                               .rx_byte_available(),
-                               .rx_byte(),
-                               .tx_byte_load(),
-                               .tx_byte()
+                               .spi_active(spi_active),
+                               .rx_byte_available(rx_byte_available),
+                               .rx_byte(rx_byte),
+                               .tx_byte_load(tx_byte),
+                               .tx_byte(tx_byte_reg)
                               );
 
 
@@ -138,15 +145,18 @@ module fpga_mkm(
 
       if (!tamper)
         begin
-          for (i = 0 ; i < MEM_WORDS ; i = i + 1)
-            key_mem[i] <= 32'h0;
+          for (i = 0 ; i < MEM_BYTES ; i = i + 1)
+            key_mem[i] <= 8'h0;
+
+          key_loaded_reg <= 1'h0;
+          tamper_reg     <= 1'h1;
         end
       else
         begin
           alarm_counter_reg <= alarm_counter_reg + 1;
 
-          if (alarm_we)
-            alarm_reg <= alarm_new;
+          if (tamper_we)
+            tamper_reg <= tamper_new;
 
           if (key_loaded_we)
             key_loaded_reg <= key_loaded_new;
@@ -162,8 +172,8 @@ module fpga_mkm(
   //----------------------------------------------------------------
   always @*
     begin : fpga_mkm_ctrl_fsm
-      alarm_new         = 1'h0;
-      alarm_we          = 1'h0;
+      tamper_new        = 1'h0;
+      tamper_we         = 1'h0;
       key_loaded_new    = 1'h0;
       key_loaded_we     = 1'h0;
       fpga_mkm_ctrl_new = CTRL_IDLE;
@@ -173,14 +183,16 @@ module fpga_mkm(
 
         CTRL_IDLE:
           begin
-            if (tamper)
+            if (spi_active)
               begin
-                fpga_mkm_ctrl_new = CTRL_ALARM;
+                fpga_mkm_ctrl_new = CTRL_CMD;
                 fpga_mkm_ctrl_we  = 1'h1;
               end
           end
 
 
+
+
         CTRL_ALARM:
           begin
 
diff --git a/src/rtl/fpga_mkm_spi_slave.v b/src/rtl/fpga_mkm_spi_slave.v
index 1449af2..9a59f9e 100644
--- a/src/rtl/fpga_mkm_spi_slave.v
+++ b/src/rtl/fpga_mkm_spi_slave.v
@@ -59,8 +59,9 @@ module fpga_mkm_spi_slave(
                           output wire         rx_byte_available,
                           output wire [7 : 0] rx_byte,
 
-                          input wire          tx_byte_load,
-                          input wire [7 : 0]  tx_byte
+                          input wire          tx_byte_available,
+                          input wire [7 : 0]  tx_byte,
+                          output wire         tx_byte_ack
                          );
 
 
-- 
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