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-rw-r--r--src/fmc-test/Makefile50
-rw-r--r--src/fmc-test/include/stm32f4xx_hal_conf.h423
-rw-r--r--src/fmc-test/include/stm32f4xx_it.h56
-rw-r--r--src/fmc-test/src/main.c283
-rw-r--r--src/fmc-test/src/stm-fmc.c303
-rw-r--r--src/fmc-test/src/stm-fmc.h46
-rw-r--r--src/fmc-test/src/stm32f4xx_hal_msp.c107
-rw-r--r--src/fmc-test/src/stm32f4xx_it.c73
8 files changed, 1341 insertions, 0 deletions
diff --git a/src/fmc-test/Makefile b/src/fmc-test/Makefile
new file mode 100644
index 0000000..0cd5524
--- /dev/null
+++ b/src/fmc-test/Makefile
@@ -0,0 +1,50 @@
+# put your *.o targets here, make should handle the rest!
+SRCS = main.c stm32f4xx_hal_msp.c stm32f4xx_it.c stm-fmc.c
+#main.c stm_init.c stm32f4xx_it.c stm32f4xx_hal_msp.c
+
+# all the files will be generated with this name
+PROJ_NAME=fmc-test
+
+TOPLEVEL=../..
+include $(TOPLEVEL)/common.mk
+
+OBJS = $(SRCS:.c=.o)
+
+###################################################
+
+.PHONY: lib proj
+
+all: lib proj
+
+lib:
+ $(MAKE) -C $(STD_PERIPH_LIB) STDPERIPH_SETTINGS="$(STDPERIPH_SETTINGS) -I $(PWD)/include"
+
+proj: $(PROJ_NAME).elf
+
+$(PROJ_NAME).elf: $(SRCS)
+ $(CC) $(CFLAGS) $^ -o $@ -L$(STD_PERIPH_LIB) -lstmf4 -L$(LDSCRIPT_INC) -T$(MCU_LINKSCRIPT) -g
+ $(OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex
+ $(OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin
+ $(OBJDUMP) -St $(PROJ_NAME).elf >$(PROJ_NAME).lst
+ $(SIZE) $(PROJ_NAME).elf
+
+clean:
+ find ./ -name '*~' | xargs rm -f
+ rm -f *.o
+ rm -f $(PROJ_NAME).elf
+ rm -f $(PROJ_NAME).hex
+ rm -f $(PROJ_NAME).bin
+ rm -f $(PROJ_NAME).map
+ rm -f $(PROJ_NAME).lst
+
+really-clean: clean
+ $(MAKE) -C $(STD_PERIPH_LIB) clean
+
+debug:
+ $(GDB) -ex "target remote localhost:3333" \
+ -ex "set remote hardware-breakpoint-limit 6" \
+ -ex "set remote hardware-watchpoint-limit 4" $(PROJ_NAME).elf
+
+flash-target:
+ $(OPENOCD) -f $(OPENOCD_BOARD_DIR)/$(OPENOCD_PROC_FILE) \
+ -c "program $(PROJ_NAME).elf verify reset"
diff --git a/src/fmc-test/include/stm32f4xx_hal_conf.h b/src/fmc-test/include/stm32f4xx_hal_conf.h
new file mode 100644
index 0000000..f1c9cb1
--- /dev/null
+++ b/src/fmc-test/include/stm32f4xx_hal_conf.h
@@ -0,0 +1,423 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_hal_conf.h
+ * @brief HAL configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_HAL_CONF_H
+#define __STM32F4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+#define HAL_MODULE_ENABLED
+
+//#define HAL_ADC_MODULE_ENABLED
+//#define HAL_CAN_MODULE_ENABLED
+//#define HAL_CRC_MODULE_ENABLED
+//#define HAL_CRYP_MODULE_ENABLED
+//#define HAL_DAC_MODULE_ENABLED
+//#define HAL_DCMI_MODULE_ENABLED
+//#define HAL_DMA2D_MODULE_ENABLED
+//#define HAL_ETH_MODULE_ENABLED
+//#define HAL_NAND_MODULE_ENABLED
+//#define HAL_NOR_MODULE_ENABLED
+//#define HAL_PCCARD_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+//#define HAL_SDRAM_MODULE_ENABLED
+//#define HAL_HASH_MODULE_ENABLED
+//#define HAL_I2C_MODULE_ENABLED
+//#define HAL_I2S_MODULE_ENABLED
+//#define HAL_IWDG_MODULE_ENABLED
+//#define HAL_LTDC_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+//#define HAL_RTC_MODULE_ENABLED
+//#define HAL_SAI_MODULE_ENABLED
+//#define HAL_SD_MODULE_ENABLED
+//#define HAL_SPI_MODULE_ENABLED
+//#define HAL_TIM_MODULE_ENABLED
+//#define HAL_UART_MODULE_ENABLED
+//#define HAL_USART_MODULE_ENABLED
+//#define HAL_IRDA_MODULE_ENABLED
+//#define HAL_SMARTCARD_MODULE_ENABLED
+//#define HAL_WWDG_MODULE_ENABLED
+//#define HAL_PCD_MODULE_ENABLED
+//#define HAL_HCD_MODULE_ENABLED
+//#define HAL_QSPI_MODULE_ENABLED
+//#define HAL_QSPI_MODULE_ENABLED
+//#define HAL_CEC_MODULE_ENABLED
+//#define HAL_FMPI2C_MODULE_ENABLED
+//#define HAL_SPDIFRX_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE ((uint32_t)32000)
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature. */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+/**
+ * @brief External clock source for I2S peripheral
+ * This value is used by the I2S HAL module to compute the I2S clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+ #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the External audio frequency in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority */
+#define USE_RTOS 0
+#define PREFETCH_ENABLE 1
+#define INSTRUCTION_CACHE_ENABLE 1
+#define DATA_CACHE_ENABLE 1
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1 */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0 2
+#define MAC_ADDR1 0
+#define MAC_ADDR2 0
+#define MAC_ADDR3 0
+#define MAC_ADDR4 0
+#define MAC_ADDR5 0
+
+/* Definition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
+#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
+#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
+#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848 PHY Address*/
+#define DP83848_PHY_ADDRESS 0x01
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY ((uint32_t)0x000000FF)
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
+
+#define PHY_READ_TO ((uint32_t)0x0000FFFF)
+#define PHY_WRITE_TO ((uint32_t)0x0000FFFF)
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
+#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
+
+#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
+#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
+#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
+#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
+#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
+#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
+#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
+
+#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
+#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
+#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
+
+/* Section 4: Extended PHY Registers */
+
+#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */
+#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */
+#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */
+
+#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */
+#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */
+#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */
+
+#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */
+#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */
+
+#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
+#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32f4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32f4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32f4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32f4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32f4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+ #include "stm32f4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32f4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32f4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+ #include "stm32f4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32f4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+ #include "stm32f4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+ #include "stm32f4xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32f4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+ #include "stm32f4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+ #include "stm32f4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+ #include "stm32f4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+ #include "stm32f4xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+ #include "stm32f4xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32f4xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_FMPI2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_fmpi2c.h"
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f4xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t* file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_HAL_CONF_H */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/src/fmc-test/include/stm32f4xx_it.h b/src/fmc-test/include/stm32f4xx_it.h
new file mode 100644
index 0000000..546d79c
--- /dev/null
+++ b/src/fmc-test/include/stm32f4xx_it.h
@@ -0,0 +1,56 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ *
+ * COPYRIGHT(c) 2015 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_IT_H
+#define __STM32F4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/src/fmc-test/src/main.c b/src/fmc-test/src/main.c
new file mode 100644
index 0000000..705a04f
--- /dev/null
+++ b/src/fmc-test/src/main.c
@@ -0,0 +1,283 @@
+//------------------------------------------------------------------------------
+// main.c
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Headers
+//------------------------------------------------------------------------------
+#include "stm32f4xx_hal.h"
+#include "stm-fmc.h"
+
+
+//------------------------------------------------------------------------------
+// Defines
+//------------------------------------------------------------------------------
+#define GPIO_PORT_LEDS GPIOJ
+
+#define GPIO_PIN_LED_RED GPIO_PIN_1
+#define GPIO_PIN_LED_YELLOW GPIO_PIN_2
+#define GPIO_PIN_LED_GREEN GPIO_PIN_3
+#define GPIO_PIN_LED_BLUE GPIO_PIN_4
+
+
+//------------------------------------------------------------------------------
+// Macros
+//------------------------------------------------------------------------------
+#define led_on(pin) HAL_GPIO_WritePin(GPIO_PORT_LEDS,pin,GPIO_PIN_SET)
+#define led_off(pin) HAL_GPIO_WritePin(GPIO_PORT_LEDS,pin,GPIO_PIN_RESET)
+#define led_toggle(pin) HAL_GPIO_TogglePin(GPIO_PORT_LEDS,pin)
+
+
+//------------------------------------------------------------------------------
+// Variables
+//------------------------------------------------------------------------------
+RNG_HandleTypeDef rng_inst;
+
+
+
+//------------------------------------------------------------------------------
+// Prototypes
+//------------------------------------------------------------------------------
+void SystemClock_Config(void);
+
+static void MX_RNG_Init(void);
+static void MX_GPIO_Init(void);
+
+int test_fpga_data_bus(void);
+int test_fpga_address_bus(void);
+
+
+//------------------------------------------------------------------------------
+// Defines
+//------------------------------------------------------------------------------
+#define TEST_NUM_ROUNDS 100000
+
+
+//------------------------------------------------------------------------------
+int main(void)
+//------------------------------------------------------------------------------
+{
+ // initialize hal
+ HAL_Init();
+
+ // configure system clock
+ SystemClock_Config();
+
+ // initialize gpio
+ MX_GPIO_Init();
+
+ // initialize rng
+ MX_RNG_Init();
+
+ // prepare fmc interface
+ fmc_init();
+
+ // turn on green led, turn off other leds
+ led_on(GPIO_PIN_LED_GREEN);
+ led_off(GPIO_PIN_LED_YELLOW);
+ led_off(GPIO_PIN_LED_RED);
+ led_off(GPIO_PIN_LED_BLUE);
+
+ // vars
+ int test_ok;
+
+ // main loop (test, until an error is detected)
+ while (1)
+ {
+ // test data bus
+ test_ok = test_fpga_data_bus();
+
+ // check for errors (abort testing in case of error)
+ if (test_ok < TEST_NUM_ROUNDS) /*break*/;
+
+
+ // test address bus
+ test_ok = test_fpga_address_bus();
+
+ // check for errors (abort testing in case of error)
+ if (test_ok < TEST_NUM_ROUNDS) /*break*/;
+
+ // toggle yellow led to indicate, that we are alive
+ led_toggle(GPIO_PIN_LED_YELLOW);
+ }
+
+ // error handler
+ while (1)
+ {
+ // turn on red led, turn off other leds
+ led_on(GPIO_PIN_LED_RED);
+ led_off(GPIO_PIN_LED_GREEN);
+ led_off(GPIO_PIN_LED_YELLOW);
+ led_off(GPIO_PIN_LED_BLUE);
+ }
+
+ // should never reach this line
+}
+
+
+//------------------------------------------------------------------------------
+int test_fpga_data_bus(void)
+//------------------------------------------------------------------------------
+{
+ int c, ok;
+ uint32_t rnd, buf;
+ HAL_StatusTypeDef hal_result;
+
+ // run some rounds of data bus test
+ for (c=0; c<TEST_NUM_ROUNDS; c++)
+ {
+ // try to generate "random" number
+ hal_result = HAL_RNG_GenerateRandomNumber(&rng_inst, &rnd);
+ if (hal_result != HAL_OK) break;
+
+ // write value to fpga at address 0
+ ok = fmc_write_32(0, &rnd);
+ if (ok != 0) break;
+
+ // read value from fpga
+ ok = fmc_read_32(0, &buf);
+ if (ok != 0) break;
+
+ // compare (abort testing in case of error)
+ if (buf != rnd)
+ {
+ uint32_t diff = buf;
+ diff ^= rnd;
+ diff = 0; // place breakpoint here if needed
+ break;
+ }
+ }
+
+ // return number of successful tests
+ return c;
+}
+
+
+//------------------------------------------------------------------------------
+int test_fpga_address_bus(void)
+//------------------------------------------------------------------------------
+{
+ int c, ok;
+ uint32_t rnd, buf;
+ HAL_StatusTypeDef hal_result;
+
+ // run some rounds of address bus test
+ for (c=0; c<TEST_NUM_ROUNDS; c++)
+ {
+ // try to generate "random" number
+ hal_result = HAL_RNG_GenerateRandomNumber(&rng_inst, &rnd);
+ if (hal_result != HAL_OK) break;
+
+ // we only have 2^22 32-bit words
+ rnd &= 0x00FFFFFC;
+
+ // don't test zero addresses (fpga will store data, not address)
+ if (rnd == 0) continue;
+
+ // write dummy value to fpga at some non-zero address
+ ok = fmc_write_32(rnd, &buf);
+ if (ok != 0) break;
+
+ // read value from fpga
+ ok = fmc_read_32(0, &buf);
+ if (ok != 0) break;
+
+ // fpga receives address of 32-bit word, while we need
+ // byte address here to compare
+ buf <<= 2;
+
+ // compare (abort testing in case of error)
+ if (buf != rnd)
+ {
+ uint32_t diff = buf;
+ diff ^= rnd;
+ diff = 0; // place breakpoint here if needed
+ break;
+ }
+ }
+
+ return c;
+}
+
+
+//------------------------------------------------------------------------------
+void SystemClock_Config(void)
+//------------------------------------------------------------------------------
+{
+
+ RCC_OscInitTypeDef RCC_OscInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+ __PWR_CLK_ENABLE();
+
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = 16;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = 12;
+ RCC_OscInitStruct.PLL.PLLN = 270;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = 8;
+ HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+ HAL_PWREx_ActivateOverDrive();
+
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1
+ |RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
+
+ HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
+
+ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+}
+
+
+//------------------------------------------------------------------------------
+void MX_RNG_Init(void)
+//------------------------------------------------------------------------------
+{
+ rng_inst.Instance = RNG;
+ HAL_RNG_Init(&rng_inst);
+}
+
+
+//------------------------------------------------------------------------------
+void MX_GPIO_Init(void)
+//------------------------------------------------------------------------------
+{
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ __GPIOJ_CLK_ENABLE();
+
+ GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
+ HAL_GPIO_Init(GPIOJ, &GPIO_InitStruct);
+}
+
+
+//------------------------------------------------------------------------------
+#ifdef USE_FULL_ASSERT
+//------------------------------------------------------------------------------
+void assert_failed(uint8_t* file, uint32_t line)
+//------------------------------------------------------------------------------
+{
+}
+//------------------------------------------------------------------------------
+#endif
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// EOF
+//------------------------------------------------------------------------------
diff --git a/src/fmc-test/src/stm-fmc.c b/src/fmc-test/src/stm-fmc.c
new file mode 100644
index 0000000..5459965
--- /dev/null
+++ b/src/fmc-test/src/stm-fmc.c
@@ -0,0 +1,303 @@
+//------------------------------------------------------------------------------
+// stm-fmc.c
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Headers
+//------------------------------------------------------------------------------
+#include "stm-fmc.h"
+
+
+//------------------------------------------------------------------------------
+// Variables
+//------------------------------------------------------------------------------
+SRAM_HandleTypeDef _fmc_fpga_inst;
+
+
+//------------------------------------------------------------------------------
+void fmc_init(void)
+//------------------------------------------------------------------------------
+{
+ // configure fmc pins
+ _fmc_init_gpio();
+
+ // configure fmc registers
+ _fmc_init_params();
+}
+
+
+//------------------------------------------------------------------------------
+int fmc_write_32(uint32_t addr, uint32_t *data)
+//------------------------------------------------------------------------------
+{
+ // calculate target fpga address
+ uint32_t ptr = FMC_FPGA_BASE_ADDR + (addr & FMC_FPGA_ADDR_MASK);
+
+ // write data to fpga
+ HAL_StatusTypeDef ok = HAL_SRAM_Write_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1);
+
+ // check for error
+ if (ok != HAL_OK) return -1;
+
+ // wait for transaction to complete
+ int wait = _fmc_nwait_idle();
+
+ // check for timeout
+ if (wait != 0) return -1;
+
+ // everything went ok
+ return 0;
+}
+
+
+//------------------------------------------------------------------------------
+int fmc_read_32(uint32_t addr, uint32_t *data)
+ //------------------------------------------------------------------------------
+{
+ // calculate target fpga address
+ uint32_t ptr = FMC_FPGA_BASE_ADDR + (addr & FMC_FPGA_ADDR_MASK);
+
+ // perform dummy read transaction
+ HAL_StatusTypeDef ok = HAL_SRAM_Read_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1);
+
+ // check for error
+ if (ok != HAL_OK) return -1;
+
+ // wait for dummy transaction to complete
+ int wait = _fmc_nwait_idle();
+
+ // check for timeout
+ if (wait != 0) return -1;
+
+ // read data from fpga
+ ok = HAL_SRAM_Read_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1);
+
+ // check for error
+ if (ok != HAL_OK) return -1;
+
+ // wait for read transaction to complete
+ wait = _fmc_nwait_idle();
+
+ // check for timeout
+ if (wait != 0) return -1;
+
+ // everything went ok
+ return 0;
+}
+
+
+//------------------------------------------------------------------------------
+int _fmc_nwait_idle()
+//------------------------------------------------------------------------------
+{
+ int cnt; // counter
+
+ // poll NWAIT (number of iterations is limited)
+ for (cnt=0; cnt<FMC_FPGA_NWAIT_MAX_POLL_TICKS; cnt++)
+ {
+ // read pin state
+ GPIO_PinState nwait = HAL_GPIO_ReadPin(FMC_GPIO_PORT_NWAIT, FMC_GPIO_PIN_NWAIT);
+
+ // stop waiting if fpga is ready
+ if (nwait == FMC_NWAIT_IDLE) break;
+ }
+
+ // check for timeout
+ if (cnt >= FMC_FPGA_NWAIT_MAX_POLL_TICKS) return -1;
+
+ // ok
+ return 0;
+}
+
+//------------------------------------------------------------------------------
+void _fmc_init_gpio(void)
+//------------------------------------------------------------------------------
+{
+ // enable gpio clocks
+ __GPIOA_CLK_ENABLE();
+ __GPIOB_CLK_ENABLE();
+ __GPIOD_CLK_ENABLE();
+ __GPIOE_CLK_ENABLE();
+ __GPIOF_CLK_ENABLE();
+ __GPIOG_CLK_ENABLE();
+ __GPIOH_CLK_ENABLE();
+ __GPIOI_CLK_ENABLE();
+
+ // enable fmc clock
+ __FMC_CLK_ENABLE();
+
+ // structure
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ // Port B
+ GPIO_InitStruct.Pin = GPIO_PIN_7;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ // Port D
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
+ |GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_3|GPIO_PIN_4
+ |GPIO_PIN_5|GPIO_PIN_7;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /*
+ * When FMC is working with fixed latency, NWAIT pin must not be
+ * configured in AF mode, according to STM32F429 errata.
+ */
+
+ // Port D (GPIO!)
+ GPIO_InitStruct.Pin = GPIO_PIN_6;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ // Port E
+ GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7
+ |GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+ // Port F
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_13
+ |GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+ // Port G
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ |GPIO_PIN_4|GPIO_PIN_5;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+ // Port H
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+
+ // Port I
+ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
+ |GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_6|GPIO_PIN_7;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+}
+
+
+//------------------------------------------------------------------------------
+void _fmc_init_params(void)
+//------------------------------------------------------------------------------
+{
+ /*
+ * fill internal fields
+ */
+ _fmc_fpga_inst.Instance = FMC_NORSRAM_DEVICE;
+ _fmc_fpga_inst.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
+
+
+ /*
+ * configure fmc interface settings
+ */
+
+ // use the first bank and corresponding chip select
+ _fmc_fpga_inst.Init.NSBank = FMC_NORSRAM_BANK1;
+
+ // data and address buses are separate
+ _fmc_fpga_inst.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
+
+ // fpga mimics psram-type memory
+ _fmc_fpga_inst.Init.MemoryType = FMC_MEMORY_TYPE_PSRAM;
+
+ // data bus is 32-bit
+ _fmc_fpga_inst.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_32;
+
+ // read transaction is sync
+ _fmc_fpga_inst.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_ENABLE;
+
+ // this _must_ be configured to high, according to errata, otherwise
+ // the processor may hang after trying to access fpga via fmc
+ _fmc_fpga_inst.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_HIGH;
+
+ // wrap mode is not supported
+ _fmc_fpga_inst.Init.WrapMode = FMC_WRAP_MODE_DISABLE;
+
+ // don't care in fixed latency mode
+ _fmc_fpga_inst.Init.WaitSignalActive = FMC_WAIT_TIMING_DURING_WS;
+
+ // allow write access to fpga
+ _fmc_fpga_inst.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
+
+ // use fixed latency mode (ignore wait signal)
+ _fmc_fpga_inst.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
+
+ // write and read have same timing
+ _fmc_fpga_inst.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
+
+ // don't care in sync mode
+ _fmc_fpga_inst.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
+
+ // write transaction is sync
+ _fmc_fpga_inst.Init.WriteBurst = FMC_WRITE_BURST_ENABLE;
+
+ // keep clock always active
+ _fmc_fpga_inst.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ASYNC;
+
+ /*
+ * configure fmc timing parameters
+ */
+ FMC_NORSRAM_TimingTypeDef fmc_timing;
+
+ // don't care in sync mode
+ fmc_timing.AddressSetupTime = 15;
+
+ // don't care in sync mode
+ fmc_timing.AddressHoldTime = 15;
+
+ // don't care in sync mode
+ fmc_timing.DataSetupTime = 255;
+
+ // not needed, since nwait will be polled manually
+ fmc_timing.BusTurnAroundDuration = 0;
+
+ // use smallest allowed divisor for best performance
+ fmc_timing.CLKDivision = 2;
+
+ // stm is too slow to work with min allowed 2-cycle latency
+ fmc_timing.DataLatency = 3;
+
+ // don't care in sync mode
+ fmc_timing.AccessMode = FMC_ACCESS_MODE_A;
+
+ // initialize fmc
+ HAL_SRAM_Init(&_fmc_fpga_inst, &fmc_timing, NULL);
+}
+
+
+//------------------------------------------------------------------------------
+// EOF
+//------------------------------------------------------------------------------
diff --git a/src/fmc-test/src/stm-fmc.h b/src/fmc-test/src/stm-fmc.h
new file mode 100644
index 0000000..222857b
--- /dev/null
+++ b/src/fmc-test/src/stm-fmc.h
@@ -0,0 +1,46 @@
+//------------------------------------------------------------------------------
+// stm-fmc.h
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Headers
+//------------------------------------------------------------------------------
+#include "stm32f4xx_hal.h"
+
+
+//------------------------------------------------------------------------------
+// External Variables
+//------------------------------------------------------------------------------
+extern SRAM_HandleTypeDef _fmc_fpga_inst;
+
+
+//------------------------------------------------------------------------------
+// Defined Values
+//------------------------------------------------------------------------------
+#define FMC_FPGA_BASE_ADDR 0x60000000
+#define FMC_FPGA_ADDR_MASK 0x00FFFFFC
+#define FMC_FPGA_NWAIT_MAX_POLL_TICKS 10
+
+#define FMC_GPIO_PORT_NWAIT GPIOD
+#define FMC_GPIO_PIN_NWAIT GPIO_PIN_6
+
+#define FMC_NWAIT_IDLE GPIO_PIN_SET
+
+
+//------------------------------------------------------------------------------
+// Prototypes
+//------------------------------------------------------------------------------
+void fmc_init(void);
+
+int fmc_write_32(uint32_t addr, uint32_t *data);
+int fmc_read_32(uint32_t addr, uint32_t *data);
+
+void _fmc_init_gpio(void);
+void _fmc_init_params(void);
+int _fmc_nwait_idle(void);
+
+
+//------------------------------------------------------------------------------
+// EOF
+//------------------------------------------------------------------------------
diff --git a/src/fmc-test/src/stm32f4xx_hal_msp.c b/src/fmc-test/src/stm32f4xx_hal_msp.c
new file mode 100644
index 0000000..fcb10ad
--- /dev/null
+++ b/src/fmc-test/src/stm32f4xx_hal_msp.c
@@ -0,0 +1,107 @@
+/**
+ ******************************************************************************
+ * File Name : stm32f4xx_hal_msp.c
+ * Description : This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ *
+ * COPYRIGHT(c) 2015 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+
+ /* System interrupt init*/
+/* SysTick_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
+{
+
+ if(hrng->Instance==RNG)
+ {
+ /* USER CODE BEGIN RNG_MspInit 0 */
+
+ /* USER CODE END RNG_MspInit 0 */
+ /* Peripheral clock enable */
+ __RNG_CLK_ENABLE();
+ /* USER CODE BEGIN RNG_MspInit 1 */
+
+ /* USER CODE END RNG_MspInit 1 */
+ }
+
+}
+
+void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng)
+{
+
+ if(hrng->Instance==RNG)
+ {
+ /* USER CODE BEGIN RNG_MspDeInit 0 */
+
+ /* USER CODE END RNG_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __RNG_CLK_DISABLE();
+ }
+ /* USER CODE BEGIN RNG_MspDeInit 1 */
+
+ /* USER CODE END RNG_MspDeInit 1 */
+
+}
+
+
+
+void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram)
+{
+}
+
+
+void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram)
+{
+}
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/src/fmc-test/src/stm32f4xx_it.c b/src/fmc-test/src/stm32f4xx_it.c
new file mode 100644
index 0000000..92c9a09
--- /dev/null
+++ b/src/fmc-test/src/stm32f4xx_it.c
@@ -0,0 +1,73 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ *
+ * COPYRIGHT(c) 2015 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+#include "stm32f4xx.h"
+#include "stm32f4xx_it.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+
+/**
+* @brief This function handles System tick timer.
+*/
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ HAL_SYSTICK_IRQHandler();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32f4xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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