+ + + + + + +

+ + + + + + + + + +

Release +Notes for STM32F4xx CMSIS

+ + + + + + +

+ +

Update History

V2.0.0 / 18-February-2014

+ + + + + + + + + + + + + + + + + + + + +

Main +Changes

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+ + + + + + + +

Update +based on STM32Cube specification
+
This version has to be used only with STM32CubeF4 based development

V1.3.0 / 08-November-2013

+ +

Main +Changes

+ +

+ +
Add +support of STM32F401xExx devices
Update startup files "startup_stm32f401xx.s" for EWARM, MDK-ARM, TrueSTUDIO and Ride toolchains: Add SPI4 interrupt handler entry in the vector table +

V1.2.1 / +19-September-2013

+ +

Main +Changes

+ +

+ +
system_stm32f4xx.c : Update FMC SDRAM configuration (RBURST mode activation)
Update startup files "startup_stm32f427_437xx.s" and "startup_stm32f429_439xx.s" for TrueSTUDIO and Ride toolchains and maintain the old name of startup files for legacy purpose +

V1.2.0 / +11-September-2013

+ +

Main +Changes

+ +

+ +
Add +support of STM32F429/439xx and STM32F401xCxx devices
Update definition of STM32F427/437xx devices : extension +of the features to include system clock up to 180MHz, dual bank Flash, reduced +STOP Mode current, SAI, PCROP, SDRAM and DMA2D
stm32f4xx.h
+
- Add the following device defines :
- Maintain the old device define for legacy purpose
- Update IRQ handler enumeration structure to support all STM32F4xx Family devices.
+
Add new startup files "startup_stm32f40_41xxx.s","startup_stm32f427_437xx.s", "startup_stm32f429_439xx.s" and "startup_stm32f401xx.s" for all toolchains and maintain the old name for startup files for legacy purpose +
system_stm32f4xx.c +
- Update the system configuration to support all STM32F4xx Family devices. +

V1.1.0 / +11-January-2013

+ +

Main +Changes

+ +

Official release for STM32F427x/437x devices. +
stm32f4xx.h
+
- Update product define: replace +"#define STM32F4XX" by "#define STM32F40XX" for STM32F40x/41x devices +
- Add new product define: "#define +STM32F427X" for STM32F427x/437x devices.
+
Add new startup files "startup_stm32f427x.s" for all toolchains +
rename startup files "startup_stm32f4xx.s" by "startup_stm32f40xx.s" for all toolchains +
system_stm32f4xx.c +
- Prefetch Buffer enabled +
- Add reference to STM32F427x/437x +devices and STM324x7I_EVAL board +
- SystemInit_ExtMemCtl() +function
  +
  - Add configuration of missing FSMC +address and data lines
  +
  - Change memory type to SRAM instead +of PSRAM (PSRAM is available only on STM324xG-EVAL RevA) and update timing +values

V1.0.2 / 05-March-2012

Main +Changes

+ +

All source files: license disclaimer text update and add link to the License file on ST Internet.

V1.0.1 / 28-December-2011

Main +Changes

All source files: update disclaimer to add reference to the new license agreement
stm32f4xx.h

Correct bit definition: RCC_AHB2RSTR_HSAHRST changed to RCC_AHB2RSTR_HASHRST

V1.0.0 / 30-September-2011

Main +Changes

First official release for STM32F40x/41x devices
Add startup file for TASKING toolchain
system_stm32f4xx.c: driver's comments update

V1.0.0RC2 / 26-September-2011

Main +Changes

Official version (V1.0.0) Release Candidate2 for STM32F40x/41x devices
stm32f4xx.h

Add define for Cortex-M4 revision __CM4_REV
Correct RCC_CFGR_PPRE2_DIV16 bit (in RCC_CFGR register) value to 0x0000E000
Correct some bits definition to be in line with naming used in the Reference Manual (RM0090)

GPIO_OTYPER_IDR_x changed to GPIO_IDR_IDR_x
GPIO_OTYPER_ODR_x changed to GPIO_ODR_ODR_x
SYSCFG_PMC_MII_RMII changed to SYSCFG_PMC_MII_RMII_SEL
RCC_APB2RSTR_SPI1 changed to RCC_APB2RSTR_SPI1RST
DBGMCU_APB1_FZ_DBG_IWDEG_STOP changed to DBGMCU_APB1_FZ_DBG_IWDG_STOP
PWR_CR_PMODE changed to PWR_CR_VOS
PWR_CSR_REGRDY changed to PWR_CSR_VOSRDY
Add new define RCC_AHB1ENR_CCMDATARAMEN
Add new defines SRAM2_BASE, CCMDATARAM_BASE and BKPSRAM_BASE

GPIO_TypeDef structure: in the comment change AFR[2] address mapping to 0x20-0x24 instead of 0x24-0x28

system_stm32f4xx.c

SystemInit(): add code to enable the FPU
SetSysClock(): change PWR_CR_PMODE by PWR_CR_VOS
SystemInit_ExtMemCtl(): remove commented values

startup (for all compilers)

Delete code used to enable the FPU (moved to system_stm32f4xx.c file)
File’s header updated

V1.0.0RC1 / 25-August-2011

Main +Changes

Official version (V1.0.0) Release Candidate1 for STM32F4xx devices

+ +

License

+Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are +met:
+ +

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions +in binary form must reproduce the above copyright notice, this list of +conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived
+ +

+ from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +

For +complete documentation on STM32 Microcontrollers +visit www.st.com/STM32