From 4b0c6384695a08cbd68048768ea4498a3cb72a0e Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Sat, 15 Oct 2016 16:44:53 +0200 Subject: init --- rev03-KiCad/rev02_16.sch | 137 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 rev03-KiCad/rev02_16.sch (limited to 'rev03-KiCad/rev02_16.sch') diff --git a/rev03-KiCad/rev02_16.sch b/rev03-KiCad/rev02_16.sch new file mode 100644 index 0000000..0006881 --- /dev/null +++ b/rev03-KiCad/rev02_16.sch @@ -0,0 +1,137 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 18 27 +Title "rev02_16" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 1650 3410 0 60 ~ 12 +*) Middle Right Bank +Text Notes 5280 3300 0 60 ~ 12 +*) Upper Left Bank +Text Notes 2640 4180 0 60 ~ 12 +*) Completely unused banks\nstill must be powered +Text Notes 6490 4070 0 60 ~ 12 +*) Completely unused banks\nstill must be powered +Text Notes 9460 10153 0 84 ~ 12 +FPGA unused banks +$Comp +L VCCO_3V3 #PWR?58023F33 +U 1 1 58023F33 +P 2530 3630 +F 0 "VCCO_3V3_31" H 2530 3630 20 0000 C CNN +F 1 "+VCCO_3V3" H 2530 3560 30 0000 C CNN +F 2 "" H 2530 3630 70 0000 C CNN +F 3 "" H 2530 3630 70 0000 C CNN + 1 2530 3630 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F32 +U 1 1 58023F32 +P 6380 3520 +F 0 "VCCO_3V3_32" H 6380 3520 20 0000 C CNN +F 1 "+VCCO_3V3" H 6380 3450 30 0000 C CNN +F 2 "" H 6380 3520 70 0000 C CNN +F 3 "" H 6380 3520 70 0000 C CNN + 1 6380 3520 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2530 3850 2310 3850 +Wire Wire Line + 2530 3850 2530 3960 +Wire Wire Line + 2530 3960 2530 4070 +Wire Wire Line + 2530 4070 2530 4180 +Wire Wire Line + 2530 4180 2310 4180 +Wire Wire Line + 2530 4070 2310 4070 +Wire Wire Line + 2530 3960 2310 3960 +Wire Wire Line + 2530 3630 2530 3850 +Wire Wire Line + 2530 4400 2310 4400 +Wire Wire Line + 2530 4290 2530 4400 +Wire Wire Line + 2530 4180 2530 4290 +Wire Wire Line + 2530 4290 2310 4290 +Wire Wire Line + 6380 3740 6160 3740 +Wire Wire Line + 6380 3740 6380 3850 +Wire Wire Line + 6380 3850 6380 3960 +Wire Wire Line + 6380 3960 6380 4070 +Wire Wire Line + 6380 4070 6160 4070 +Wire Wire Line + 6380 3960 6160 3960 +Wire Wire Line + 6380 3850 6160 3850 +Wire Wire Line + 6380 3520 6380 3740 +Wire Wire Line + 6380 4290 6160 4290 +Wire Wire Line + 6380 4180 6380 4290 +Wire Wire Line + 6380 4070 6380 4180 +Wire Wire Line + 6380 4180 6160 4180 +$Comp +L XC7A200TFBG484_4 IC250 +U 1 1 58023F31 + 1 2090 6820 + 1 0 0 -1 +$EndComp +$Comp +L XC7A200TFBG484_7 IC251 +U 1 1 58023F30 + 1 5940 6710 + 1 0 0 -1 +$EndComp +$EndSCHEMATC \ No newline at end of file -- cgit v1.2.3