From cbc587763757e94e0198b4dd5cfe5477fb41c476 Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Wed, 9 May 2018 13:52:45 +0200 Subject: Add NoConn, some power components and fix some symbols. 20 DRC warnings left. --- add-components.py | 55 ++++++++++++++++++++++++++++++++++++++----------------- 1 file changed, 38 insertions(+), 17 deletions(-) (limited to 'add-components.py') diff --git a/add-components.py b/add-components.py index eea96b3..bc839fa 100755 --- a/add-components.py +++ b/add-components.py @@ -32,7 +32,9 @@ def print_lines(fn, out): 'rev02_02.sch': ['NoConn ~ 11500 5200', 'NoConn ~ 4250 6200'], 'rev02_03.sch': ['NoConn ~ 9100 5100', 'NoConn ~ 9100 5200', - 'NoConn ~ 9100 5300'], + 'NoConn ~ 9100 5300', + 'NoConn ~ 6800 5400', + 'NoConn ~ 13040 4330'], 'rev02_04.sch': [], 'rev02_05.sch': ['NoConn ~ 3100 5300', 'NoConn ~ 3100 5400', @@ -117,10 +119,24 @@ def print_lines(fn, out): 'NoConn ~ 7400 5000', 'NoConn ~ 7400 5100', 'NoConn ~ 7400 5200'], - 'rev02_11.sch': [], + 'rev02_11.sch': ['NoConn ~ 13200 4300', + # Mark BATT pin on JP4 as providing power + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AF61081', + 'P 13200 2500', + 'F 0 "#FLG?" H 13200 2575 50 0001 C CNN', + 'F 1 "PWR_FLAG" V 13200 2628 50 0000 L CNN', + 'F 2 "" H 13200 2500 50 0001 C CNN', + 'F 3 "~" H 13200 2500 50 0001 C CNN', + ' 1 13200 2500', + ' 0 -1 -1 0', + '$EndComp', + 'Connection ~ 13200 2500', + ], 'rev02_12.sch': ['NoConn ~ 11400 5900'], 'rev02_13.sch': [], - 'rev02_14.sch': ['NoConn ~ 5505 4800', + 'rev02_14.sch': ['NoConn ~ 5500 4800', 'NoConn ~ 5500 4900', 'NoConn ~ 2100 4800', 'NoConn ~ 2100 4900', @@ -284,7 +300,10 @@ def print_lines(fn, out): 'NoConn ~ 6750 8900', 'NoConn ~ 6750 7400', 'NoConn ~ 6750 7200', - 'NoConn ~ 2950 5200'], + 'NoConn ~ 2950 5200', + 'NoConn ~ 7900 8000', + 'NoConn ~ 7900 8100' + ], 'rev02_18.sch': ['NoConn ~ 3900 5800', 'NoConn ~ 3900 9000', # VCC 1V8 @@ -338,7 +357,8 @@ def print_lines(fn, out): 'NoConn ~ 1900 9600', 'NoConn ~ 1900 9700', 'NoConn ~ 1900 9800', - 'NoConn ~ 1900 9900'], + 'NoConn ~ 1900 9900', + 'NoConn ~ 1900 6200'], 'rev02_20.sch': ['NoConn ~ 2400 5700', 'NoConn ~ 2400 5900', 'NoConn ~ 2400 5800', @@ -363,7 +383,8 @@ def print_lines(fn, out): 'NoConn ~ 2400 9700', 'NoConn ~ 2400 9800', 'NoConn ~ 2400 9900', - 'NoConn ~ 2400 5100'], + 'NoConn ~ 2400 5100', + 'NoConn ~ 3600 6400'], 'rev02_21.sch': [], 'rev02_22.sch': [], 'rev02_23.sch': [], @@ -379,17 +400,17 @@ def print_lines(fn, out): # VCC 1V0 symbol 'Wire Wire Line', ' 8300 6400 8300 6200', - '$Comp', - 'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', - 'U 1 1 5AF3F25C', - 'P 8300 6200', - 'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', - 'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', - 'F 2 "" H 8300 6200 60 0000 C CNN', - 'F 3 "" H 8300 6200 60 0000 C CNN', - ' 1 8300 6200', - ' 1 0 0 -1', - '$EndComp', + #'$Comp', + #'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', + #'U 1 1 5AF3F25C', + #'P 8300 6200', + #'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', + #'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', + #'F 2 "" H 8300 6200 60 0000 C CNN', + #'F 3 "" H 8300 6200 60 0000 C CNN', + #' 1 8300 6200', + #' 1 0 0 -1', + #'$EndComp', ], 'rev02_25.sch': []} if not comp.get(fn, []): -- cgit v1.2.3