From 23f52967a2ebfbdeca07705391c1fa80538db2f5 Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Wed, 9 May 2018 10:33:40 +0200 Subject: init --- add-components.py | 435 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 435 insertions(+) create mode 100755 add-components.py (limited to 'add-components.py') diff --git a/add-components.py b/add-components.py new file mode 100755 index 0000000..eea96b3 --- /dev/null +++ b/add-components.py @@ -0,0 +1,435 @@ +#!/usr/bin/env python + +""" +Change all net labels from a static list into global labels +""" + +import os +import re +import sys +import pprint +from copy import copy + + +def print_lines(fn, out): + comp = {'rev02_00.sch': [], + 'rev02_01.sch': ['NoConn ~ 8700 8000', + # VCC5V0 symbol + 'Wire Wire Line', + ' 12300 6600 12300 6450', + '$Comp', + 'L Cryptech_Alpha:VCC_5V0 #PWR?', + 'U 1 1 5AF35ED8', + 'P 12300 6450', + 'F 0 "#PWR?" H 12300 6300 50 0001 C CNN', + 'F 1 "VCC_5V0" H 12315 6623 50 0000 C CNN', + 'F 2 "" H 12300 6450 60 0000 C CNN', + 'F 3 "" H 12300 6450 60 0000 C CNN', + ' 1 12300 6450', + ' 1 0 0 -1 ', + '$EndComp', + ], + 'rev02_02.sch': ['NoConn ~ 11500 5200', 'NoConn ~ 4250 6200'], + 'rev02_03.sch': ['NoConn ~ 9100 5100', + 'NoConn ~ 9100 5200', + 'NoConn ~ 9100 5300'], + 'rev02_04.sch': [], + 'rev02_05.sch': ['NoConn ~ 3100 5300', + 'NoConn ~ 3100 5400', + 'NoConn ~ 3100 5500', + 'NoConn ~ 3100 5600', + 'NoConn ~ 3100 5700', + 'NoConn ~ 3100 5800', + 'NoConn ~ 3100 6900', + 'NoConn ~ 3100 7000', + 'NoConn ~ 3100 7100', + 'NoConn ~ 3100 7700', + 'NoConn ~ 3100 7800', + 'NoConn ~ 3100 7900', + 'NoConn ~ 3100 8000', + 'NoConn ~ 3100 8100', + 'NoConn ~ 3100 8200', + 'NoConn ~ 3100 8300', + 'NoConn ~ 3100 8400', + 'NoConn ~ 6200 7600', + 'NoConn ~ 6200 7500', + 'NoConn ~ 6200 7400', + 'NoConn ~ 6200 7300', + 'NoConn ~ 6200 6900', + 'NoConn ~ 6200 6400', + 'NoConn ~ 6200 6100', + 'NoConn ~ 6200 6000', + 'NoConn ~ 6200 5900', + 'NoConn ~ 6200 5800', + 'NoConn ~ 6200 5700', + 'NoConn ~ 6200 5600', + 'NoConn ~ 6200 5500', + 'NoConn ~ 6200 5200', + 'NoConn ~ 6200 5000', + 'NoConn ~ 6200 4900', + 'NoConn ~ 6200 4800', + 'NoConn ~ 6200 4700', + 'NoConn ~ 6200 4200', + 'NoConn ~ 6200 3900', + 'NoConn ~ 6200 3800', + 'NoConn ~ 6200 3700', + 'NoConn ~ 6200 3600', + 'NoConn ~ 6200 3500', + 'NoConn ~ 6200 3400', + 'NoConn ~ 6200 3100', + 'NoConn ~ 6200 3000', + 'NoConn ~ 6200 2900', + 'NoConn ~ 6200 2800'], + 'rev02_06.sch': [], + 'rev02_07.sch': [], + 'rev02_08.sch': [], + 'rev02_09.sch': ['NoConn ~ 9500 3900', + 'NoConn ~ 9500 4000', + 'NoConn ~ 9500 4100', + 'NoConn ~ 9500 4300', + 'NoConn ~ 9500 4400', + 'NoConn ~ 9500 4500', + 'NoConn ~ 9500 4600', + 'NoConn ~ 9500 4700', + 'NoConn ~ 9500 4800', + 'NoConn ~ 9500 4900', + 'NoConn ~ 9500 5000', + 'NoConn ~ 9500 5100', + 'NoConn ~ 9500 5200', + 'NoConn ~ 7300 5100', + 'NoConn ~ 7300 5000', + 'NoConn ~ 7300 4900', + 'NoConn ~ 2000 3600'], + 'rev02_10.sch': ['NoConn ~ 9600 4000', + 'NoConn ~ 9600 4100', + 'NoConn ~ 9600 4200', + 'NoConn ~ 9600 4400', + 'NoConn ~ 9600 4500', + 'NoConn ~ 9600 4600', + 'NoConn ~ 9600 4700', + 'NoConn ~ 9600 4800', + 'NoConn ~ 9600 4900', + 'NoConn ~ 9600 5000', + 'NoConn ~ 9600 5100', + 'NoConn ~ 9600 5200', + 'NoConn ~ 9600 5300', + 'NoConn ~ 2100 3700', + 'NoConn ~ 7400 5000', + 'NoConn ~ 7400 5100', + 'NoConn ~ 7400 5200'], + 'rev02_11.sch': [], + 'rev02_12.sch': ['NoConn ~ 11400 5900'], + 'rev02_13.sch': [], + 'rev02_14.sch': ['NoConn ~ 5505 4800', + 'NoConn ~ 5500 4900', + 'NoConn ~ 2100 4800', + 'NoConn ~ 2100 4900', + 'NoConn ~ 2100 5000', + 'NoConn ~ 2100 5100', + 'NoConn ~ 2100 5200', + 'NoConn ~ 2100 5800', + 'NoConn ~ 2100 5900', + 'NoConn ~ 2100 6000', + 'NoConn ~ 2100 6100', + 'NoConn ~ 2100 6200', + 'NoConn ~ 2100 6300', + 'NoConn ~ 2100 6900', + 'NoConn ~ 2100 7000', + 'NoConn ~ 2100 7100', + 'NoConn ~ 2100 7200', + 'NoConn ~ 2100 7300', + 'NoConn ~ 2100 7400', + 'NoConn ~ 2100 7500', + 'NoConn ~ 2100 7600', + 'NoConn ~ 2100 7700', + 'NoConn ~ 2100 7800', + 'NoConn ~ 2100 7900', + 'NoConn ~ 2100 8000', + 'NoConn ~ 2100 8100', + 'NoConn ~ 2100 8300', + 'NoConn ~ 2100 8200', + 'NoConn ~ 2100 8400', + 'NoConn ~ 2100 8500', + 'NoConn ~ 2100 8600', + 'NoConn ~ 2100 8700', + 'NoConn ~ 2100 8800', + 'NoConn ~ 2100 8900'], + 'rev02_15.sch': [], + 'rev02_16.sch': ['NoConn ~ 2100 5100', + 'NoConn ~ 2100 5200', + 'NoConn ~ 2100 5300', + 'NoConn ~ 2100 5400', + 'NoConn ~ 2100 5500', + 'NoConn ~ 2100 5600', + 'NoConn ~ 2100 5700', + 'NoConn ~ 2100 5800', + 'NoConn ~ 2100 5900', + 'NoConn ~ 2100 6000', + 'NoConn ~ 2100 6100', + 'NoConn ~ 2100 6200', + 'NoConn ~ 2100 6300', + 'NoConn ~ 2100 6400', + 'NoConn ~ 2100 6500', + 'NoConn ~ 2100 6700', + 'NoConn ~ 2100 6600', + 'NoConn ~ 2100 6800', + 'NoConn ~ 2100 6900', + 'NoConn ~ 2100 7000', + 'NoConn ~ 2100 7100', + 'NoConn ~ 2100 7300', + 'NoConn ~ 2100 7200', + 'NoConn ~ 2100 7400', + 'NoConn ~ 2100 7500', + 'NoConn ~ 2100 7600', + 'NoConn ~ 2100 7700', + 'NoConn ~ 2100 7800', + 'NoConn ~ 2100 7900', + 'NoConn ~ 2100 8000', + 'NoConn ~ 2100 8100', + 'NoConn ~ 2100 8200', + 'NoConn ~ 2100 8300', + 'NoConn ~ 5600 5000', + 'NoConn ~ 5600 5100', + 'NoConn ~ 5600 5200', + 'NoConn ~ 5600 5300', + 'NoConn ~ 5600 5400', + 'NoConn ~ 5600 5500', + 'NoConn ~ 5600 5600', + 'NoConn ~ 5600 5700', + 'NoConn ~ 5600 5800', + 'NoConn ~ 5600 5900', + 'NoConn ~ 5600 6000', + 'NoConn ~ 5600 6100', + 'NoConn ~ 5600 6200', + 'NoConn ~ 5600 6300', + 'NoConn ~ 5600 6400', + 'NoConn ~ 5600 6500', + 'NoConn ~ 5600 6600', + 'NoConn ~ 5600 6700', + 'NoConn ~ 5600 6800', + 'NoConn ~ 5600 6900', + 'NoConn ~ 5600 7000', + 'NoConn ~ 5600 7100', + 'NoConn ~ 5600 7200', + 'NoConn ~ 5600 7400', + 'NoConn ~ 5600 7300', + 'NoConn ~ 5600 7500', + 'NoConn ~ 5600 7700', + 'NoConn ~ 5600 7600', + 'NoConn ~ 5600 7900', + 'NoConn ~ 5600 7800', + 'NoConn ~ 5600 8000', + 'NoConn ~ 5600 8100', + 'NoConn ~ 5600 8200', + 'NoConn ~ 5600 8300', + 'NoConn ~ 5600 8400', + 'NoConn ~ 5600 8500', + 'NoConn ~ 5600 8600', + 'NoConn ~ 5600 8800', + 'NoConn ~ 5600 8700', + 'NoConn ~ 5600 8900', + 'NoConn ~ 5600 9000', + 'NoConn ~ 5600 9100', + 'NoConn ~ 5600 9200', + 'NoConn ~ 5600 9300', + 'NoConn ~ 5600 9400', + 'NoConn ~ 5600 9500', + 'NoConn ~ 5600 9600', + 'NoConn ~ 5600 9800', + 'NoConn ~ 5600 9900', + 'NoConn ~ 5600 9700', + 'NoConn ~ 2100 8400', + 'NoConn ~ 2100 8500', + 'NoConn ~ 2100 8600', + 'NoConn ~ 2100 8700', + 'NoConn ~ 2100 8800', + 'NoConn ~ 2100 8900', + 'NoConn ~ 2100 9000', + 'NoConn ~ 2100 9300', + 'NoConn ~ 2100 9100', + 'NoConn ~ 2100 9200', + 'NoConn ~ 2100 9400', + 'NoConn ~ 2100 9500', + 'NoConn ~ 2100 9600', + 'NoConn ~ 2100 9700', + 'NoConn ~ 2100 9800', + 'NoConn ~ 2100 9900', + 'NoConn ~ 2100 10000'], + 'rev02_17.sch': ['NoConn ~ 1800 5700', + 'NoConn ~ 1800 5800', + 'NoConn ~ 1800 6000', + 'NoConn ~ 1800 7600', + 'NoConn ~ 1800 7800', + 'NoConn ~ 1800 7900', + 'NoConn ~ 1800 8000', + 'NoConn ~ 1800 8100', + 'NoConn ~ 1800 8200', + 'NoConn ~ 1800 8300', + 'NoConn ~ 1800 8500', + 'NoConn ~ 1800 8600', + 'NoConn ~ 1800 8900', + 'NoConn ~ 1800 9000', + 'NoConn ~ 1800 9400', + 'NoConn ~ 1800 9300', + 'NoConn ~ 1800 9700', + 'NoConn ~ 1800 9900', + 'NoConn ~ 1800 10000', + 'NoConn ~ 1800 10100', + 'NoConn ~ 6750 8200', + 'NoConn ~ 6750 8300', + 'NoConn ~ 6750 8400', + 'NoConn ~ 6750 8500', + 'NoConn ~ 6750 8600', + 'NoConn ~ 6750 8800', + 'NoConn ~ 6750 8900', + 'NoConn ~ 6750 7400', + 'NoConn ~ 6750 7200', + 'NoConn ~ 2950 5200'], + 'rev02_18.sch': ['NoConn ~ 3900 5800', + 'NoConn ~ 3900 9000', + # VCC 1V8 + 'Wire Wire Line', + ' 7000 4800 7000 4500', + '$Comp', + 'L Cryptech_Alpha:FPGA_VCCAUX_1V8 #PWR?', + 'U 1 1 5AF45C1F', + 'P 7000 4500', + 'F 0 "#PWR?" H 7000 4350 50 0001 C CNN', + 'F 1 "FPGA_VCCAUX_1V8" H 7015 4673 50 0000 C CNN', + 'F 2 "" H 7000 4500 60 0000 C CNN', + 'F 3 "" H 7000 4500 60 0000 C CNN', + ' 1 7000 4500', + ' 1 0 0 -1', + '$EndComp', + # VCC 3V3 + 'Wire Wire Line', + ' 7000 8000 7000 7800', + '$Comp', + 'L Cryptech_Alpha:VCCO_3V3 #PWR?', + 'U 1 1 5AF49BC2', + 'P 7000 7800', + 'F 0 "#PWR?" H 7000 7650 50 0001 C CNN', + 'F 1 "VCCO_3V3" H 7015 7973 50 0000 C CNN', + 'F 2 "" H 7000 7800 60 0000 C CNN', + 'F 3 "" H 7000 7800 60 0000 C CNN', + ' 1 7000 7800', + ' 1 0 0 -1', + '$EndComp', + ], + 'rev02_19.sch': ['NoConn ~ 1900 5000', + 'NoConn ~ 1900 5100', + 'NoConn ~ 1900 5900', + 'NoConn ~ 1900 6000', + 'NoConn ~ 1900 7100', + 'NoConn ~ 1900 7400', + 'NoConn ~ 1900 7600', + 'NoConn ~ 1900 7700', + 'NoConn ~ 1900 7800', + 'NoConn ~ 1900 8000', + 'NoConn ~ 1900 7900', + 'NoConn ~ 1900 8500', + 'NoConn ~ 1900 8600', + 'NoConn ~ 1900 8700', + 'NoConn ~ 1900 9000', + 'NoConn ~ 1900 9100', + 'NoConn ~ 1900 9300', + 'NoConn ~ 1900 9400', + 'NoConn ~ 1900 9500', + 'NoConn ~ 1900 9600', + 'NoConn ~ 1900 9700', + 'NoConn ~ 1900 9800', + 'NoConn ~ 1900 9900'], + 'rev02_20.sch': ['NoConn ~ 2400 5700', + 'NoConn ~ 2400 5900', + 'NoConn ~ 2400 5800', + 'NoConn ~ 2400 6000', + 'NoConn ~ 2400 6100', + 'NoConn ~ 2400 6300', + 'NoConn ~ 2400 7700', + 'NoConn ~ 2400 7900', + 'NoConn ~ 2400 8200', + 'NoConn ~ 2400 8400', + 'NoConn ~ 2400 8600', + 'NoConn ~ 2400 8700', + 'NoConn ~ 2400 8800', + 'NoConn ~ 2400 8900', + 'NoConn ~ 2400 9000', + 'NoConn ~ 2400 9100', + 'NoConn ~ 2400 9200', + 'NoConn ~ 2400 9300', + 'NoConn ~ 2400 9400', + 'NoConn ~ 2400 9500', + 'NoConn ~ 2400 9600', + 'NoConn ~ 2400 9700', + 'NoConn ~ 2400 9800', + 'NoConn ~ 2400 9900', + 'NoConn ~ 2400 5100'], + 'rev02_21.sch': [], + 'rev02_22.sch': [], + 'rev02_23.sch': [], + 'rev02_24.sch': ['NoConn ~ 5300 8100', + 'NoConn ~ 5300 8300', + 'NoConn ~ 3600 7400', + 'NoConn ~ 3600 7600', + 'NoConn ~ 3600 7800', + 'NoConn ~ 3600 8000', + 'NoConn ~ 3600 8200', + 'NoConn ~ 3600 8700', + 'NoConn ~ 5300 8700', + # VCC 1V0 symbol + 'Wire Wire Line', + ' 8300 6400 8300 6200', + '$Comp', + 'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', + 'U 1 1 5AF3F25C', + 'P 8300 6200', + 'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', + 'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', + 'F 2 "" H 8300 6200 60 0000 C CNN', + 'F 3 "" H 8300 6200 60 0000 C CNN', + ' 1 8300 6200', + ' 1 0 0 -1', + '$EndComp', + ], + 'rev02_25.sch': []} + if not comp.get(fn, []): + return + out.write('\n'.join(comp[fn])) + out.write('\n') + + +def add_components(fn_in, fn_out): + in_ = open(fn_in) + out = open(fn_out, 'w') + prev = None + fn = os.path.basename(fn_in) + print('Adding components to {}'.format(fn)) + for line in in_.readlines(): + #print('R: {!r}'.format(line)) + if line.startswith('$EndSCHEMATC'): + print_lines(fn, out) + out.write(line) + return True + + +def main(schemas): + for this in schemas: + fn = os.path.basename(this) + if add_components(this, this + '.tmp'): + os.rename(this + '.tmp', this) + + return True + + +if __name__ == '__main__': + try: + if len(sys.argv) == 0: + sys.stderr.write('Syntax: add-components.py *.sch\n') + sys.exit(1) + schemas = [x for x in sys.argv if x.endswith('.sch')] + res = main(schemas) + if res: + sys.exit(0) + sys.exit(1) + except KeyboardInterrupt: + pass -- cgit v1.2.3 From cbc587763757e94e0198b4dd5cfe5477fb41c476 Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Wed, 9 May 2018 13:52:45 +0200 Subject: Add NoConn, some power components and fix some symbols. 20 DRC warnings left. --- add-components.py | 55 ++++++++++++++++++++++++++++++++++++++----------------- 1 file changed, 38 insertions(+), 17 deletions(-) (limited to 'add-components.py') diff --git a/add-components.py b/add-components.py index eea96b3..bc839fa 100755 --- a/add-components.py +++ b/add-components.py @@ -32,7 +32,9 @@ def print_lines(fn, out): 'rev02_02.sch': ['NoConn ~ 11500 5200', 'NoConn ~ 4250 6200'], 'rev02_03.sch': ['NoConn ~ 9100 5100', 'NoConn ~ 9100 5200', - 'NoConn ~ 9100 5300'], + 'NoConn ~ 9100 5300', + 'NoConn ~ 6800 5400', + 'NoConn ~ 13040 4330'], 'rev02_04.sch': [], 'rev02_05.sch': ['NoConn ~ 3100 5300', 'NoConn ~ 3100 5400', @@ -117,10 +119,24 @@ def print_lines(fn, out): 'NoConn ~ 7400 5000', 'NoConn ~ 7400 5100', 'NoConn ~ 7400 5200'], - 'rev02_11.sch': [], + 'rev02_11.sch': ['NoConn ~ 13200 4300', + # Mark BATT pin on JP4 as providing power + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AF61081', + 'P 13200 2500', + 'F 0 "#FLG?" H 13200 2575 50 0001 C CNN', + 'F 1 "PWR_FLAG" V 13200 2628 50 0000 L CNN', + 'F 2 "" H 13200 2500 50 0001 C CNN', + 'F 3 "~" H 13200 2500 50 0001 C CNN', + ' 1 13200 2500', + ' 0 -1 -1 0', + '$EndComp', + 'Connection ~ 13200 2500', + ], 'rev02_12.sch': ['NoConn ~ 11400 5900'], 'rev02_13.sch': [], - 'rev02_14.sch': ['NoConn ~ 5505 4800', + 'rev02_14.sch': ['NoConn ~ 5500 4800', 'NoConn ~ 5500 4900', 'NoConn ~ 2100 4800', 'NoConn ~ 2100 4900', @@ -284,7 +300,10 @@ def print_lines(fn, out): 'NoConn ~ 6750 8900', 'NoConn ~ 6750 7400', 'NoConn ~ 6750 7200', - 'NoConn ~ 2950 5200'], + 'NoConn ~ 2950 5200', + 'NoConn ~ 7900 8000', + 'NoConn ~ 7900 8100' + ], 'rev02_18.sch': ['NoConn ~ 3900 5800', 'NoConn ~ 3900 9000', # VCC 1V8 @@ -338,7 +357,8 @@ def print_lines(fn, out): 'NoConn ~ 1900 9600', 'NoConn ~ 1900 9700', 'NoConn ~ 1900 9800', - 'NoConn ~ 1900 9900'], + 'NoConn ~ 1900 9900', + 'NoConn ~ 1900 6200'], 'rev02_20.sch': ['NoConn ~ 2400 5700', 'NoConn ~ 2400 5900', 'NoConn ~ 2400 5800', @@ -363,7 +383,8 @@ def print_lines(fn, out): 'NoConn ~ 2400 9700', 'NoConn ~ 2400 9800', 'NoConn ~ 2400 9900', - 'NoConn ~ 2400 5100'], + 'NoConn ~ 2400 5100', + 'NoConn ~ 3600 6400'], 'rev02_21.sch': [], 'rev02_22.sch': [], 'rev02_23.sch': [], @@ -379,17 +400,17 @@ def print_lines(fn, out): # VCC 1V0 symbol 'Wire Wire Line', ' 8300 6400 8300 6200', - '$Comp', - 'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', - 'U 1 1 5AF3F25C', - 'P 8300 6200', - 'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', - 'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', - 'F 2 "" H 8300 6200 60 0000 C CNN', - 'F 3 "" H 8300 6200 60 0000 C CNN', - ' 1 8300 6200', - ' 1 0 0 -1', - '$EndComp', + #'$Comp', + #'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', + #'U 1 1 5AF3F25C', + #'P 8300 6200', + #'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', + #'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', + #'F 2 "" H 8300 6200 60 0000 C CNN', + #'F 3 "" H 8300 6200 60 0000 C CNN', + #' 1 8300 6200', + #' 1 0 0 -1', + #'$EndComp', ], 'rev02_25.sch': []} if not comp.get(fn, []): -- cgit v1.2.3 From 071cd256c55c4ad9b1f8918df2766d141a0da0f2 Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Wed, 9 May 2018 17:06:28 +0200 Subject: Almost ERC clean. Only three warnings about NotConn sharing pins. --- add-components.py | 240 ++++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 226 insertions(+), 14 deletions(-) (limited to 'add-components.py') diff --git a/add-components.py b/add-components.py index bc839fa..3dd3d0f 100755 --- a/add-components.py +++ b/add-components.py @@ -28,6 +28,31 @@ def print_lines(fn, out): ' 1 12300 6450', ' 1 0 0 -1 ', '$EndComp', + # Tell KiCad there is power (and GND) in the power jack + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFB973B', + 'P 2200 3300', + 'F 0 "#FLG?" H 2200 3375 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 2200 3474 50 0000 C CNN', + 'F 2 "" H 2200 3300 50 0001 C CNN', + 'F 3 "~" H 2200 3300 50 0001 C CNN', + ' 1 2200 3300', + ' 1 0 0 -1 ', + '$EndComp', + 'Connection ~ 2200 3300', + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFB98AE', + 'P 2200 3500', + 'F 0 "#FLG?" H 2200 3575 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 2200 3673 50 0000 C CNN', + 'F 2 "" H 2200 3500 50 0001 C CNN', + 'F 3 "~" H 2200 3500 50 0001 C CNN', + ' 1 2200 3500', + ' -1 0 0 1 ', + '$EndComp', + 'Connection ~ 2200 3500', ], 'rev02_02.sch': ['NoConn ~ 11500 5200', 'NoConn ~ 4250 6200'], 'rev02_03.sch': ['NoConn ~ 9100 5100', @@ -35,7 +60,19 @@ def print_lines(fn, out): 'NoConn ~ 9100 5300', 'NoConn ~ 6800 5400', 'NoConn ~ 13040 4330'], - 'rev02_04.sch': [], + 'rev02_04.sch': [# Tell KiCad there is power after the R0 resistor on the path to VBATT + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFAF93B', + 'P 2600 4000', + 'F 0 "#FLG?" H 2600 4075 50 0001 C CNN', + 'F 1 "PWR_FLAG" V 2600 4128 50 0000 L CNN', + 'F 2 "" H 2600 4000 50 0001 C CNN', + 'F 3 "~" H 2600 4000 50 0001 C CNN', + ' 1 2600 4000', + ' 0 -1 -1 0 ', + '$EndComp', + 'Connection ~ 2600 4000',], 'rev02_05.sch': ['NoConn ~ 3100 5300', 'NoConn ~ 3100 5400', 'NoConn ~ 3100 5500', @@ -101,7 +138,75 @@ def print_lines(fn, out): 'NoConn ~ 7300 5100', 'NoConn ~ 7300 5000', 'NoConn ~ 7300 4900', - 'NoConn ~ 2000 3600'], + 'NoConn ~ 2000 3600', + '$Comp', + 'L Cryptech_Alpha:FT_VPLL #PWR?', + 'U 1 1 5AF3BF7C', + 'P 7550 2600', + 'F 0 "#PWR?" H 7550 2450 50 0001 C CNN', + 'F 1 "FT_VPLL" V 7565 2727 50 0000 L CNN', + 'F 2 "" H 7550 2600 60 0000 C CNN', + 'F 3 "" H 7550 2600 60 0000 C CNN', + ' 1 7550 2600', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_VCC3V3 #PWR?', + 'U 1 1 5AF3CDAF', + 'P 6000 3600', + 'F 0 "#PWR?" H 6000 3450 50 0001 C CNN', + 'F 1 "FT_VCC3V3" V 6015 3728 50 0000 L CNN', + 'F 2 "" H 6000 3600 60 0000 C CNN', + 'F 3 "" H 6000 3600 60 0000 C CNN', + ' 1 6000 3600', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_VREGIN #PWR?', + 'U 1 1 5AF3DC52', + 'P 6000 3400', + 'F 0 "#PWR?" H 6000 3250 50 0001 C CNN', + 'F 1 "FT_VREGIN" V 6015 3527 50 0000 L CNN', + 'F 2 "" H 6000 3400 60 0000 C CNN', + 'F 3 "" H 6000 3400 60 0000 C CNN', + ' 1 6000 3400', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_VPHY #PWR?', + 'U 1 1 5AF3EA0F', + 'P 7550 2800', + 'F 0 "#PWR?" H 7550 2650 50 0001 C CNN', + 'F 1 "FT_VPHY" V 7565 2927 50 0000 L CNN', + 'F 2 "" H 7550 2800 60 0000 C CNN', + 'F 3 "" H 7550 2800 60 0000 C CNN', + ' 1 7550 2800', + ' 0 -1 -1 0 ', + '$EndComp', + # Tell KiCad there is power after the ferrite bead + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFAEA32', + 'P 8200 7700', + 'F 0 "#FLG?" H 8200 7775 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 8200 7874 50 0000 C CNN', + 'F 2 "" H 8200 7700 50 0001 C CNN', + 'F 3 "~" H 8200 7700 50 0001 C CNN', + ' 1 8200 7700', + ' 1 0 0 -1 ', + '$EndComp', + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFAEB88', + 'P 6400 7700', + 'F 0 "#FLG?" H 6400 7775 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 6400 7874 50 0000 C CNN', + 'F 2 "" H 6400 7700 50 0001 C CNN', + 'F 3 "~" H 6400 7700 50 0001 C CNN', + ' 1 6400 7700', + ' 1 0 0 -1 ', + '$EndComp', + ], 'rev02_10.sch': ['NoConn ~ 9600 4000', 'NoConn ~ 9600 4100', 'NoConn ~ 9600 4200', @@ -118,7 +223,76 @@ def print_lines(fn, out): 'NoConn ~ 2100 3700', 'NoConn ~ 7400 5000', 'NoConn ~ 7400 5100', - 'NoConn ~ 7400 5200'], + 'NoConn ~ 7400 5200', + '$Comp', + 'L Cryptech_Alpha:FT_MGMT_VPLL #PWR?', + 'U 1 1 5AF74540', + 'P 7650 2700', + 'F 0 "#PWR?" H 7650 2550 50 0001 C CNN', + 'F 1 "FT_MGMT_VPLL" V 7665 2827 50 0000 L CNN', + 'F 2 "" H 7650 2700 60 0000 C CNN', + 'F 3 "" H 7650 2700 60 0000 C CNN', + ' 1 7650 2700', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_MGMT_VPHY #PWR?', + 'U 1 1 5AF74918', + 'P 7650 2900', + 'F 0 "#PWR?" H 7650 2750 50 0001 C CNN', + 'F 1 "FT_MGMT_VPHY" V 7665 3028 50 0000 L CNN', + 'F 2 "" H 7650 2900 60 0000 C CNN', + 'F 3 "" H 7650 2900 60 0000 C CNN', + ' 1 7650 2900', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_MGMT_VREGIN #PWR?', + 'U 1 1 5AF74D26', + 'P 6100 3500', + 'F 0 "#PWR?" H 6100 3350 50 0001 C CNN', + 'F 1 "FT_MGMT_VREGIN" V 6115 3628 50 0000 L CNN', + 'F 2 "" H 6100 3500 60 0000 C CNN', + 'F 3 "" H 6100 3500 60 0000 C CNN', + ' 1 6100 3500', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_MGMT_VCC3V3 #PWR?', + 'U 1 1 5AF74F88', + 'P 6100 3700', + 'F 0 "#PWR?" H 6100 3550 50 0001 C CNN', + 'F 1 "FT_MGMT_VCC3V3" V 6115 3828 50 0000 L CNN', + 'F 2 "" H 6100 3700 60 0000 C CNN', + 'F 3 "" H 6100 3700 60 0000 C CNN', + ' 1 6100 3700', + ' 0 -1 -1 0 ', + '$EndComp', + # Tell KiCad there is power after the ferrite bead + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFA8493', + 'P 8300 7800', + 'F 0 "#FLG?" H 8300 7875 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 8300 7974 50 0000 C CNN', + 'F 2 "" H 8300 7800 50 0001 C CNN', + 'F 3 "~" H 8300 7800 50 0001 C CNN', + ' 1 8300 7800', + ' 1 0 0 -1 ', + '$EndComp', + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFA857D', + 'P 6500 7800', + 'F 0 "#FLG?" H 6500 7875 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 6500 7974 50 0000 C CNN', + 'F 2 "" H 6500 7800 50 0001 C CNN', + 'F 3 "~" H 6500 7800 50 0001 C CNN', + ' 1 6500 7800', + ' 1 0 0 -1 ', + '$EndComp', + + ], 'rev02_11.sch': ['NoConn ~ 13200 4300', # Mark BATT pin on JP4 as providing power '$Comp', @@ -334,6 +508,31 @@ def print_lines(fn, out): ' 1 7000 7800', ' 1 0 0 -1', '$EndComp', + # Tell KiCad there is power after the ferrite beads + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFA31D0', + 'P 6050 4800', + 'F 0 "#FLG?" H 6050 4875 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 6050 4974 50 0000 C CNN', + 'F 2 "" H 6050 4800 50 0001 C CNN', + 'F 3 "~" H 6050 4800 50 0001 C CNN', + ' 1 6050 4800', + ' 1 0 0 -1 ', + '$EndComp', + 'Connection ~ 6050 4800', + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFB3F33', + 'P 6050 8000', + 'F 0 "#FLG?" H 6050 8075 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 6050 8174 50 0000 C CNN', + 'F 2 "" H 6050 8000 50 0001 C CNN', + 'F 3 "~" H 6050 8000 50 0001 C CNN', + ' 1 6050 8000', + ' 1 0 0 -1 ', + '$EndComp', + 'Connection ~ 6050 8000', ], 'rev02_19.sch': ['NoConn ~ 1900 5000', 'NoConn ~ 1900 5100', @@ -400,17 +599,30 @@ def print_lines(fn, out): # VCC 1V0 symbol 'Wire Wire Line', ' 8300 6400 8300 6200', - #'$Comp', - #'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', - #'U 1 1 5AF3F25C', - #'P 8300 6200', - #'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', - #'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', - #'F 2 "" H 8300 6200 60 0000 C CNN', - #'F 3 "" H 8300 6200 60 0000 C CNN', - #' 1 8300 6200', - #' 1 0 0 -1', - #'$EndComp', + '$Comp', + 'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', + 'U 1 1 5AF3F25C', + 'P 8300 6200', + 'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', + 'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', + 'F 2 "" H 8300 6200 60 0000 C CNN', + 'F 3 "" H 8300 6200 60 0000 C CNN', + ' 1 8300 6200', + ' 1 0 0 -1', + '$EndComp', + # Tell KiCad there is power after the ferrite bead + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFA77EC', + 'P 8150 6400', + 'F 0 "#FLG?" H 8150 6475 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 8150 6574 50 0000 C CNN', + 'F 2 "" H 8150 6400 50 0001 C CNN', + 'F 3 "~" H 8150 6400 50 0001 C CNN', + ' 1 8150 6400', + ' 1 0 0 -1 ', + '$EndComp', + 'Connection ~ 8150 6400', ], 'rev02_25.sch': []} if not comp.get(fn, []): -- cgit v1.2.3