From 23f52967a2ebfbdeca07705391c1fa80538db2f5 Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Wed, 9 May 2018 10:33:40 +0200 Subject: init --- add-components.py | 435 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ convert.sh | 44 ++++++ 2 files changed, 479 insertions(+) create mode 100755 add-components.py diff --git a/add-components.py b/add-components.py new file mode 100755 index 0000000..eea96b3 --- /dev/null +++ b/add-components.py @@ -0,0 +1,435 @@ +#!/usr/bin/env python + +""" +Change all net labels from a static list into global labels +""" + +import os +import re +import sys +import pprint +from copy import copy + + +def print_lines(fn, out): + comp = {'rev02_00.sch': [], + 'rev02_01.sch': ['NoConn ~ 8700 8000', + # VCC5V0 symbol + 'Wire Wire Line', + ' 12300 6600 12300 6450', + '$Comp', + 'L Cryptech_Alpha:VCC_5V0 #PWR?', + 'U 1 1 5AF35ED8', + 'P 12300 6450', + 'F 0 "#PWR?" H 12300 6300 50 0001 C CNN', + 'F 1 "VCC_5V0" H 12315 6623 50 0000 C CNN', + 'F 2 "" H 12300 6450 60 0000 C CNN', + 'F 3 "" H 12300 6450 60 0000 C CNN', + ' 1 12300 6450', + ' 1 0 0 -1 ', + '$EndComp', + ], + 'rev02_02.sch': ['NoConn ~ 11500 5200', 'NoConn ~ 4250 6200'], + 'rev02_03.sch': ['NoConn ~ 9100 5100', + 'NoConn ~ 9100 5200', + 'NoConn ~ 9100 5300'], + 'rev02_04.sch': [], + 'rev02_05.sch': ['NoConn ~ 3100 5300', + 'NoConn ~ 3100 5400', + 'NoConn ~ 3100 5500', + 'NoConn ~ 3100 5600', + 'NoConn ~ 3100 5700', + 'NoConn ~ 3100 5800', + 'NoConn ~ 3100 6900', + 'NoConn ~ 3100 7000', + 'NoConn ~ 3100 7100', + 'NoConn ~ 3100 7700', + 'NoConn ~ 3100 7800', + 'NoConn ~ 3100 7900', + 'NoConn ~ 3100 8000', + 'NoConn ~ 3100 8100', + 'NoConn ~ 3100 8200', + 'NoConn ~ 3100 8300', + 'NoConn ~ 3100 8400', + 'NoConn ~ 6200 7600', + 'NoConn ~ 6200 7500', + 'NoConn ~ 6200 7400', + 'NoConn ~ 6200 7300', + 'NoConn ~ 6200 6900', + 'NoConn ~ 6200 6400', + 'NoConn ~ 6200 6100', + 'NoConn ~ 6200 6000', + 'NoConn ~ 6200 5900', + 'NoConn ~ 6200 5800', + 'NoConn ~ 6200 5700', + 'NoConn ~ 6200 5600', + 'NoConn ~ 6200 5500', + 'NoConn ~ 6200 5200', + 'NoConn ~ 6200 5000', + 'NoConn ~ 6200 4900', + 'NoConn ~ 6200 4800', + 'NoConn ~ 6200 4700', + 'NoConn ~ 6200 4200', + 'NoConn ~ 6200 3900', + 'NoConn ~ 6200 3800', + 'NoConn ~ 6200 3700', + 'NoConn ~ 6200 3600', + 'NoConn ~ 6200 3500', + 'NoConn ~ 6200 3400', + 'NoConn ~ 6200 3100', + 'NoConn ~ 6200 3000', + 'NoConn ~ 6200 2900', + 'NoConn ~ 6200 2800'], + 'rev02_06.sch': [], + 'rev02_07.sch': [], + 'rev02_08.sch': [], + 'rev02_09.sch': ['NoConn ~ 9500 3900', + 'NoConn ~ 9500 4000', + 'NoConn ~ 9500 4100', + 'NoConn ~ 9500 4300', + 'NoConn ~ 9500 4400', + 'NoConn ~ 9500 4500', + 'NoConn ~ 9500 4600', + 'NoConn ~ 9500 4700', + 'NoConn ~ 9500 4800', + 'NoConn ~ 9500 4900', + 'NoConn ~ 9500 5000', + 'NoConn ~ 9500 5100', + 'NoConn ~ 9500 5200', + 'NoConn ~ 7300 5100', + 'NoConn ~ 7300 5000', + 'NoConn ~ 7300 4900', + 'NoConn ~ 2000 3600'], + 'rev02_10.sch': ['NoConn ~ 9600 4000', + 'NoConn ~ 9600 4100', + 'NoConn ~ 9600 4200', + 'NoConn ~ 9600 4400', + 'NoConn ~ 9600 4500', + 'NoConn ~ 9600 4600', + 'NoConn ~ 9600 4700', + 'NoConn ~ 9600 4800', + 'NoConn ~ 9600 4900', + 'NoConn ~ 9600 5000', + 'NoConn ~ 9600 5100', + 'NoConn ~ 9600 5200', + 'NoConn ~ 9600 5300', + 'NoConn ~ 2100 3700', + 'NoConn ~ 7400 5000', + 'NoConn ~ 7400 5100', + 'NoConn ~ 7400 5200'], + 'rev02_11.sch': [], + 'rev02_12.sch': ['NoConn ~ 11400 5900'], + 'rev02_13.sch': [], + 'rev02_14.sch': ['NoConn ~ 5505 4800', + 'NoConn ~ 5500 4900', + 'NoConn ~ 2100 4800', + 'NoConn ~ 2100 4900', + 'NoConn ~ 2100 5000', + 'NoConn ~ 2100 5100', + 'NoConn ~ 2100 5200', + 'NoConn ~ 2100 5800', + 'NoConn ~ 2100 5900', + 'NoConn ~ 2100 6000', + 'NoConn ~ 2100 6100', + 'NoConn ~ 2100 6200', + 'NoConn ~ 2100 6300', + 'NoConn ~ 2100 6900', + 'NoConn ~ 2100 7000', + 'NoConn ~ 2100 7100', + 'NoConn ~ 2100 7200', + 'NoConn ~ 2100 7300', + 'NoConn ~ 2100 7400', + 'NoConn ~ 2100 7500', + 'NoConn ~ 2100 7600', + 'NoConn ~ 2100 7700', + 'NoConn ~ 2100 7800', + 'NoConn ~ 2100 7900', + 'NoConn ~ 2100 8000', + 'NoConn ~ 2100 8100', + 'NoConn ~ 2100 8300', + 'NoConn ~ 2100 8200', + 'NoConn ~ 2100 8400', + 'NoConn ~ 2100 8500', + 'NoConn ~ 2100 8600', + 'NoConn ~ 2100 8700', + 'NoConn ~ 2100 8800', + 'NoConn ~ 2100 8900'], + 'rev02_15.sch': [], + 'rev02_16.sch': ['NoConn ~ 2100 5100', + 'NoConn ~ 2100 5200', + 'NoConn ~ 2100 5300', + 'NoConn ~ 2100 5400', + 'NoConn ~ 2100 5500', + 'NoConn ~ 2100 5600', + 'NoConn ~ 2100 5700', + 'NoConn ~ 2100 5800', + 'NoConn ~ 2100 5900', + 'NoConn ~ 2100 6000', + 'NoConn ~ 2100 6100', + 'NoConn ~ 2100 6200', + 'NoConn ~ 2100 6300', + 'NoConn ~ 2100 6400', + 'NoConn ~ 2100 6500', + 'NoConn ~ 2100 6700', + 'NoConn ~ 2100 6600', + 'NoConn ~ 2100 6800', + 'NoConn ~ 2100 6900', + 'NoConn ~ 2100 7000', + 'NoConn ~ 2100 7100', + 'NoConn ~ 2100 7300', + 'NoConn ~ 2100 7200', + 'NoConn ~ 2100 7400', + 'NoConn ~ 2100 7500', + 'NoConn ~ 2100 7600', + 'NoConn ~ 2100 7700', + 'NoConn ~ 2100 7800', + 'NoConn ~ 2100 7900', + 'NoConn ~ 2100 8000', + 'NoConn ~ 2100 8100', + 'NoConn ~ 2100 8200', + 'NoConn ~ 2100 8300', + 'NoConn ~ 5600 5000', + 'NoConn ~ 5600 5100', + 'NoConn ~ 5600 5200', + 'NoConn ~ 5600 5300', + 'NoConn ~ 5600 5400', + 'NoConn ~ 5600 5500', + 'NoConn ~ 5600 5600', + 'NoConn ~ 5600 5700', + 'NoConn ~ 5600 5800', + 'NoConn ~ 5600 5900', + 'NoConn ~ 5600 6000', + 'NoConn ~ 5600 6100', + 'NoConn ~ 5600 6200', + 'NoConn ~ 5600 6300', + 'NoConn ~ 5600 6400', + 'NoConn ~ 5600 6500', + 'NoConn ~ 5600 6600', + 'NoConn ~ 5600 6700', + 'NoConn ~ 5600 6800', + 'NoConn ~ 5600 6900', + 'NoConn ~ 5600 7000', + 'NoConn ~ 5600 7100', + 'NoConn ~ 5600 7200', + 'NoConn ~ 5600 7400', + 'NoConn ~ 5600 7300', + 'NoConn ~ 5600 7500', + 'NoConn ~ 5600 7700', + 'NoConn ~ 5600 7600', + 'NoConn ~ 5600 7900', + 'NoConn ~ 5600 7800', + 'NoConn ~ 5600 8000', + 'NoConn ~ 5600 8100', + 'NoConn ~ 5600 8200', + 'NoConn ~ 5600 8300', + 'NoConn ~ 5600 8400', + 'NoConn ~ 5600 8500', + 'NoConn ~ 5600 8600', + 'NoConn ~ 5600 8800', + 'NoConn ~ 5600 8700', + 'NoConn ~ 5600 8900', + 'NoConn ~ 5600 9000', + 'NoConn ~ 5600 9100', + 'NoConn ~ 5600 9200', + 'NoConn ~ 5600 9300', + 'NoConn ~ 5600 9400', + 'NoConn ~ 5600 9500', + 'NoConn ~ 5600 9600', + 'NoConn ~ 5600 9800', + 'NoConn ~ 5600 9900', + 'NoConn ~ 5600 9700', + 'NoConn ~ 2100 8400', + 'NoConn ~ 2100 8500', + 'NoConn ~ 2100 8600', + 'NoConn ~ 2100 8700', + 'NoConn ~ 2100 8800', + 'NoConn ~ 2100 8900', + 'NoConn ~ 2100 9000', + 'NoConn ~ 2100 9300', + 'NoConn ~ 2100 9100', + 'NoConn ~ 2100 9200', + 'NoConn ~ 2100 9400', + 'NoConn ~ 2100 9500', + 'NoConn ~ 2100 9600', + 'NoConn ~ 2100 9700', + 'NoConn ~ 2100 9800', + 'NoConn ~ 2100 9900', + 'NoConn ~ 2100 10000'], + 'rev02_17.sch': ['NoConn ~ 1800 5700', + 'NoConn ~ 1800 5800', + 'NoConn ~ 1800 6000', + 'NoConn ~ 1800 7600', + 'NoConn ~ 1800 7800', + 'NoConn ~ 1800 7900', + 'NoConn ~ 1800 8000', + 'NoConn ~ 1800 8100', + 'NoConn ~ 1800 8200', + 'NoConn ~ 1800 8300', + 'NoConn ~ 1800 8500', + 'NoConn ~ 1800 8600', + 'NoConn ~ 1800 8900', + 'NoConn ~ 1800 9000', + 'NoConn ~ 1800 9400', + 'NoConn ~ 1800 9300', + 'NoConn ~ 1800 9700', + 'NoConn ~ 1800 9900', + 'NoConn ~ 1800 10000', + 'NoConn ~ 1800 10100', + 'NoConn ~ 6750 8200', + 'NoConn ~ 6750 8300', + 'NoConn ~ 6750 8400', + 'NoConn ~ 6750 8500', + 'NoConn ~ 6750 8600', + 'NoConn ~ 6750 8800', + 'NoConn ~ 6750 8900', + 'NoConn ~ 6750 7400', + 'NoConn ~ 6750 7200', + 'NoConn ~ 2950 5200'], + 'rev02_18.sch': ['NoConn ~ 3900 5800', + 'NoConn ~ 3900 9000', + # VCC 1V8 + 'Wire Wire Line', + ' 7000 4800 7000 4500', + '$Comp', + 'L Cryptech_Alpha:FPGA_VCCAUX_1V8 #PWR?', + 'U 1 1 5AF45C1F', + 'P 7000 4500', + 'F 0 "#PWR?" H 7000 4350 50 0001 C CNN', + 'F 1 "FPGA_VCCAUX_1V8" H 7015 4673 50 0000 C CNN', + 'F 2 "" H 7000 4500 60 0000 C CNN', + 'F 3 "" H 7000 4500 60 0000 C CNN', + ' 1 7000 4500', + ' 1 0 0 -1', + '$EndComp', + # VCC 3V3 + 'Wire Wire Line', + ' 7000 8000 7000 7800', + '$Comp', + 'L Cryptech_Alpha:VCCO_3V3 #PWR?', + 'U 1 1 5AF49BC2', + 'P 7000 7800', + 'F 0 "#PWR?" H 7000 7650 50 0001 C CNN', + 'F 1 "VCCO_3V3" H 7015 7973 50 0000 C CNN', + 'F 2 "" H 7000 7800 60 0000 C CNN', + 'F 3 "" H 7000 7800 60 0000 C CNN', + ' 1 7000 7800', + ' 1 0 0 -1', + '$EndComp', + ], + 'rev02_19.sch': ['NoConn ~ 1900 5000', + 'NoConn ~ 1900 5100', + 'NoConn ~ 1900 5900', + 'NoConn ~ 1900 6000', + 'NoConn ~ 1900 7100', + 'NoConn ~ 1900 7400', + 'NoConn ~ 1900 7600', + 'NoConn ~ 1900 7700', + 'NoConn ~ 1900 7800', + 'NoConn ~ 1900 8000', + 'NoConn ~ 1900 7900', + 'NoConn ~ 1900 8500', + 'NoConn ~ 1900 8600', + 'NoConn ~ 1900 8700', + 'NoConn ~ 1900 9000', + 'NoConn ~ 1900 9100', + 'NoConn ~ 1900 9300', + 'NoConn ~ 1900 9400', + 'NoConn ~ 1900 9500', + 'NoConn ~ 1900 9600', + 'NoConn ~ 1900 9700', + 'NoConn ~ 1900 9800', + 'NoConn ~ 1900 9900'], + 'rev02_20.sch': ['NoConn ~ 2400 5700', + 'NoConn ~ 2400 5900', + 'NoConn ~ 2400 5800', + 'NoConn ~ 2400 6000', + 'NoConn ~ 2400 6100', + 'NoConn ~ 2400 6300', + 'NoConn ~ 2400 7700', + 'NoConn ~ 2400 7900', + 'NoConn ~ 2400 8200', + 'NoConn ~ 2400 8400', + 'NoConn ~ 2400 8600', + 'NoConn ~ 2400 8700', + 'NoConn ~ 2400 8800', + 'NoConn ~ 2400 8900', + 'NoConn ~ 2400 9000', + 'NoConn ~ 2400 9100', + 'NoConn ~ 2400 9200', + 'NoConn ~ 2400 9300', + 'NoConn ~ 2400 9400', + 'NoConn ~ 2400 9500', + 'NoConn ~ 2400 9600', + 'NoConn ~ 2400 9700', + 'NoConn ~ 2400 9800', + 'NoConn ~ 2400 9900', + 'NoConn ~ 2400 5100'], + 'rev02_21.sch': [], + 'rev02_22.sch': [], + 'rev02_23.sch': [], + 'rev02_24.sch': ['NoConn ~ 5300 8100', + 'NoConn ~ 5300 8300', + 'NoConn ~ 3600 7400', + 'NoConn ~ 3600 7600', + 'NoConn ~ 3600 7800', + 'NoConn ~ 3600 8000', + 'NoConn ~ 3600 8200', + 'NoConn ~ 3600 8700', + 'NoConn ~ 5300 8700', + # VCC 1V0 symbol + 'Wire Wire Line', + ' 8300 6400 8300 6200', + '$Comp', + 'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', + 'U 1 1 5AF3F25C', + 'P 8300 6200', + 'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', + 'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', + 'F 2 "" H 8300 6200 60 0000 C CNN', + 'F 3 "" H 8300 6200 60 0000 C CNN', + ' 1 8300 6200', + ' 1 0 0 -1', + '$EndComp', + ], + 'rev02_25.sch': []} + if not comp.get(fn, []): + return + out.write('\n'.join(comp[fn])) + out.write('\n') + + +def add_components(fn_in, fn_out): + in_ = open(fn_in) + out = open(fn_out, 'w') + prev = None + fn = os.path.basename(fn_in) + print('Adding components to {}'.format(fn)) + for line in in_.readlines(): + #print('R: {!r}'.format(line)) + if line.startswith('$EndSCHEMATC'): + print_lines(fn, out) + out.write(line) + return True + + +def main(schemas): + for this in schemas: + fn = os.path.basename(this) + if add_components(this, this + '.tmp'): + os.rename(this + '.tmp', this) + + return True + + +if __name__ == '__main__': + try: + if len(sys.argv) == 0: + sys.stderr.write('Syntax: add-components.py *.sch\n') + sys.exit(1) + schemas = [x for x in sys.argv if x.endswith('.sch')] + res = main(schemas) + if res: + sys.exit(0) + sys.exit(1) + except KeyboardInterrupt: + pass diff --git a/convert.sh b/convert.sh index fb59cf7..fbfd6f6 100755 --- a/convert.sh +++ b/convert.sh @@ -99,6 +99,50 @@ done # Turn some labels into global labels. All labels seem to be global in Altium? ../fix-labels.py rev02*sch +# Add NotConnected and some other symbols +../add-components.py rev02*sch + +# Conversion seems to make all power pins power-input, change some to power-output +# LT3060ITS8-15 +sed -i -e 's/^X OUT 6 600 300 200 L 70 70 0 1 W$/X OUT 6 600 300 200 L 70 70 0 1 w/' Cryptech_Alpha.lib +# Voltage regulator outputs +#sed -i -e 's/^X VOUT \(.*\) W$/X VOUT \1 w/g' Cryptech_Alpha.lib +# Power jack +sed -i \ + -e 's/^X PWR 1 100 300 100 L 1 1 0 1 w$/X PWR 1 100 300 100 L 1 1 0 1 P/' \ + -e 's/^X GND 2 100 100 100 L 1 1 0 1 W$/X GND 2 100 100 100 L 1 1 0 1 P/' \ + -e 's/^X GNDBREAK 3 100 200 100 L 1 1 0 1 W$/X GNDBREAK 3 100 200 100 L 1 1 0 1 P/' \ + Cryptech_Alpha.lib +# VCCs +#sed -i \ +# -e 's/^X 3V3_BATT 1 0 0 0 U 50 50 1 1 w N$/X 3V3_BATT 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VPLL 1 0 0 0 U 50 50 1 1 w N$/X FT_VPLL 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VPHY 1 0 0 0 U 50 50 1 1 w N$/X FT_VPHY 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VREGIN 1 0 0 0 U 50 50 1 1 w N$/X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VCC3V3 1 0 0 0 U 50 50 1 1 w N$/X FT_VCC3V3 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VREGIN 1 0 0 0 U 50 50 1 1 w N$/X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N/' \ +# Cryptech_Alpha.lib + +# Fix off-grid capacitor +sed -i \ + -e 's/^X + 1 110 0 10 L 1 1 0 1 P$/X + 1 100 0 10 L 1 1 0 1 P/' \ + -e 's/^X - 2 -110 0 10 R 1 1 0 1 P$/X - 2 -100 0 10 R 1 1 0 1 P/' \ + Cryptech_Alpha.lib + +# Component attributes seem to get added in a big pile on components +grep -v \ + -e '^T 0 -80 120 50 0 1 1 10% Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 50V Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 6.3V Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 X5R Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 X7R Normal 1 C C' \ + -e '^T 0 -220 -50 50 0 1 1 5% Normal 1 C C' \ + -e '^T 0 -220 40 50 0 1 1 5% Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 16V Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 20% Normal 1 C C' \ + Cryptech_Alpha.lib > Cryptech_Alpha.lib2 +mv Cryptech_Alpha.lib2 Cryptech_Alpha.lib + # Segments on non-copper layer Eco2.User are not visible, and causes ERC warnings. # Turn them into graphical lines instead. -- cgit v1.2.3 From cbc587763757e94e0198b4dd5cfe5477fb41c476 Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Wed, 9 May 2018 13:52:45 +0200 Subject: Add NoConn, some power components and fix some symbols. 20 DRC warnings left. --- add-components.py | 55 ++++++++++++++++------- convert.sh | 73 +++++++++++++++++++++++------- fix-labels.py | 6 +-- rev03-KiCad/Cryptech_Alpha.lib | 43 +++++------------- rev03-KiCad/rev02_01.sch | 16 ++++++- rev03-KiCad/rev02_02.sch | 2 + rev03-KiCad/rev02_03.sch | 5 +++ rev03-KiCad/rev02_05.sch | 46 +++++++++++++++++++ rev03-KiCad/rev02_09.sch | 17 +++++++ rev03-KiCad/rev02_10.sch | 17 +++++++ rev03-KiCad/rev02_11.sch | 13 ++++++ rev03-KiCad/rev02_12.sch | 1 + rev03-KiCad/rev02_14.sch | 34 ++++++++++++++ rev03-KiCad/rev02_16.sch | 100 +++++++++++++++++++++++++++++++++++++++++ rev03-KiCad/rev02_17.sch | 32 +++++++++++++ rev03-KiCad/rev02_18.sch | 30 ++++++++++++- rev03-KiCad/rev02_19.sch | 24 ++++++++++ rev03-KiCad/rev02_20.sch | 26 +++++++++++ rev03-KiCad/rev02_24.sch | 11 +++++ 19 files changed, 480 insertions(+), 71 deletions(-) diff --git a/add-components.py b/add-components.py index eea96b3..bc839fa 100755 --- a/add-components.py +++ b/add-components.py @@ -32,7 +32,9 @@ def print_lines(fn, out): 'rev02_02.sch': ['NoConn ~ 11500 5200', 'NoConn ~ 4250 6200'], 'rev02_03.sch': ['NoConn ~ 9100 5100', 'NoConn ~ 9100 5200', - 'NoConn ~ 9100 5300'], + 'NoConn ~ 9100 5300', + 'NoConn ~ 6800 5400', + 'NoConn ~ 13040 4330'], 'rev02_04.sch': [], 'rev02_05.sch': ['NoConn ~ 3100 5300', 'NoConn ~ 3100 5400', @@ -117,10 +119,24 @@ def print_lines(fn, out): 'NoConn ~ 7400 5000', 'NoConn ~ 7400 5100', 'NoConn ~ 7400 5200'], - 'rev02_11.sch': [], + 'rev02_11.sch': ['NoConn ~ 13200 4300', + # Mark BATT pin on JP4 as providing power + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AF61081', + 'P 13200 2500', + 'F 0 "#FLG?" H 13200 2575 50 0001 C CNN', + 'F 1 "PWR_FLAG" V 13200 2628 50 0000 L CNN', + 'F 2 "" H 13200 2500 50 0001 C CNN', + 'F 3 "~" H 13200 2500 50 0001 C CNN', + ' 1 13200 2500', + ' 0 -1 -1 0', + '$EndComp', + 'Connection ~ 13200 2500', + ], 'rev02_12.sch': ['NoConn ~ 11400 5900'], 'rev02_13.sch': [], - 'rev02_14.sch': ['NoConn ~ 5505 4800', + 'rev02_14.sch': ['NoConn ~ 5500 4800', 'NoConn ~ 5500 4900', 'NoConn ~ 2100 4800', 'NoConn ~ 2100 4900', @@ -284,7 +300,10 @@ def print_lines(fn, out): 'NoConn ~ 6750 8900', 'NoConn ~ 6750 7400', 'NoConn ~ 6750 7200', - 'NoConn ~ 2950 5200'], + 'NoConn ~ 2950 5200', + 'NoConn ~ 7900 8000', + 'NoConn ~ 7900 8100' + ], 'rev02_18.sch': ['NoConn ~ 3900 5800', 'NoConn ~ 3900 9000', # VCC 1V8 @@ -338,7 +357,8 @@ def print_lines(fn, out): 'NoConn ~ 1900 9600', 'NoConn ~ 1900 9700', 'NoConn ~ 1900 9800', - 'NoConn ~ 1900 9900'], + 'NoConn ~ 1900 9900', + 'NoConn ~ 1900 6200'], 'rev02_20.sch': ['NoConn ~ 2400 5700', 'NoConn ~ 2400 5900', 'NoConn ~ 2400 5800', @@ -363,7 +383,8 @@ def print_lines(fn, out): 'NoConn ~ 2400 9700', 'NoConn ~ 2400 9800', 'NoConn ~ 2400 9900', - 'NoConn ~ 2400 5100'], + 'NoConn ~ 2400 5100', + 'NoConn ~ 3600 6400'], 'rev02_21.sch': [], 'rev02_22.sch': [], 'rev02_23.sch': [], @@ -379,17 +400,17 @@ def print_lines(fn, out): # VCC 1V0 symbol 'Wire Wire Line', ' 8300 6400 8300 6200', - '$Comp', - 'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', - 'U 1 1 5AF3F25C', - 'P 8300 6200', - 'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', - 'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', - 'F 2 "" H 8300 6200 60 0000 C CNN', - 'F 3 "" H 8300 6200 60 0000 C CNN', - ' 1 8300 6200', - ' 1 0 0 -1', - '$EndComp', + #'$Comp', + #'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', + #'U 1 1 5AF3F25C', + #'P 8300 6200', + #'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', + #'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', + #'F 2 "" H 8300 6200 60 0000 C CNN', + #'F 3 "" H 8300 6200 60 0000 C CNN', + #' 1 8300 6200', + #' 1 0 0 -1', + #'$EndComp', ], 'rev02_25.sch': []} if not comp.get(fn, []): diff --git a/convert.sh b/convert.sh index 56827c1..dc1795c 100755 --- a/convert.sh +++ b/convert.sh @@ -97,10 +97,15 @@ ls Cryptech*Alpha.lib rev02*sch | while read file; do sed -i -e "s#I/SN#I_SN#g" "${file}" done +# KiCad nightly has changed how symbols are located +../remap-symbols.py rev02*sch +cp ../sym-lib-table.template sym-lib-table + # Turn some labels into global labels. All labels seem to be global in Altium? ../fix-labels.py rev02*sch # Add NotConnected and some other symbols ../add-components.py rev02*sch +rm -f "Cryptech Alpha-cache.lib" # Conversion seems to make all power pins power-input, change some to power-output # LT3060ITS8-15 @@ -109,9 +114,21 @@ sed -i -e 's/^X OUT 6 600 300 200 L 70 70 0 1 W$/X OUT 6 600 300 200 L 70 70 0 1 #sed -i -e 's/^X VOUT \(.*\) W$/X VOUT \1 w/g' Cryptech_Alpha.lib # Power jack sed -i \ - -e 's/^X PWR 1 100 300 100 L 1 1 0 1 w$/X PWR 1 100 300 100 L 1 1 0 1 P/' \ - -e 's/^X GND 2 100 100 100 L 1 1 0 1 W$/X GND 2 100 100 100 L 1 1 0 1 P/' \ - -e 's/^X GNDBREAK 3 100 200 100 L 1 1 0 1 W$/X GNDBREAK 3 100 200 100 L 1 1 0 1 P/' \ + -e 's/^X PWR 1 100 300 100 L 1 1 0 1 P$/X PWR 1 100 300 100 L 1 1 0 1 w/' \ + -e 's/^X GND 2 100 100 100 L 1 1 0 1 P$/X GND 2 100 100 100 L 1 1 0 1 W/' \ + -e 's/^X GNDBREAK 3 100 200 100 L 1 1 0 1 P$/X GNDBREAK 3 100 200 100 L 1 1 0 1 W/' \ + Cryptech_Alpha.lib +# USB connector VBUS +sed -i \ + -e 's/^X VBUS VBUS 400 200 100 L 1 70 0 1 W$/X VBUS VBUS 400 200 100 L 1 70 0 1 w/' \ + Cryptech_Alpha.lib +# Mark _one_ of the seven VOUTs on the EN6347Q1 as power output instead of input, since net-ties haven't been used +sed -i \ + -e 's/^X VOUT 5 800 900 200 L 70 70 0 1 W$/X VOUT 5 800 900 200 L 70 70 0 1 w/' \ + Cryptech_Alpha.lib +# Mark _one_ of the nine VOUTs on the EN5364Q1 as power output instead of input, since net-ties haven't been used +sed -i \ + -e 's/^X VOUT 5 900 2100 200 L 70 70 0 1 W$/X VOUT 5 900 2100 200 L 70 70 0 1 w/' \ Cryptech_Alpha.lib # VCCs #sed -i \ @@ -128,26 +145,48 @@ sed -i \ -e 's/^X + 1 110 0 10 L 1 1 0 1 P$/X + 1 100 0 10 L 1 1 0 1 P/' \ -e 's/^X - 2 -110 0 10 R 1 1 0 1 P$/X - 2 -100 0 10 R 1 1 0 1 P/' \ Cryptech_Alpha.lib +# Fix off-grid oscillator +sed -i \ + -e 's/^X 1 1 -110 0 10 R 1 1 0 1 P$/X 1 1 -100 0 10 R 1 1 0 1 P/' \ + -e 's/^X 3 3 110 0 10 L 1 1 0 1 P$/X 3 3 100 0 10 L 1 1 0 1 P/' \ + Cryptech_Alpha.lib # Component attributes seem to get added in a big pile on components -grep -v \ - -e '^T 0 -80 120 50 0 1 1 10% Normal 1 C C' \ - -e '^T 0 -80 120 50 0 1 1 50V Normal 1 C C' \ - -e '^T 0 -80 120 50 0 1 1 6.3V Normal 1 C C' \ - -e '^T 0 -80 120 50 0 1 1 X5R Normal 1 C C' \ - -e '^T 0 -80 120 50 0 1 1 X7R Normal 1 C C' \ - -e '^T 0 -220 -50 50 0 1 1 5% Normal 1 C C' \ - -e '^T 0 -220 40 50 0 1 1 5% Normal 1 C C' \ - -e '^T 0 -80 120 50 0 1 1 16V Normal 1 C C' \ - -e '^T 0 -80 120 50 0 1 1 20% Normal 1 C C' \ +grep -vx \ + -e 'T 0 -80 120 50 0 1 1 10% Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 50V Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 6.3V Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 X5R Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 X7R Normal 1 C C' \ + -e 'T 0 -220 -50 50 0 1 1 5% Normal 1 C C' \ + -e 'T 0 -220 40 50 0 1 1 5% Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 16V Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 20% Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 10% Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 50V Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 6.3V Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 X5R Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 X7R Normal 1 C C' \ + -e 'T 0 -520 210 50 0 1 1 2058982 Normal 1 C C' \ + -e 'T 0 -520 210 50 0 1 1 RCLAMP0502A Normal 1 C C' \ + -e 'T 0 -520 210 50 0 1 1 SEMTECH Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 10% Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 16V Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 20% Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 50V Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 X5R Normal 1 C C' \ + -e 'T 0 -80 120 50 0 1 1 X7R Normal 1 C C' \ + -e 'T 0 -820 1510 50 0 1 1 2081142 Normal 1 C C' \ + -e 'T 0 -820 1510 50 0 1 1 EN5364QI Normal 1 C C' \ + -e 'T 0 -820 1510 50 0 1 1 ENPIRION Normal 1 C C' \ + -e 'T 0 -820 1510 50 0 1 1 QFN Normal 1 C C' \ + -e 'T 0 -220 -50 50 0 1 1 5% Normal 1 C C' \ + -e 'T 0 -220 40 50 0 1 1 5% Normal 1 C C' \ + -e 'T 0 -410 420 50 0 1 1 2425618 Normal 1 C C' \ Cryptech_Alpha.lib > Cryptech_Alpha.lib2 mv Cryptech_Alpha.lib2 Cryptech_Alpha.lib -# KiCad nightly has changed how symbols are located -../remap-symbols.py rev02*sch -cp ../sym-lib-table.template sym-lib-table - # Segments on non-copper layer Eco2.User are not visible, and causes ERC warnings. # Turn them into graphical lines instead. sed -i -e 's/segment \(.*\)layer Eco2.User.*/gr_line \1layer Eco2.User\)\)/g' Cryptech\ Alpha.kicad_pcb diff --git a/fix-labels.py b/fix-labels.py index 225159d..fa5f823 100755 --- a/fix-labels.py +++ b/fix-labels.py @@ -16,7 +16,7 @@ labels = { 'rev02_01.sch': { #'15V_LDO_ENABLE': [{'t': 'GLabel', 'dir': 'UnSpc', 'x': 9000, 'y': 3100, 'ori': 0},], 'FPGA_ENTROPY_DISABLE': [{'t': 'GLabel', 'dir': 'Input', 'x': 5450, 'y': 3550, 'ori': 0},], - 'VCC_5V0': [{'t': 'GLabel', 'dir': 'Output', 'x': 11800, 'y': 6600, 'ori': 2, 'new_x': 12300},], + 'VCC_5V0': [{'t': 'Label', 'x': 11800, 'y': 6600, 'ori': 2, 'new_x': 12300},], }, 'rev02_02.sch': { 'AMPLIFIED': [#{'t': 'GLabel', 'dir': 'UnSpc', 'x': 10300, 'y': 5000, 'ori': 0}, @@ -532,7 +532,7 @@ labels = { 'POK_VCCO': [{'t': 'GLabel', 'dir': 'Output', 'x': 4000, 'y': 9700, 'ori': 2},], 'PWR_ENA_VCCAUX': [{'t': 'GLabel', 'dir': 'Input', 'x': 1900, 'y': 4740, 'ori': 0, 'new_y': 4150},], 'PWR_ENA_VCCO': [{'t': 'GLabel', 'dir': 'Input', 'x': 1400, 'y': 7500, 'ori': 0},], - 'VCCO_3V3': [{'t': 'GLabel', 'dir': 'Output', 'x': 6100, 'y': 8000, 'ori': 2, 'new_x': 7000},], + 'VCCO_3V3': [{'t': 'Label', 'x': 6100, 'y': 8000, 'ori': 2, 'new_x': 7000},], }, 'rev02_19.sch': { 'AVR_GPIO_FPGA_0': [{'t': 'GLabel', 'dir': 'UnSpc', 'x': 2100, 'y': 8100, 'ori': 2, 'new_x': 3100},], @@ -611,7 +611,7 @@ labels = { 'FPGA_GPIO_LED_3': [{'t': 'GLabel', 'dir': 'Output', 'x': 2470, 'y': 6600, 'ori': 2, 'new_x': 3600},], }, 'rev02_24.sch': { - 'FPGA_VCCINT_1V0': [{'t': 'GLabel', 'dir': 'Output', 'x': 8300, 'y': 6400, 'ori': 2},], + 'FPGA_VCCINT_1V0': [{'t': 'Label', 'x': 8300, 'y': 6400, 'ori': 2},], 'POK_VCCINT': [{'t': 'GLabel', 'dir': 'Output', 'x': 5350, 'y': 9100, 'ori': 2, 'new_x': 5600},], 'PWR_ENA_VCCINT': [{'t': 'GLabel', 'dir': 'Input', 'x': 2700, 'y': 5900, 'ori': 0},], }, diff --git a/rev03-KiCad/Cryptech_Alpha.lib b/rev03-KiCad/Cryptech_Alpha.lib index 9e40e2c..1016278 100644 --- a/rev03-KiCad/Cryptech_Alpha.lib +++ b/rev03-KiCad/Cryptech_Alpha.lib @@ -656,11 +656,6 @@ X 1 1 0 100 100 D 1 1 0 1 P X 2 2 0 -200 100 U 1 1 0 1 P S -80 -80 80 -60 0 1 10 f S -80 -40 80 -20 0 1 10 f -T 0 -80 120 50 0 1 1 X7R Normal 1 C C -T 0 -80 120 50 0 1 1 50V Normal 1 C C -T 0 -80 120 50 0 1 1 10% Normal 1 C C -T 0 -80 120 50 0 1 1 X5R Normal 1 C C -T 0 -80 120 50 0 1 1 6.3V Normal 1 C C ENDDRAW ENDDEF # @@ -695,12 +690,6 @@ S -80 -80 80 -60 0 1 10 f S -80 -40 80 -20 0 1 10 f X 1 1 0 100 100 D 1 1 0 1 P X 2 2 0 -200 100 U 1 1 0 1 P -T 0 -80 120 50 0 1 1 X7R Normal 1 C C -T 0 -80 120 50 0 1 1 50V Normal 1 C C -T 0 -80 120 50 0 1 1 10% Normal 1 C C -T 0 -80 120 50 0 1 1 X5R Normal 1 C C -T 0 -80 120 50 0 1 1 16V Normal 1 C C -T 0 -80 120 50 0 1 1 20% Normal 1 C C ENDDRAW ENDDEF # @@ -719,8 +708,8 @@ P 2 0 1 10 -20 0 -20 0 P 2 0 1 10 -100 0 -20 0 A -120 10 98 -382 -4 1 1 20 N -42 -50 -22 9 A -120 0 98 0 374 1 1 20 N -22 0 -42 59 -X - 2 -110 0 10 R 1 1 0 1 P -X + 1 110 0 10 L 1 1 0 1 P +X - 2 -100 0 10 R 1 1 0 1 P +X + 1 100 0 10 L 1 1 0 1 P ENDDRAW ENDDEF # @@ -782,7 +771,7 @@ F3 "" 0 0 60 H V C CNN DRAW X REF/BYP 8 600 -300 200 L 70 70 0 1 P X ADJ 7 600 0 200 L 70 70 0 1 P -X OUT 6 600 300 200 L 70 70 0 1 W +X OUT 6 600 300 200 L 70 70 0 1 w X IN 5 -600 300 200 R 70 70 0 1 W X ~SHDN 1 -600 0 200 R 70 70 0 1 P X GND 2 -600 -300 200 R 70 70 0 1 W @@ -812,9 +801,9 @@ P 2 0 1 10 0 100 -100 100 P 2 0 1 10 -100 200 -100 100 P 2 0 1 10 0 200 -100 200 S -400 270 0 330 0 1 10 f -X GNDBREAK 3 100 200 100 L 1 1 0 1 P -X GND 2 100 100 100 L 1 1 0 1 P -X PWR 1 100 300 100 L 1 1 0 1 P +X GNDBREAK 3 100 200 100 L 1 1 0 1 W +X GND 2 100 100 100 L 1 1 0 1 W +X PWR 1 100 300 100 L 1 1 0 1 w ENDDRAW ENDDEF # @@ -832,8 +821,6 @@ P 2 0 1 10 100 30 100 -40 P 2 0 1 10 -100 30 -100 -40 X 2 2 200 0 100 L 1 1 0 1 P X 1 1 -200 0 100 R 1 1 0 1 P -T 0 -220 -50 50 0 1 1 5% Normal 1 C C -T 0 -220 40 50 0 1 1 5% Normal 1 C C P 2 0 1 10 100 -30 -100 -30 P 2 0 1 10 -100 40 100 40 P 2 0 1 10 100 40 100 -30 @@ -1578,8 +1565,8 @@ P 2 0 1 10 40 0 40 70 P 2 0 1 10 40 -70 40 0 P 2 0 1 10 -40 0 -100 0 P 2 0 1 10 40 0 100 0 -X 1 1 -110 0 10 R 1 1 0 1 P -X 3 3 110 0 10 L 1 1 0 1 P +X 1 1 -100 0 10 R 1 1 0 1 P +X 3 3 100 0 10 L 1 1 0 1 P X 2 2 -100 -100 100 R 1 1 0 1 P X 4 4 100 -100 100 L 1 1 0 1 P ENDDRAW @@ -1735,9 +1722,6 @@ X OUT2 3 500 -100 100 L 70 70 0 1 O X IN2 4 -500 -100 100 R 70 70 0 1 P X VCC 5 -500 0 100 R 70 70 0 1 W X IN1 6 -500 100 100 R 70 70 0 1 P -T 0 -520 210 50 0 1 1 SEMTECH Normal 1 C C -T 0 -520 210 50 0 1 1 RCLAMP0502A Normal 1 C C -T 0 -520 210 50 0 1 1 2058982 Normal 1 C C ENDDRAW ENDDEF # @@ -1781,7 +1765,7 @@ A -240 120 8 1200 -1200 1 1 30 N -244 126 -244 113 A -240 120 8 -1200 0 1 1 30 N -244 113 -232 120 X D+ D+ 400 100 100 L 1 70 0 1 P X D- D- 400 0 100 L 1 70 0 1 P -X VBUS VBUS 400 200 100 L 1 70 0 1 W +X VBUS VBUS 400 200 100 L 1 70 0 1 w X GND GND 400 -200 100 L 1 70 0 1 W X ID ID 400 -100 100 L 1 70 0 1 P ENDDRAW @@ -2003,7 +1987,6 @@ X B1 B1 300 400 200 D 70 1 0 1 P X B2 B2 300 -400 200 U 70 1 0 1 P X G1 G1 600 100 200 L 70 1 0 1 W X G2 G2 600 -100 200 L 70 1 0 1 W -T 0 -410 420 50 0 1 1 2425618 Normal 1 C C ENDDRAW ENDDEF # @@ -2689,7 +2672,7 @@ X RLLM 29 -800 -300 200 R 70 70 0 1 P X PVIN 20 -800 800 200 R 70 70 0 1 W X PVIN 19 -800 900 200 R 70 70 0 1 W X VOUT 6 800 800 200 L 70 70 0 1 W -X VOUT 5 800 900 200 L 70 70 0 1 W +X VOUT 5 800 900 200 L 70 70 0 1 w X VOUT 10 800 400 200 L 70 70 0 1 W X VOUT 9 800 500 200 L 70 70 0 1 W X VOUT 8 800 600 200 L 70 70 0 1 W @@ -3087,10 +3070,6 @@ F1 "EN5364QI" 110 2330 60 H V L BNN F2 "" 0 0 60 H V C CNN F3 "" 0 0 60 H V C CNN DRAW -T 0 -820 1510 50 0 1 1 EN5364QI Normal 1 C C -T 0 -820 1510 50 0 1 1 2081142 Normal 1 C C -T 0 -820 1510 50 0 1 1 QFN Normal 1 C C -T 0 -820 1510 50 0 1 1 ENPIRION Normal 1 C C X NC 15 900 -1000 200 L 70 70 0 1 P X NC 16 900 -1000 200 L 70 70 0 1 P X NC 17 900 -1000 200 L 70 70 0 1 P @@ -3150,7 +3129,7 @@ X M/S 50 -800 300 200 R 70 70 0 1 P X NC 14 900 -1000 200 L 1 70 0 1 P X VOUT 12 900 1400 200 L 70 70 0 1 W X VOUT 11 900 1500 200 L 70 70 0 1 W -X VOUT 5 900 2100 200 L 70 70 0 1 W +X VOUT 5 900 2100 200 L 70 70 0 1 w X VOUT 6 900 2000 200 L 70 70 0 1 W X VOUT 7 900 1900 200 L 70 70 0 1 W X VOUT 8 900 1800 200 L 70 70 0 1 W diff --git a/rev03-KiCad/rev02_01.sch b/rev03-KiCad/rev02_01.sch index a635c2d..caaa6af 100644 --- a/rev03-KiCad/rev02_01.sch +++ b/rev03-KiCad/rev02_01.sch @@ -503,7 +503,7 @@ Wire Wire Line 12300 6600 11400 6600 Wire Wire Line 9600 6600 9600 6800 -Text GLabel 12300 6600 2 48 Output ~ 0 +Text Label 12300 6600 2 48 ~ 0 VCC_5V0 Connection ~ 9200 6600 Connection ~ 10200 6600 @@ -824,4 +824,18 @@ F 3 "" H 9200 7770 60 0000 C CNN 1 9200 7700 0 -1 -1 0 $EndComp +NoConn ~ 8700 8000 +Wire Wire Line + 12300 6600 12300 6450 +$Comp +L Cryptech_Alpha:VCC_5V0 #PWR? +U 1 1 5AF35ED8 +P 12300 6450 +F 0 "#PWR?" H 12300 6300 50 0001 C CNN +F 1 "VCC_5V0" H 12315 6623 50 0000 C CNN +F 2 "" H 12300 6450 60 0000 C CNN +F 3 "" H 12300 6450 60 0000 C CNN + 1 12300 6450 + 1 0 0 -1 +$EndComp $EndSCHEMATC diff --git a/rev03-KiCad/rev02_02.sch b/rev03-KiCad/rev02_02.sch index b15c91e..99ca575 100644 --- a/rev03-KiCad/rev02_02.sch +++ b/rev03-KiCad/rev02_02.sch @@ -383,4 +383,6 @@ F 3 "" H 8270 4530 60 0000 C CNN 1 8500 4700 1 0 0 -1 $EndComp +NoConn ~ 11500 5200 +NoConn ~ 4250 6200 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_03.sch b/rev03-KiCad/rev02_03.sch index b50d6aa..033a74d 100644 --- a/rev03-KiCad/rev02_03.sch +++ b/rev03-KiCad/rev02_03.sch @@ -481,4 +481,9 @@ F 3 "" H 13160 5560 60 0000 C CNN 1 13200 6800 0 -1 -1 0 $EndComp +NoConn ~ 9100 5100 +NoConn ~ 9100 5200 +NoConn ~ 9100 5300 +NoConn ~ 6800 5400 +NoConn ~ 13040 4330 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_05.sch b/rev03-KiCad/rev02_05.sch index 06866b5..165f622 100644 --- a/rev03-KiCad/rev02_05.sch +++ b/rev03-KiCad/rev02_05.sch @@ -625,4 +625,50 @@ F 0 "U4_4" H 3190 2390 60 0000 L BNN 1 0 0 -1 F 2 "Cryptech_Alpha_Footprints:TSQFP50P3000X3000X160-208N" H 3190 2390 60 0001 C CNN $EndComp +NoConn ~ 3100 5300 +NoConn ~ 3100 5400 +NoConn ~ 3100 5500 +NoConn ~ 3100 5600 +NoConn ~ 3100 5700 +NoConn ~ 3100 5800 +NoConn ~ 3100 6900 +NoConn ~ 3100 7000 +NoConn ~ 3100 7100 +NoConn ~ 3100 7700 +NoConn ~ 3100 7800 +NoConn ~ 3100 7900 +NoConn ~ 3100 8000 +NoConn ~ 3100 8100 +NoConn ~ 3100 8200 +NoConn ~ 3100 8300 +NoConn ~ 3100 8400 +NoConn ~ 6200 7600 +NoConn ~ 6200 7500 +NoConn ~ 6200 7400 +NoConn ~ 6200 7300 +NoConn ~ 6200 6900 +NoConn ~ 6200 6400 +NoConn ~ 6200 6100 +NoConn ~ 6200 6000 +NoConn ~ 6200 5900 +NoConn ~ 6200 5800 +NoConn ~ 6200 5700 +NoConn ~ 6200 5600 +NoConn ~ 6200 5500 +NoConn ~ 6200 5200 +NoConn ~ 6200 5000 +NoConn ~ 6200 4900 +NoConn ~ 6200 4800 +NoConn ~ 6200 4700 +NoConn ~ 6200 4200 +NoConn ~ 6200 3900 +NoConn ~ 6200 3800 +NoConn ~ 6200 3700 +NoConn ~ 6200 3600 +NoConn ~ 6200 3500 +NoConn ~ 6200 3400 +NoConn ~ 6200 3100 +NoConn ~ 6200 3000 +NoConn ~ 6200 2900 +NoConn ~ 6200 2800 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_09.sch b/rev03-KiCad/rev02_09.sch index 6ee6d36..5a6ae29 100644 --- a/rev03-KiCad/rev02_09.sch +++ b/rev03-KiCad/rev02_09.sch @@ -1012,4 +1012,21 @@ F 3 "" H 4990 8020 60 0000 C CNN 1 4900 8000 1 0 0 -1 $EndComp +NoConn ~ 9500 3900 +NoConn ~ 9500 4000 +NoConn ~ 9500 4100 +NoConn ~ 9500 4300 +NoConn ~ 9500 4400 +NoConn ~ 9500 4500 +NoConn ~ 9500 4600 +NoConn ~ 9500 4700 +NoConn ~ 9500 4800 +NoConn ~ 9500 4900 +NoConn ~ 9500 5000 +NoConn ~ 9500 5100 +NoConn ~ 9500 5200 +NoConn ~ 7300 5100 +NoConn ~ 7300 5000 +NoConn ~ 7300 4900 +NoConn ~ 2000 3600 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_10.sch b/rev03-KiCad/rev02_10.sch index 7fdd729..ffe7fd1 100644 --- a/rev03-KiCad/rev02_10.sch +++ b/rev03-KiCad/rev02_10.sch @@ -1016,4 +1016,21 @@ F 3 "" H 5100 8110 60 0000 C CNN 1 5000 8100 1 0 0 -1 $EndComp +NoConn ~ 9600 4000 +NoConn ~ 9600 4100 +NoConn ~ 9600 4200 +NoConn ~ 9600 4400 +NoConn ~ 9600 4500 +NoConn ~ 9600 4600 +NoConn ~ 9600 4700 +NoConn ~ 9600 4800 +NoConn ~ 9600 4900 +NoConn ~ 9600 5000 +NoConn ~ 9600 5100 +NoConn ~ 9600 5200 +NoConn ~ 9600 5300 +NoConn ~ 2100 3700 +NoConn ~ 7400 5000 +NoConn ~ 7400 5100 +NoConn ~ 7400 5200 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_11.sch b/rev03-KiCad/rev02_11.sch index 8dd8b65..7b24ddf 100644 --- a/rev03-KiCad/rev02_11.sch +++ b/rev03-KiCad/rev02_11.sch @@ -731,4 +731,17 @@ F 3 "" H 13960 7920 60 0000 C CNN 1 14000 8900 0 -1 -1 0 $EndComp +NoConn ~ 13200 4300 +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AF61081 +P 13200 2500 +F 0 "#FLG?" H 13200 2575 50 0001 C CNN +F 1 "PWR_FLAG" V 13200 2628 50 0000 L CNN +F 2 "" H 13200 2500 50 0001 C CNN +F 3 "~" H 13200 2500 50 0001 C CNN + 1 13200 2500 + 0 -1 -1 0 +$EndComp +Connection ~ 13200 2500 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_12.sch b/rev03-KiCad/rev02_12.sch index 3f79ae4..2b33e1f 100644 --- a/rev03-KiCad/rev02_12.sch +++ b/rev03-KiCad/rev02_12.sch @@ -426,4 +426,5 @@ F 3 "" H 5500 5820 60 0000 C CNN 1 5800 5400 1 0 0 -1 $EndComp +NoConn ~ 11400 5900 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_14.sch b/rev03-KiCad/rev02_14.sch index 4995812..00feba2 100644 --- a/rev03-KiCad/rev02_14.sch +++ b/rev03-KiCad/rev02_14.sch @@ -153,4 +153,38 @@ F 0 "U13_6" H 4890 4390 60 0000 L BNN 1 0 0 -1 F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 4890 4390 60 0001 C CNN $EndComp +NoConn ~ 5500 4800 +NoConn ~ 5500 4900 +NoConn ~ 2100 4800 +NoConn ~ 2100 4900 +NoConn ~ 2100 5000 +NoConn ~ 2100 5100 +NoConn ~ 2100 5200 +NoConn ~ 2100 5800 +NoConn ~ 2100 5900 +NoConn ~ 2100 6000 +NoConn ~ 2100 6100 +NoConn ~ 2100 6200 +NoConn ~ 2100 6300 +NoConn ~ 2100 6900 +NoConn ~ 2100 7000 +NoConn ~ 2100 7100 +NoConn ~ 2100 7200 +NoConn ~ 2100 7300 +NoConn ~ 2100 7400 +NoConn ~ 2100 7500 +NoConn ~ 2100 7600 +NoConn ~ 2100 7700 +NoConn ~ 2100 7800 +NoConn ~ 2100 7900 +NoConn ~ 2100 8000 +NoConn ~ 2100 8100 +NoConn ~ 2100 8300 +NoConn ~ 2100 8200 +NoConn ~ 2100 8400 +NoConn ~ 2100 8500 +NoConn ~ 2100 8600 +NoConn ~ 2100 8700 +NoConn ~ 2100 8800 +NoConn ~ 2100 8900 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_16.sch b/rev03-KiCad/rev02_16.sch index fb9db7c..7c6e0ac 100644 --- a/rev03-KiCad/rev02_16.sch +++ b/rev03-KiCad/rev02_16.sch @@ -111,4 +111,104 @@ F 0 "U13_8" H 4990 4090 60 0000 L BNN 1 0 0 -1 F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 4990 4090 60 0001 C CNN $EndComp +NoConn ~ 2100 5100 +NoConn ~ 2100 5200 +NoConn ~ 2100 5300 +NoConn ~ 2100 5400 +NoConn ~ 2100 5500 +NoConn ~ 2100 5600 +NoConn ~ 2100 5700 +NoConn ~ 2100 5800 +NoConn ~ 2100 5900 +NoConn ~ 2100 6000 +NoConn ~ 2100 6100 +NoConn ~ 2100 6200 +NoConn ~ 2100 6300 +NoConn ~ 2100 6400 +NoConn ~ 2100 6500 +NoConn ~ 2100 6700 +NoConn ~ 2100 6600 +NoConn ~ 2100 6800 +NoConn ~ 2100 6900 +NoConn ~ 2100 7000 +NoConn ~ 2100 7100 +NoConn ~ 2100 7300 +NoConn ~ 2100 7200 +NoConn ~ 2100 7400 +NoConn ~ 2100 7500 +NoConn ~ 2100 7600 +NoConn ~ 2100 7700 +NoConn ~ 2100 7800 +NoConn ~ 2100 7900 +NoConn ~ 2100 8000 +NoConn ~ 2100 8100 +NoConn ~ 2100 8200 +NoConn ~ 2100 8300 +NoConn ~ 5600 5000 +NoConn ~ 5600 5100 +NoConn ~ 5600 5200 +NoConn ~ 5600 5300 +NoConn ~ 5600 5400 +NoConn ~ 5600 5500 +NoConn ~ 5600 5600 +NoConn ~ 5600 5700 +NoConn ~ 5600 5800 +NoConn ~ 5600 5900 +NoConn ~ 5600 6000 +NoConn ~ 5600 6100 +NoConn ~ 5600 6200 +NoConn ~ 5600 6300 +NoConn ~ 5600 6400 +NoConn ~ 5600 6500 +NoConn ~ 5600 6600 +NoConn ~ 5600 6700 +NoConn ~ 5600 6800 +NoConn ~ 5600 6900 +NoConn ~ 5600 7000 +NoConn ~ 5600 7100 +NoConn ~ 5600 7200 +NoConn ~ 5600 7400 +NoConn ~ 5600 7300 +NoConn ~ 5600 7500 +NoConn ~ 5600 7700 +NoConn ~ 5600 7600 +NoConn ~ 5600 7900 +NoConn ~ 5600 7800 +NoConn ~ 5600 8000 +NoConn ~ 5600 8100 +NoConn ~ 5600 8200 +NoConn ~ 5600 8300 +NoConn ~ 5600 8400 +NoConn ~ 5600 8500 +NoConn ~ 5600 8600 +NoConn ~ 5600 8800 +NoConn ~ 5600 8700 +NoConn ~ 5600 8900 +NoConn ~ 5600 9000 +NoConn ~ 5600 9100 +NoConn ~ 5600 9200 +NoConn ~ 5600 9300 +NoConn ~ 5600 9400 +NoConn ~ 5600 9500 +NoConn ~ 5600 9600 +NoConn ~ 5600 9800 +NoConn ~ 5600 9900 +NoConn ~ 5600 9700 +NoConn ~ 2100 8400 +NoConn ~ 2100 8500 +NoConn ~ 2100 8600 +NoConn ~ 2100 8700 +NoConn ~ 2100 8800 +NoConn ~ 2100 8900 +NoConn ~ 2100 9000 +NoConn ~ 2100 9300 +NoConn ~ 2100 9100 +NoConn ~ 2100 9200 +NoConn ~ 2100 9400 +NoConn ~ 2100 9500 +NoConn ~ 2100 9600 +NoConn ~ 2100 9700 +NoConn ~ 2100 9800 +NoConn ~ 2100 9900 +NoConn ~ 2100 10000 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_17.sch b/rev03-KiCad/rev02_17.sch index 4ddc072..79be203 100644 --- a/rev03-KiCad/rev02_17.sch +++ b/rev03-KiCad/rev02_17.sch @@ -337,4 +337,36 @@ F 0 "U13_10" H 1190 4290 60 0000 L BNN 1 0 0 -1 F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1190 4290 60 0001 C CNN $EndComp +NoConn ~ 1800 5700 +NoConn ~ 1800 5800 +NoConn ~ 1800 6000 +NoConn ~ 1800 7600 +NoConn ~ 1800 7800 +NoConn ~ 1800 7900 +NoConn ~ 1800 8000 +NoConn ~ 1800 8100 +NoConn ~ 1800 8200 +NoConn ~ 1800 8300 +NoConn ~ 1800 8500 +NoConn ~ 1800 8600 +NoConn ~ 1800 8900 +NoConn ~ 1800 9000 +NoConn ~ 1800 9400 +NoConn ~ 1800 9300 +NoConn ~ 1800 9700 +NoConn ~ 1800 9900 +NoConn ~ 1800 10000 +NoConn ~ 1800 10100 +NoConn ~ 6750 8200 +NoConn ~ 6750 8300 +NoConn ~ 6750 8400 +NoConn ~ 6750 8500 +NoConn ~ 6750 8600 +NoConn ~ 6750 8800 +NoConn ~ 6750 8900 +NoConn ~ 6750 7400 +NoConn ~ 6750 7200 +NoConn ~ 2950 5200 +NoConn ~ 7900 8000 +NoConn ~ 7900 8100 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_18.sch b/rev03-KiCad/rev02_18.sch index 634d960..76b9301 100644 --- a/rev03-KiCad/rev02_18.sch +++ b/rev03-KiCad/rev02_18.sch @@ -309,7 +309,7 @@ Text GLabel 7000 4800 2 48 Output ~ 0 FPGA_VCCAUX_1V8 Wire Wire Line 7000 8000 6000 8000 -Text GLabel 7000 8000 2 48 Output ~ 0 +Text Label 7000 8000 2 48 ~ 0 VCCO_3V3 Wire Wire Line 2100 6200 2100 6300 @@ -760,4 +760,32 @@ F 3 "" H 1570 9470 60 0000 C CNN 1 1600 9600 0 -1 -1 0 $EndComp +NoConn ~ 3900 5800 +NoConn ~ 3900 9000 +Wire Wire Line + 7000 4800 7000 4500 +$Comp +L Cryptech_Alpha:FPGA_VCCAUX_1V8 #PWR? +U 1 1 5AF45C1F +P 7000 4500 +F 0 "#PWR?" H 7000 4350 50 0001 C CNN +F 1 "FPGA_VCCAUX_1V8" H 7015 4673 50 0000 C CNN +F 2 "" H 7000 4500 60 0000 C CNN +F 3 "" H 7000 4500 60 0000 C CNN + 1 7000 4500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7000 8000 7000 7800 +$Comp +L Cryptech_Alpha:VCCO_3V3 #PWR? +U 1 1 5AF49BC2 +P 7000 7800 +F 0 "#PWR?" H 7000 7650 50 0001 C CNN +F 1 "VCCO_3V3" H 7015 7973 50 0000 C CNN +F 2 "" H 7000 7800 60 0000 C CNN +F 3 "" H 7000 7800 60 0000 C CNN + 1 7000 7800 + 1 0 0 -1 +$EndComp $EndSCHEMATC diff --git a/rev03-KiCad/rev02_19.sch b/rev03-KiCad/rev02_19.sch index f29921c..f0db4ae 100644 --- a/rev03-KiCad/rev02_19.sch +++ b/rev03-KiCad/rev02_19.sch @@ -604,4 +604,28 @@ F 0 "U13_11" H 1290 4090 60 0000 L BNN 1 0 0 -1 F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1290 4090 60 0001 C CNN $EndComp +NoConn ~ 1900 5000 +NoConn ~ 1900 5100 +NoConn ~ 1900 5900 +NoConn ~ 1900 6000 +NoConn ~ 1900 7100 +NoConn ~ 1900 7400 +NoConn ~ 1900 7600 +NoConn ~ 1900 7700 +NoConn ~ 1900 7800 +NoConn ~ 1900 8000 +NoConn ~ 1900 7900 +NoConn ~ 1900 8500 +NoConn ~ 1900 8600 +NoConn ~ 1900 8700 +NoConn ~ 1900 9000 +NoConn ~ 1900 9100 +NoConn ~ 1900 9300 +NoConn ~ 1900 9400 +NoConn ~ 1900 9500 +NoConn ~ 1900 9600 +NoConn ~ 1900 9700 +NoConn ~ 1900 9800 +NoConn ~ 1900 9900 +NoConn ~ 1900 6200 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_20.sch b/rev03-KiCad/rev02_20.sch index 0922162..d528116 100644 --- a/rev03-KiCad/rev02_20.sch +++ b/rev03-KiCad/rev02_20.sch @@ -233,4 +233,30 @@ F 0 "U13_12" H 1790 4190 60 0000 L BNN 1 0 0 -1 F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1790 4190 60 0001 C CNN $EndComp +NoConn ~ 2400 5700 +NoConn ~ 2400 5900 +NoConn ~ 2400 5800 +NoConn ~ 2400 6000 +NoConn ~ 2400 6100 +NoConn ~ 2400 6300 +NoConn ~ 2400 7700 +NoConn ~ 2400 7900 +NoConn ~ 2400 8200 +NoConn ~ 2400 8400 +NoConn ~ 2400 8600 +NoConn ~ 2400 8700 +NoConn ~ 2400 8800 +NoConn ~ 2400 8900 +NoConn ~ 2400 9000 +NoConn ~ 2400 9100 +NoConn ~ 2400 9200 +NoConn ~ 2400 9300 +NoConn ~ 2400 9400 +NoConn ~ 2400 9500 +NoConn ~ 2400 9600 +NoConn ~ 2400 9700 +NoConn ~ 2400 9800 +NoConn ~ 2400 9900 +NoConn ~ 2400 5100 +NoConn ~ 3600 6400 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_24.sch b/rev03-KiCad/rev02_24.sch index 95cca53..2a5c73f 100644 --- a/rev03-KiCad/rev02_24.sch +++ b/rev03-KiCad/rev02_24.sch @@ -456,4 +456,15 @@ F 3 "" H 5440 7540 60 0000 C CNN 1 5500 7300 0 -1 -1 0 $EndComp +NoConn ~ 5300 8100 +NoConn ~ 5300 8300 +NoConn ~ 3600 7400 +NoConn ~ 3600 7600 +NoConn ~ 3600 7800 +NoConn ~ 3600 8000 +NoConn ~ 3600 8200 +NoConn ~ 3600 8700 +NoConn ~ 5300 8700 +Wire Wire Line + 8300 6400 8300 6200 $EndSCHEMATC -- cgit v1.2.3 From 96a758c4d6d307be15a132b1e599f524230cfd68 Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Wed, 9 May 2018 13:54:21 +0200 Subject: newer KiCad-nightly seems to order vias after net number --- rev03-KiCad/Cryptech Alpha.kicad_pcb | 174 +++++++++++++++++------------------ 1 file changed, 87 insertions(+), 87 deletions(-) diff --git a/rev03-KiCad/Cryptech Alpha.kicad_pcb b/rev03-KiCad/Cryptech Alpha.kicad_pcb index 74fbf8d..46753c1 100644 --- a/rev03-KiCad/Cryptech Alpha.kicad_pcb +++ b/rev03-KiCad/Cryptech Alpha.kicad_pcb @@ -1,4 +1,4 @@ -(kicad_pcb (version 20171130) (host pcbnew 5.0.0-rc2-dev-unknown-482fd86~64~ubuntu17.10.1) +(kicad_pcb (version 20171130) (host pcbnew 5.0.0-rc2-dev-unknown-d35a6f1~64~ubuntu18.04.1) (general (thickness 1.6) @@ -20575,92 +20575,6 @@ (effects (font (size 1.524 1.524) (thickness 0.1)) (justify left)) ) - (via (at 84.5 6.5) (size 0.5) (layers F.Cu B.Cu) (net 130)) - (via (at 72.725 16.5) (size 0.5) (layers F.Cu B.Cu) (net 130)) - (via (at 83.5 6.5) (size 0.5) (layers F.Cu B.Cu) (net 254)) - (via (at 72.75 15) (size 0.5) (layers F.Cu B.Cu) (net 254)) - (via (at 85.5 6.5) (size 0.5) (layers F.Cu B.Cu) (net 259)) - (via (at 77.49622 14.96359) (size 0.5) (layers F.Cu B.Cu) (net 259)) - (via (at 86.5 6.5) (size 0.5) (layers F.Cu B.Cu) (net 260)) - (via (at 77.49622 16.46946) (size 0.5) (layers F.Cu B.Cu) (net 260)) - (via (at 66 -5.5) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 60.66 14.96359) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 80.5 9.53642) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 89.5 15) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 89.4874 9.5) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 80.66 15.06778) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 69.4884 15) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 69.4884 9) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 60.5 9.41361) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 85 8) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 66.5 9) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 35.75 16.75) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 57.5 16.8) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 48.75 16.75) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 47 16.75) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 37.982 16.75) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 27 16.8) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 30.5308 9) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 30.75 1.5) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 8.25 -2.65412) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 11.77217 -2.69273) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 43.59377 -52.49212) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 84.55413 -15.10074) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 87.55 -15.025) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 88.67933 -15.00073) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 89.125 -19.525) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 12.10059 -12.50061) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 16.7 -8.425) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 13.55 -4.4) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 11.125 -7.4) (size 0.5) (layers F.Cu B.Cu) (net 7)) - (via (at 88.99338 -2.52742) (size 0.5) (layers F.Cu B.Cu) (net 22)) - (via (at 87.9977 -2.52742) (size 0.5) (layers F.Cu B.Cu) (net 23)) - (via (at 86.99852 -2.47741) (size 0.5) (layers F.Cu B.Cu) (net 24)) - (via (at 86 -2.47741) (size 0.5) (layers F.Cu B.Cu) (net 25)) - (via (at 53.95 -44.2) (size 0.5) (layers F.Cu B.Cu) (net 82)) - (via (at 54.62767 -44.22716) (size 0.5) (layers F.Cu B.Cu) (net 83)) - (via (at 58.7 -41.82387) (size 0.5) (layers F.Cu B.Cu) (net 108)) - (via (at 58.82787 -40.55198) (size 0.5) (layers F.Cu B.Cu) (net 109)) - (via (at 47.42731 -41.40202) (size 0.5) (layers F.Cu B.Cu) (net 119)) - (via (at 95.9522 -63.3522) (size 0.5) (layers F.Cu B.Cu) (net 161)) - (via (at 96.1522 -68.4018) (size 0.5) (layers F.Cu B.Cu) (net 162)) - (via (at 95.9522 -67.0018) (size 0.5) (layers F.Cu B.Cu) (net 163)) - (via (at 96.0522 -65.8344) (size 0.5) (layers F.Cu B.Cu) (net 164)) - (via (at 15.55 -12.45) (size 0.5) (layers F.Cu B.Cu) (net 194)) - (via (at 17.425 -13.425) (size 0.5) (layers F.Cu B.Cu) (net 195)) - (via (at 16.275 -12.325) (size 0.5) (layers F.Cu B.Cu) (net 195)) - (via (at 13.6 -7.175) (size 0.5) (layers F.Cu B.Cu) (net 206)) - (via (at 17.5125 -5.6875) (size 0.5) (layers F.Cu B.Cu) (net 206)) - (via (at 45.5 14.25) (size 0.5) (layers F.Cu B.Cu) (net 246)) - (via (at 41.5 14.25) (size 0.5) (layers F.Cu B.Cu) (net 247)) - (via (at 39.5 14.25) (size 0.5) (layers F.Cu B.Cu) (net 248)) - (via (at 43.5 14.25) (size 0.5) (layers F.Cu B.Cu) (net 249)) - (via (at 34.25 14.25) (size 0.5) (layers F.Cu B.Cu) (net 250)) - (via (at 30.255 14.25) (size 0.5) (layers F.Cu B.Cu) (net 251)) - (via (at 28.25 14.25) (size 0.5) (layers F.Cu B.Cu) (net 252)) - (via (at 32.25 14.25) (size 0.5) (layers F.Cu B.Cu) (net 253)) - (via (at 52 14.25) (size 0.5) (layers F.Cu B.Cu) (net 255)) - (via (at 56 14.25) (size 0.5) (layers F.Cu B.Cu) (net 256)) - (via (at 54 14.25) (size 0.5) (layers F.Cu B.Cu) (net 257)) - (via (at 50 14.25) (size 0.5) (layers F.Cu B.Cu) (net 258)) - (via (at 8 -88.51457) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 9.5 -88.4946) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 9.5 -87) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 8 -87.01997) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 8 -91.43957) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 9.5 -91.4196) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 9.5 -89.925) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 8 -89.94497) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 8 -94.43957) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 9.5 -94.4196) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 9.5 -92.925) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 8 -92.94497) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 8 -95.94497) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 9.5 -95.925) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 9.5 -97.4196) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 8 -97.43957) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) - (via (at 85.575 -15.2) (size 0.5) (layers F.Cu B.Cu) (net 296)) - (via (at 86.22921 -15.70077) (size 0.5) (layers F.Cu B.Cu) (net 297)) (via (at 50.4463 -77.8891) (size 0.5) (layers F.Cu B.Cu) (net 0)) (via (at 48.44 -69.8881) (size 0.5) (layers F.Cu B.Cu) (net 0)) (via (at 47.449 -69.8881) (size 0.5) (layers F.Cu B.Cu) (net 0)) @@ -28485,6 +28399,36 @@ (via (at 71.425 -37.075) (size 0.5) (layers F.Cu B.Cu) (net 4)) (via (at 70.5 -91.25) (size 0.5) (layers F.Cu B.Cu) (net 5)) (via (at 92.2078 -84.6328) (size 0.5) (layers F.Cu B.Cu) (net 6)) + (via (at 66 -5.5) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 60.66 14.96359) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 80.5 9.53642) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 89.5 15) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 89.4874 9.5) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 80.66 15.06778) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 69.4884 15) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 69.4884 9) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 60.5 9.41361) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 85 8) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 66.5 9) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 35.75 16.75) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 57.5 16.8) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 48.75 16.75) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 47 16.75) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 37.982 16.75) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 27 16.8) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 30.5308 9) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 30.75 1.5) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 8.25 -2.65412) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 11.77217 -2.69273) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 43.59377 -52.49212) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 84.55413 -15.10074) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 87.55 -15.025) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 88.67933 -15.00073) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 89.125 -19.525) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 12.10059 -12.50061) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 16.7 -8.425) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 13.55 -4.4) (size 0.5) (layers F.Cu B.Cu) (net 7)) + (via (at 11.125 -7.4) (size 0.5) (layers F.Cu B.Cu) (net 7)) (via (at 79.45 -21.55) (size 0.5) (layers F.Cu B.Cu) (net 7)) (via (at 69.1134 -12.7366) (size 0.5) (layers F.Cu B.Cu) (net 7)) (via (at 51.4369 -77.8891) (size 0.5) (layers F.Cu B.Cu) (net 7)) @@ -29069,9 +29013,13 @@ (via (at 54.125 -35.95) (size 0.5) (layers F.Cu B.Cu) (net 19)) (via (at 50.42746 -31.45153) (size 0.5) (layers F.Cu B.Cu) (net 20)) (via (at 50.925 -31) (size 0.5) (layers F.Cu B.Cu) (net 21)) + (via (at 88.99338 -2.52742) (size 0.5) (layers F.Cu B.Cu) (net 22)) (via (at 52.675 -21.2) (size 0.5) (layers F.Cu B.Cu) (net 22)) + (via (at 87.9977 -2.52742) (size 0.5) (layers F.Cu B.Cu) (net 23)) (via (at 56.05 -22.15) (size 0.5) (layers F.Cu B.Cu) (net 23)) + (via (at 86.99852 -2.47741) (size 0.5) (layers F.Cu B.Cu) (net 24)) (via (at 56.825 -21.925) (size 0.5) (layers F.Cu B.Cu) (net 24)) + (via (at 86 -2.47741) (size 0.5) (layers F.Cu B.Cu) (net 25)) (via (at 57.3 -21.4) (size 0.5) (layers F.Cu B.Cu) (net 25)) (via (at 58.175 -43.325) (size 0.5) (layers F.Cu B.Cu) (net 26)) (via (at 56.875 -42.7) (size 0.5) (layers F.Cu B.Cu) (net 27)) @@ -29236,9 +29184,11 @@ (via (at 52.975 -45.4) (size 0.5) (layers F.Cu B.Cu) (net 81)) (via (at 81.71136 -43.65699) (size 0.5) (layers F.Cu B.Cu) (net 81)) (via (at 89.6 -42.9) (size 0.5) (layers F.Cu B.Cu) (net 81)) + (via (at 53.95 -44.2) (size 0.5) (layers F.Cu B.Cu) (net 82)) (via (at 52.4529 -66.8895) (size 0.5) (layers F.Cu B.Cu) (net 82)) (via (at 90.025 -41.925) (size 0.5) (layers F.Cu B.Cu) (net 82)) (via (at 82.4 -41.6) (size 0.5) (layers F.Cu B.Cu) (net 82)) + (via (at 54.62767 -44.22716) (size 0.5) (layers F.Cu B.Cu) (net 83)) (via (at 47.4491 -62.8895) (size 0.5) (layers F.Cu B.Cu) (net 83)) (via (at 76.25 -44.85) (size 0.5) (layers F.Cu B.Cu) (net 83)) (via (at 83.375 -40.65) (size 0.5) (layers F.Cu B.Cu) (net 83)) @@ -29327,7 +29277,9 @@ (via (at 53.9 -26.1) (size 0.5) (layers F.Cu B.Cu) (net 106)) (via (at 63.45342 -61.88478) (size 0.5) (layers F.Cu B.Cu) (net 107)) (via (at 57.2 -30.075) (size 0.5) (layers F.Cu B.Cu) (net 107)) + (via (at 58.7 -41.82387) (size 0.5) (layers F.Cu B.Cu) (net 108)) (via (at 50.4463 -60.8895) (size 0.5) (layers F.Cu B.Cu) (net 108)) + (via (at 58.82787 -40.55198) (size 0.5) (layers F.Cu B.Cu) (net 109)) (via (at 51.4369 -60.8895) (size 0.5) (layers F.Cu B.Cu) (net 109)) (via (at 62.45342 -59.88477) (size 0.5) (layers F.Cu B.Cu) (net 110)) (via (at 66.575 -54.675) (size 0.5) (layers F.Cu B.Cu) (net 110)) @@ -29357,6 +29309,7 @@ (via (at 76.22826 -48.175) (size 0.5) (layers F.Cu B.Cu) (net 118)) (via (at 90.575 -48.525) (size 0.5) (layers F.Cu B.Cu) (net 118)) (via (at 44.625 -45.775) (size 0.5) (layers F.Cu B.Cu) (net 118)) + (via (at 47.42731 -41.40202) (size 0.5) (layers F.Cu B.Cu) (net 119)) (via (at 73.45 -46.875) (size 0.5) (layers F.Cu B.Cu) (net 119)) (via (at 90.775 -46.775) (size 0.5) (layers F.Cu B.Cu) (net 119)) (via (at 48.4397 -63.8895) (size 0.5) (layers F.Cu B.Cu) (net 120)) @@ -29365,6 +29318,8 @@ (via (at 45.4425 -64.8895) (size 0.5) (layers F.Cu B.Cu) (net 124)) (via (at 45.4425 -65.8895) (size 0.5) (layers F.Cu B.Cu) (net 126)) (via (at 55.44136 -69.89684) (size 0.5) (layers F.Cu B.Cu) (net 128)) + (via (at 84.5 6.5) (size 0.5) (layers F.Cu B.Cu) (net 130)) + (via (at 72.725 16.5) (size 0.5) (layers F.Cu B.Cu) (net 130)) (via (at 57.4487 -73.9013) (size 0.5) (layers F.Cu B.Cu) (net 130)) (via (at 22.1 -26.75) (size 0.5) (layers F.Cu B.Cu) (net 130)) (via (at 78.275 -4) (size 0.5) (layers F.Cu B.Cu) (net 130)) @@ -29411,12 +29366,16 @@ (via (at 52.95 -19.675) (size 0.5) (layers F.Cu B.Cu) (net 159)) (via (at 53.4435 -77.8891) (size 0.5) (layers F.Cu B.Cu) (net 160)) (via (at 52.45 -16.375) (size 0.5) (layers F.Cu B.Cu) (net 160)) + (via (at 95.9522 -63.3522) (size 0.5) (layers F.Cu B.Cu) (net 161)) (via (at 55.44538 -61.88478) (size 0.5) (layers F.Cu B.Cu) (net 161)) (via (at 71.775 -65.35) (size 0.5) (layers F.Cu B.Cu) (net 161)) + (via (at 96.1522 -68.4018) (size 0.5) (layers F.Cu B.Cu) (net 162)) (via (at 54.4341 -64.8895) (size 0.5) (layers F.Cu B.Cu) (net 162)) (via (at 68.475 -68.975) (size 0.5) (layers F.Cu B.Cu) (net 162)) + (via (at 95.9522 -67.0018) (size 0.5) (layers F.Cu B.Cu) (net 163)) (via (at 54.4341 -62.8895) (size 0.5) (layers F.Cu B.Cu) (net 163)) (via (at 72.05 -67.575) (size 0.5) (layers F.Cu B.Cu) (net 163)) + (via (at 96.0522 -65.8344) (size 0.5) (layers F.Cu B.Cu) (net 164)) (via (at 54.4341 -63.8895) (size 0.5) (layers F.Cu B.Cu) (net 164)) (via (at 69.675 -68.889) (size 0.5) (layers F.Cu B.Cu) (net 164)) (via (at 57.45342 -62.88478) (size 0.5) (layers F.Cu B.Cu) (net 165)) @@ -29518,8 +29477,11 @@ (via (at 79.17156 -19.62287) (size 0.5) (layers F.Cu B.Cu) (net 186)) (via (at 84.2297 -19.08494) (size 0.5) (layers F.Cu B.Cu) (net 189)) (via (at 77.17307 -15.60584) (size 0.5) (layers F.Cu B.Cu) (net 189)) + (via (at 15.55 -12.45) (size 0.5) (layers F.Cu B.Cu) (net 194)) (via (at 38.1 -40.55) (size 0.5) (layers F.Cu B.Cu) (net 194)) (via (at 25.275 -37.975) (size 0.5) (layers F.Cu B.Cu) (net 194)) + (via (at 17.425 -13.425) (size 0.5) (layers F.Cu B.Cu) (net 195)) + (via (at 16.275 -12.325) (size 0.5) (layers F.Cu B.Cu) (net 195)) (via (at 39.225 -40.2) (size 0.5) (layers F.Cu B.Cu) (net 196)) (via (at 18.025 -17.65) (size 0.5) (layers F.Cu B.Cu) (net 198)) (via (at 6.5716 -14.0716) (size 0.5) (layers F.Cu B.Cu) (net 199)) @@ -29533,6 +29495,8 @@ (via (at 20.6386 -13.3364) (size 0.5) (layers F.Cu B.Cu) (net 199)) (via (at 39.55 -4.8) (size 0.5) (layers F.Cu B.Cu) (net 199)) (via (at 12.51624 -2.2533) (size 0.5) (layers F.Cu B.Cu) (net 199)) + (via (at 13.6 -7.175) (size 0.5) (layers F.Cu B.Cu) (net 206)) + (via (at 17.5125 -5.6875) (size 0.5) (layers F.Cu B.Cu) (net 206)) (via (at 39.425 -7.4024) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 206)) (via (at 31.825 -52.45) (size 0.5) (layers F.Cu B.Cu) (net 207)) (via (at 31.75 -51.625) (size 0.5) (layers F.Cu B.Cu) (net 208)) @@ -29569,6 +29533,24 @@ (via (at 75.9968 -24.175) (size 0.5) (layers F.Cu B.Cu) (net 224)) (via (at 29.8022 -63.725) (size 0.5) (layers F.Cu B.Cu) (net 242)) (via (at 32.75 -58.65) (size 0.5) (layers F.Cu B.Cu) (net 242)) + (via (at 45.5 14.25) (size 0.5) (layers F.Cu B.Cu) (net 246)) + (via (at 41.5 14.25) (size 0.5) (layers F.Cu B.Cu) (net 247)) + (via (at 39.5 14.25) (size 0.5) (layers F.Cu B.Cu) (net 248)) + (via (at 43.5 14.25) (size 0.5) (layers F.Cu B.Cu) (net 249)) + (via (at 34.25 14.25) (size 0.5) (layers F.Cu B.Cu) (net 250)) + (via (at 30.255 14.25) (size 0.5) (layers F.Cu B.Cu) (net 251)) + (via (at 28.25 14.25) (size 0.5) (layers F.Cu B.Cu) (net 252)) + (via (at 32.25 14.25) (size 0.5) (layers F.Cu B.Cu) (net 253)) + (via (at 83.5 6.5) (size 0.5) (layers F.Cu B.Cu) (net 254)) + (via (at 72.75 15) (size 0.5) (layers F.Cu B.Cu) (net 254)) + (via (at 52 14.25) (size 0.5) (layers F.Cu B.Cu) (net 255)) + (via (at 56 14.25) (size 0.5) (layers F.Cu B.Cu) (net 256)) + (via (at 54 14.25) (size 0.5) (layers F.Cu B.Cu) (net 257)) + (via (at 50 14.25) (size 0.5) (layers F.Cu B.Cu) (net 258)) + (via (at 85.5 6.5) (size 0.5) (layers F.Cu B.Cu) (net 259)) + (via (at 77.49622 14.96359) (size 0.5) (layers F.Cu B.Cu) (net 259)) + (via (at 86.5 6.5) (size 0.5) (layers F.Cu B.Cu) (net 260)) + (via (at 77.49622 16.46946) (size 0.5) (layers F.Cu B.Cu) (net 260)) (via (at 16.825 -37.525) (size 0.5) (layers F.Cu B.Cu) (net 260)) (via (at 82.2 -3.15) (size 0.5) (layers F.Cu B.Cu) (net 260)) (via (at 24.25 -80.75) (size 0.5) (layers F.Cu B.Cu) (net 265)) @@ -29579,6 +29561,22 @@ (via (at 10.4982 -52.7) (size 0.5) (layers F.Cu B.Cu) (net 281)) (via (at 23.4366 -62.06933) (size 0.5) (layers F.Cu B.Cu) (net 282)) (via (at 13.6106 -43.3606) (size 0.5) (layers F.Cu B.Cu) (net 283)) + (via (at 8 -88.51457) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 9.5 -88.4946) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 9.5 -87) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 8 -87.01997) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 8 -91.43957) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 9.5 -91.4196) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 9.5 -89.925) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 8 -89.94497) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 8 -94.43957) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 9.5 -94.4196) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 9.5 -92.925) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 8 -92.94497) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 8 -95.94497) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 9.5 -95.925) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 9.5 -97.4196) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) + (via (at 8 -97.43957) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 284)) (via (at 70.5 -88) (size 0.5) (layers F.Cu B.Cu) (net 284)) (via (at 24.7 -84.7) (size 0.5) (layers F.Cu B.Cu) (net 284)) (via (at 31.6 -73.1) (size 0.5) (layers F.Cu B.Cu) (net 285)) @@ -29591,6 +29589,8 @@ (via (at 27.7 -30.675) (size 0.5) (layers F.Cu B.Cu) (net 293)) (via (at 60.125 -19.5) (size 0.5) (layers F.Cu B.Cu) (net 294)) (via (at 61.45 -24.6) (size 0.5) (layers F.Cu B.Cu) (net 295)) + (via (at 85.575 -15.2) (size 0.5) (layers F.Cu B.Cu) (net 296)) + (via (at 86.22921 -15.70077) (size 0.5) (layers F.Cu B.Cu) (net 297)) (via (at 16.375 -9.25) (size 0.5) (layers F.Cu B.Cu) (net 298)) (via (at 16.375 -10.05) (size 0.5) (layers F.Cu B.Cu) (net 299)) (via (at 82.79772 -5.925) (size 0.5) (layers F.Cu B.Cu) (net 302)) -- cgit v1.2.3 From 071cd256c55c4ad9b1f8918df2766d141a0da0f2 Mon Sep 17 00:00:00 2001 From: Fredrik Thulin Date: Wed, 9 May 2018 17:06:28 +0200 Subject: Almost ERC clean. Only three warnings about NotConn sharing pins. --- add-components.py | 240 ++++++++++++++++++++++++++++++++++++++--- convert.sh | 36 +++++-- fix-labels.py | 6 +- rev03-KiCad/Cryptech_Alpha.lib | 23 ++-- rev03-KiCad/rev02_01.sch | 24 +++++ rev03-KiCad/rev02_04.sch | 12 +++ rev03-KiCad/rev02_09.sch | 66 ++++++++++++ rev03-KiCad/rev02_10.sch | 66 ++++++++++++ rev03-KiCad/rev02_18.sch | 28 ++++- rev03-KiCad/rev02_24.sch | 25 ++++- 10 files changed, 480 insertions(+), 46 deletions(-) diff --git a/add-components.py b/add-components.py index bc839fa..3dd3d0f 100755 --- a/add-components.py +++ b/add-components.py @@ -28,6 +28,31 @@ def print_lines(fn, out): ' 1 12300 6450', ' 1 0 0 -1 ', '$EndComp', + # Tell KiCad there is power (and GND) in the power jack + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFB973B', + 'P 2200 3300', + 'F 0 "#FLG?" H 2200 3375 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 2200 3474 50 0000 C CNN', + 'F 2 "" H 2200 3300 50 0001 C CNN', + 'F 3 "~" H 2200 3300 50 0001 C CNN', + ' 1 2200 3300', + ' 1 0 0 -1 ', + '$EndComp', + 'Connection ~ 2200 3300', + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFB98AE', + 'P 2200 3500', + 'F 0 "#FLG?" H 2200 3575 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 2200 3673 50 0000 C CNN', + 'F 2 "" H 2200 3500 50 0001 C CNN', + 'F 3 "~" H 2200 3500 50 0001 C CNN', + ' 1 2200 3500', + ' -1 0 0 1 ', + '$EndComp', + 'Connection ~ 2200 3500', ], 'rev02_02.sch': ['NoConn ~ 11500 5200', 'NoConn ~ 4250 6200'], 'rev02_03.sch': ['NoConn ~ 9100 5100', @@ -35,7 +60,19 @@ def print_lines(fn, out): 'NoConn ~ 9100 5300', 'NoConn ~ 6800 5400', 'NoConn ~ 13040 4330'], - 'rev02_04.sch': [], + 'rev02_04.sch': [# Tell KiCad there is power after the R0 resistor on the path to VBATT + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFAF93B', + 'P 2600 4000', + 'F 0 "#FLG?" H 2600 4075 50 0001 C CNN', + 'F 1 "PWR_FLAG" V 2600 4128 50 0000 L CNN', + 'F 2 "" H 2600 4000 50 0001 C CNN', + 'F 3 "~" H 2600 4000 50 0001 C CNN', + ' 1 2600 4000', + ' 0 -1 -1 0 ', + '$EndComp', + 'Connection ~ 2600 4000',], 'rev02_05.sch': ['NoConn ~ 3100 5300', 'NoConn ~ 3100 5400', 'NoConn ~ 3100 5500', @@ -101,7 +138,75 @@ def print_lines(fn, out): 'NoConn ~ 7300 5100', 'NoConn ~ 7300 5000', 'NoConn ~ 7300 4900', - 'NoConn ~ 2000 3600'], + 'NoConn ~ 2000 3600', + '$Comp', + 'L Cryptech_Alpha:FT_VPLL #PWR?', + 'U 1 1 5AF3BF7C', + 'P 7550 2600', + 'F 0 "#PWR?" H 7550 2450 50 0001 C CNN', + 'F 1 "FT_VPLL" V 7565 2727 50 0000 L CNN', + 'F 2 "" H 7550 2600 60 0000 C CNN', + 'F 3 "" H 7550 2600 60 0000 C CNN', + ' 1 7550 2600', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_VCC3V3 #PWR?', + 'U 1 1 5AF3CDAF', + 'P 6000 3600', + 'F 0 "#PWR?" H 6000 3450 50 0001 C CNN', + 'F 1 "FT_VCC3V3" V 6015 3728 50 0000 L CNN', + 'F 2 "" H 6000 3600 60 0000 C CNN', + 'F 3 "" H 6000 3600 60 0000 C CNN', + ' 1 6000 3600', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_VREGIN #PWR?', + 'U 1 1 5AF3DC52', + 'P 6000 3400', + 'F 0 "#PWR?" H 6000 3250 50 0001 C CNN', + 'F 1 "FT_VREGIN" V 6015 3527 50 0000 L CNN', + 'F 2 "" H 6000 3400 60 0000 C CNN', + 'F 3 "" H 6000 3400 60 0000 C CNN', + ' 1 6000 3400', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_VPHY #PWR?', + 'U 1 1 5AF3EA0F', + 'P 7550 2800', + 'F 0 "#PWR?" H 7550 2650 50 0001 C CNN', + 'F 1 "FT_VPHY" V 7565 2927 50 0000 L CNN', + 'F 2 "" H 7550 2800 60 0000 C CNN', + 'F 3 "" H 7550 2800 60 0000 C CNN', + ' 1 7550 2800', + ' 0 -1 -1 0 ', + '$EndComp', + # Tell KiCad there is power after the ferrite bead + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFAEA32', + 'P 8200 7700', + 'F 0 "#FLG?" H 8200 7775 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 8200 7874 50 0000 C CNN', + 'F 2 "" H 8200 7700 50 0001 C CNN', + 'F 3 "~" H 8200 7700 50 0001 C CNN', + ' 1 8200 7700', + ' 1 0 0 -1 ', + '$EndComp', + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFAEB88', + 'P 6400 7700', + 'F 0 "#FLG?" H 6400 7775 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 6400 7874 50 0000 C CNN', + 'F 2 "" H 6400 7700 50 0001 C CNN', + 'F 3 "~" H 6400 7700 50 0001 C CNN', + ' 1 6400 7700', + ' 1 0 0 -1 ', + '$EndComp', + ], 'rev02_10.sch': ['NoConn ~ 9600 4000', 'NoConn ~ 9600 4100', 'NoConn ~ 9600 4200', @@ -118,7 +223,76 @@ def print_lines(fn, out): 'NoConn ~ 2100 3700', 'NoConn ~ 7400 5000', 'NoConn ~ 7400 5100', - 'NoConn ~ 7400 5200'], + 'NoConn ~ 7400 5200', + '$Comp', + 'L Cryptech_Alpha:FT_MGMT_VPLL #PWR?', + 'U 1 1 5AF74540', + 'P 7650 2700', + 'F 0 "#PWR?" H 7650 2550 50 0001 C CNN', + 'F 1 "FT_MGMT_VPLL" V 7665 2827 50 0000 L CNN', + 'F 2 "" H 7650 2700 60 0000 C CNN', + 'F 3 "" H 7650 2700 60 0000 C CNN', + ' 1 7650 2700', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_MGMT_VPHY #PWR?', + 'U 1 1 5AF74918', + 'P 7650 2900', + 'F 0 "#PWR?" H 7650 2750 50 0001 C CNN', + 'F 1 "FT_MGMT_VPHY" V 7665 3028 50 0000 L CNN', + 'F 2 "" H 7650 2900 60 0000 C CNN', + 'F 3 "" H 7650 2900 60 0000 C CNN', + ' 1 7650 2900', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_MGMT_VREGIN #PWR?', + 'U 1 1 5AF74D26', + 'P 6100 3500', + 'F 0 "#PWR?" H 6100 3350 50 0001 C CNN', + 'F 1 "FT_MGMT_VREGIN" V 6115 3628 50 0000 L CNN', + 'F 2 "" H 6100 3500 60 0000 C CNN', + 'F 3 "" H 6100 3500 60 0000 C CNN', + ' 1 6100 3500', + ' 0 -1 -1 0 ', + '$EndComp', + '$Comp', + 'L Cryptech_Alpha:FT_MGMT_VCC3V3 #PWR?', + 'U 1 1 5AF74F88', + 'P 6100 3700', + 'F 0 "#PWR?" H 6100 3550 50 0001 C CNN', + 'F 1 "FT_MGMT_VCC3V3" V 6115 3828 50 0000 L CNN', + 'F 2 "" H 6100 3700 60 0000 C CNN', + 'F 3 "" H 6100 3700 60 0000 C CNN', + ' 1 6100 3700', + ' 0 -1 -1 0 ', + '$EndComp', + # Tell KiCad there is power after the ferrite bead + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFA8493', + 'P 8300 7800', + 'F 0 "#FLG?" H 8300 7875 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 8300 7974 50 0000 C CNN', + 'F 2 "" H 8300 7800 50 0001 C CNN', + 'F 3 "~" H 8300 7800 50 0001 C CNN', + ' 1 8300 7800', + ' 1 0 0 -1 ', + '$EndComp', + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFA857D', + 'P 6500 7800', + 'F 0 "#FLG?" H 6500 7875 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 6500 7974 50 0000 C CNN', + 'F 2 "" H 6500 7800 50 0001 C CNN', + 'F 3 "~" H 6500 7800 50 0001 C CNN', + ' 1 6500 7800', + ' 1 0 0 -1 ', + '$EndComp', + + ], 'rev02_11.sch': ['NoConn ~ 13200 4300', # Mark BATT pin on JP4 as providing power '$Comp', @@ -334,6 +508,31 @@ def print_lines(fn, out): ' 1 7000 7800', ' 1 0 0 -1', '$EndComp', + # Tell KiCad there is power after the ferrite beads + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFA31D0', + 'P 6050 4800', + 'F 0 "#FLG?" H 6050 4875 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 6050 4974 50 0000 C CNN', + 'F 2 "" H 6050 4800 50 0001 C CNN', + 'F 3 "~" H 6050 4800 50 0001 C CNN', + ' 1 6050 4800', + ' 1 0 0 -1 ', + '$EndComp', + 'Connection ~ 6050 4800', + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFB3F33', + 'P 6050 8000', + 'F 0 "#FLG?" H 6050 8075 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 6050 8174 50 0000 C CNN', + 'F 2 "" H 6050 8000 50 0001 C CNN', + 'F 3 "~" H 6050 8000 50 0001 C CNN', + ' 1 6050 8000', + ' 1 0 0 -1 ', + '$EndComp', + 'Connection ~ 6050 8000', ], 'rev02_19.sch': ['NoConn ~ 1900 5000', 'NoConn ~ 1900 5100', @@ -400,17 +599,30 @@ def print_lines(fn, out): # VCC 1V0 symbol 'Wire Wire Line', ' 8300 6400 8300 6200', - #'$Comp', - #'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', - #'U 1 1 5AF3F25C', - #'P 8300 6200', - #'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', - #'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', - #'F 2 "" H 8300 6200 60 0000 C CNN', - #'F 3 "" H 8300 6200 60 0000 C CNN', - #' 1 8300 6200', - #' 1 0 0 -1', - #'$EndComp', + '$Comp', + 'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', + 'U 1 1 5AF3F25C', + 'P 8300 6200', + 'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', + 'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', + 'F 2 "" H 8300 6200 60 0000 C CNN', + 'F 3 "" H 8300 6200 60 0000 C CNN', + ' 1 8300 6200', + ' 1 0 0 -1', + '$EndComp', + # Tell KiCad there is power after the ferrite bead + '$Comp', + 'L power:PWR_FLAG #FLG?', + 'U 1 1 5AFA77EC', + 'P 8150 6400', + 'F 0 "#FLG?" H 8150 6475 50 0001 C CNN', + 'F 1 "PWR_FLAG" H 8150 6574 50 0000 C CNN', + 'F 2 "" H 8150 6400 50 0001 C CNN', + 'F 3 "~" H 8150 6400 50 0001 C CNN', + ' 1 8150 6400', + ' 1 0 0 -1 ', + '$EndComp', + 'Connection ~ 8150 6400', ], 'rev02_25.sch': []} if not comp.get(fn, []): diff --git a/convert.sh b/convert.sh index dc1795c..b54a466 100755 --- a/convert.sh +++ b/convert.sh @@ -114,7 +114,7 @@ sed -i -e 's/^X OUT 6 600 300 200 L 70 70 0 1 W$/X OUT 6 600 300 200 L 70 70 0 1 #sed -i -e 's/^X VOUT \(.*\) W$/X VOUT \1 w/g' Cryptech_Alpha.lib # Power jack sed -i \ - -e 's/^X PWR 1 100 300 100 L 1 1 0 1 P$/X PWR 1 100 300 100 L 1 1 0 1 w/' \ + -e 's/^X PWR 1 100 300 100 L 1 1 0 1 P$/X PWR 1 100 300 100 L 1 1 0 1 W/' \ -e 's/^X GND 2 100 100 100 L 1 1 0 1 P$/X GND 2 100 100 100 L 1 1 0 1 W/' \ -e 's/^X GNDBREAK 3 100 200 100 L 1 1 0 1 P$/X GNDBREAK 3 100 200 100 L 1 1 0 1 W/' \ Cryptech_Alpha.lib @@ -130,15 +130,22 @@ sed -i \ sed -i \ -e 's/^X VOUT 5 900 2100 200 L 70 70 0 1 W$/X VOUT 5 900 2100 200 L 70 70 0 1 w/' \ Cryptech_Alpha.lib -# VCCs -#sed -i \ -# -e 's/^X 3V3_BATT 1 0 0 0 U 50 50 1 1 w N$/X 3V3_BATT 1 0 0 0 U 50 50 1 1 W N/' \ -# -e 's/^X FT_VPLL 1 0 0 0 U 50 50 1 1 w N$/X FT_VPLL 1 0 0 0 U 50 50 1 1 W N/' \ -# -e 's/^X FT_VPHY 1 0 0 0 U 50 50 1 1 w N$/X FT_VPHY 1 0 0 0 U 50 50 1 1 W N/' \ -# -e 's/^X FT_VREGIN 1 0 0 0 U 50 50 1 1 w N$/X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N/' \ -# -e 's/^X FT_VCC3V3 1 0 0 0 U 50 50 1 1 w N$/X FT_VCC3V3 1 0 0 0 U 50 50 1 1 W N/' \ -# -e 's/^X FT_VREGIN 1 0 0 0 U 50 50 1 1 w N$/X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N/' \ -# Cryptech_Alpha.lib +# Mark _one_ of the two VOUTs on the LMZ13608 as power output instead of input, since net-ties haven't been used +sed -i \ + -e 's/^X VOUT 10 900 700 200 L 70 70 0 1 W$/X VOUT 10 900 700 200 L 70 70 0 1 w/' \ + Cryptech_Alpha.lib +# FT232H power inputs/outputs +# last letter: +# P = passive +# W = Power input +# w = power output +sed -i \ + -e 's/^X VPHY 3 -200 1500 200 D 70 70 0 1 P/X VPHY 3 -200 1500 200 D 70 70 0 1 W/' \ + -e 's/^X VPLL 8 -100 1500 200 D 70 70 0 1 P/X VPLL 8 -100 1500 200 D 70 70 0 1 W/' \ + -e 's/^X VCCA 37 -1100 800 200 R 70 70 0 1 W/X VCCA 37 -1100 800 200 R 70 70 0 1 w/' \ + -e 's/^X VCCORE 38 -1100 900 200 R 70 70 0 1 W/X VCCORE 38 -1100 900 200 R 70 70 0 1 w/' \ + -e 's/^X VCCD 39 -1100 1000 200 R 70 70 0 1 W/X VCCD 39 -1100 1000 200 R 70 70 0 1 w/' \ + Cryptech_Alpha.lib # Fix off-grid capacitor sed -i \ @@ -183,6 +190,15 @@ grep -vx \ -e 'T 0 -220 -50 50 0 1 1 5% Normal 1 C C' \ -e 'T 0 -220 40 50 0 1 1 5% Normal 1 C C' \ -e 'T 0 -410 420 50 0 1 1 2425618 Normal 1 C C' \ + -e 'T 0 -410 330 50 0 1 1 CONN-08106 Normal 1 C C' \ + -e 'T 0 -410 330 50 0 1 1 PRT-12748 Normal 1 C C' \ + -e 'T 0 -1120 1520 50 0 1 1 1870924 Normal 1 C C' \ + -e 'T 0 -820 910 50 0 1 1 2081146 Normal 1 C C' \ + -e 'T 0 -820 910 50 0 1 1 EN6347QI Normal 1 C C' \ + -e 'T 0 -820 910 50 0 1 1 ENPIRION Normal 1 C C' \ + -e 'T 0 -820 910 50 0 1 1 QFN Normal 1 C C' \ + -e 'T 0 -1220 2320 50 0 1 1 IS45S32160F Normal 1 C C' \ + -e 'T 0 -1220 2320 50 0 1 1 ISSI Normal 1 C C' \ Cryptech_Alpha.lib > Cryptech_Alpha.lib2 mv Cryptech_Alpha.lib2 Cryptech_Alpha.lib diff --git a/fix-labels.py b/fix-labels.py index fa5f823..a00ee12 100755 --- a/fix-labels.py +++ b/fix-labels.py @@ -527,12 +527,12 @@ labels = { 'MKM_FPGA_SCK': [{'t': 'GLabel', 'dir': 'Output', 'x': 2230, 'y': 6400, 'ori': 2, 'new_x': 2950},], }, 'rev02_18.sch': { - 'FPGA_VCCAUX_1V8': [{'t': 'GLabel', 'dir': 'Output', 'x': 6100, 'y': 4800, 'ori': 2, 'new_x': 7000},], + 'FPGA_VCCAUX_1V8': [{'t': 'Label', 'x': 6100, 'y': 4800, 'ori': 2, 'new_x': 7000},], 'POK_VCCAUX': [{'t': 'GLabel', 'dir': 'Output', 'x': 4000, 'y': 6200, 'ori': 2, 'new_y': 6500},], 'POK_VCCO': [{'t': 'GLabel', 'dir': 'Output', 'x': 4000, 'y': 9700, 'ori': 2},], 'PWR_ENA_VCCAUX': [{'t': 'GLabel', 'dir': 'Input', 'x': 1900, 'y': 4740, 'ori': 0, 'new_y': 4150},], 'PWR_ENA_VCCO': [{'t': 'GLabel', 'dir': 'Input', 'x': 1400, 'y': 7500, 'ori': 0},], - 'VCCO_3V3': [{'t': 'Label', 'x': 6100, 'y': 8000, 'ori': 2, 'new_x': 7000},], + 'VCCO_3V3': [{'t': 'Label', 'x': 6100, 'y': 8000, 'ori': 0, 'new_x': 7000},], }, 'rev02_19.sch': { 'AVR_GPIO_FPGA_0': [{'t': 'GLabel', 'dir': 'UnSpc', 'x': 2100, 'y': 8100, 'ori': 2, 'new_x': 3100},], @@ -611,7 +611,7 @@ labels = { 'FPGA_GPIO_LED_3': [{'t': 'GLabel', 'dir': 'Output', 'x': 2470, 'y': 6600, 'ori': 2, 'new_x': 3600},], }, 'rev02_24.sch': { - 'FPGA_VCCINT_1V0': [{'t': 'Label', 'x': 8300, 'y': 6400, 'ori': 2},], + 'FPGA_VCCINT_1V0': [{'t': 'Label', 'x': 8300, 'y': 6400, 'ori': 0},], 'POK_VCCINT': [{'t': 'GLabel', 'dir': 'Output', 'x': 5350, 'y': 9100, 'ori': 2, 'new_x': 5600},], 'PWR_ENA_VCCINT': [{'t': 'GLabel', 'dir': 'Input', 'x': 2700, 'y': 5900, 'ori': 0},], }, diff --git a/rev03-KiCad/Cryptech_Alpha.lib b/rev03-KiCad/Cryptech_Alpha.lib index 1016278..4438f4e 100644 --- a/rev03-KiCad/Cryptech_Alpha.lib +++ b/rev03-KiCad/Cryptech_Alpha.lib @@ -752,7 +752,7 @@ X PGND TP1 -100 -1100 200 U 70 70 0 1 W X FB 7 900 -100 200 L 70 70 0 1 P X SS/TRK 8 -900 -700 200 R 70 70 0 1 P X NC 9 900 -700 200 L 70 70 0 1 P -X VOUT 10 900 700 200 L 70 70 0 1 W +X VOUT 10 900 700 200 L 70 70 0 1 w X VIN 1 -900 700 200 R 70 70 0 1 W X VIN 2 -900 600 200 R 70 70 0 1 W X VOUT 11 900 600 200 L 70 70 0 1 W @@ -792,8 +792,6 @@ F1 "POWER_JACKSMD" -410 -30 60 H V L BNN F2 "" 0 0 60 H V C CNN F3 "" 0 0 60 H V C CNN DRAW -T 0 -410 330 50 0 1 1 CONN-08106 Normal 1 C C -T 0 -410 330 50 0 1 1 PRT-12748 Normal 1 C C P 2 0 1 10 -300 200 -400 100 P 2 0 1 10 -200 100 -300 200 P 2 0 1 10 -100 100 -200 100 @@ -803,7 +801,7 @@ P 2 0 1 10 0 200 -100 200 S -400 270 0 330 0 1 10 f X GNDBREAK 3 100 200 100 L 1 1 0 1 W X GND 2 100 100 100 L 1 1 0 1 W -X PWR 1 100 300 100 L 1 1 0 1 w +X PWR 1 100 300 100 L 1 1 0 1 W ENDDRAW ENDDEF # @@ -1410,8 +1408,6 @@ X DQ14 83 1200 600 100 L 70 70 0 1 P X VSSQ 84 100 -2300 100 U 70 70 0 1 W X DQ15 85 1200 500 100 L 70 70 0 1 P X VSS 86 600 -2300 100 U 70 70 0 1 W -T 0 -1220 2320 50 0 1 1 IS45S32160F Normal 1 C C -T 0 -1220 2320 50 0 1 1 ISSI Normal 1 C C ENDDRAW ENDDEF # @@ -1602,9 +1598,9 @@ P 2 0 1 10 900 -1300 900 1300 P 2 0 1 10 -900 -1300 900 -1300 P 2 0 1 10 -900 1300 -900 -1300 X VREGIN 40 -1100 1200 200 R 70 70 0 1 W -X VCCD 39 -1100 1000 200 R 70 70 0 1 W -X VCCORE 38 -1100 900 200 R 70 70 0 1 W -X VCCA 37 -1100 800 200 R 70 70 0 1 W +X VCCD 39 -1100 1000 200 R 70 70 0 1 w +X VCCORE 38 -1100 900 200 R 70 70 0 1 w +X VCCA 37 -1100 800 200 R 70 70 0 1 w X DM 6 -1100 600 200 R 70 70 0 1 P X DP 7 -1100 500 200 R 70 70 0 1 P X ~RESET 34 -1100 300 200 R 70 70 0 1 P @@ -1644,12 +1640,11 @@ X GND 35 300 -1500 200 U 70 70 0 1 W X GND 36 400 -1500 200 U 70 70 0 1 W X GND 47 500 -1500 200 U 70 70 0 1 W X GND 48 600 -1500 200 U 70 70 0 1 W -X VPHY 3 -200 1500 200 D 70 70 0 1 P -X VPLL 8 -100 1500 200 D 70 70 0 1 P +X VPHY 3 -200 1500 200 D 70 70 0 1 W +X VPLL 8 -100 1500 200 D 70 70 0 1 W X VCCIO 12 0 1500 200 D 70 70 0 1 W X VCCIO 24 100 1500 200 D 70 70 0 1 W X VCCIO 46 200 1500 200 D 70 70 0 1 W -T 0 -1120 1520 50 0 1 1 1870924 Normal 1 C C ENDDRAW ENDDEF # @@ -2630,10 +2625,6 @@ F1 "" 0 0 60 H V C CNN F2 "" 0 0 60 H V C CNN F3 "" 0 0 60 H V C CNN DRAW -T 0 -820 910 50 0 1 1 EN6347QI Normal 1 C C -T 0 -820 910 50 0 1 1 2081146 Normal 1 C C -T 0 -820 910 50 0 1 1 QFN Normal 1 C C -T 0 -820 910 50 0 1 1 ENPIRION Normal 1 C C X NC 1 800 -300 200 L 70 70 0 1 P X NC 2 800 -300 200 L 70 70 0 1 P X NC 3 800 -300 200 L 70 70 0 1 P diff --git a/rev03-KiCad/rev02_01.sch b/rev03-KiCad/rev02_01.sch index caaa6af..7e159df 100644 --- a/rev03-KiCad/rev02_01.sch +++ b/rev03-KiCad/rev02_01.sch @@ -838,4 +838,28 @@ F 3 "" H 12300 6450 60 0000 C CNN 1 12300 6450 1 0 0 -1 $EndComp +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFB973B +P 2200 3300 +F 0 "#FLG?" H 2200 3375 50 0001 C CNN +F 1 "PWR_FLAG" H 2200 3474 50 0000 C CNN +F 2 "" H 2200 3300 50 0001 C CNN +F 3 "~" H 2200 3300 50 0001 C CNN + 1 2200 3300 + 1 0 0 -1 +$EndComp +Connection ~ 2200 3300 +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFB98AE +P 2200 3500 +F 0 "#FLG?" H 2200 3575 50 0001 C CNN +F 1 "PWR_FLAG" H 2200 3673 50 0000 C CNN +F 2 "" H 2200 3500 50 0001 C CNN +F 3 "~" H 2200 3500 50 0001 C CNN + 1 2200 3500 + -1 0 0 1 +$EndComp +Connection ~ 2200 3500 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_04.sch b/rev03-KiCad/rev02_04.sch index c3ffe41..bce5104 100644 --- a/rev03-KiCad/rev02_04.sch +++ b/rev03-KiCad/rev02_04.sch @@ -737,4 +737,16 @@ F 3 "" H 12520 4920 60 0000 C CNN 1 12800 5300 1 0 0 -1 $EndComp +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFAF93B +P 2600 4000 +F 0 "#FLG?" H 2600 4075 50 0001 C CNN +F 1 "PWR_FLAG" V 2600 4128 50 0000 L CNN +F 2 "" H 2600 4000 50 0001 C CNN +F 3 "~" H 2600 4000 50 0001 C CNN + 1 2600 4000 + 0 -1 -1 0 +$EndComp +Connection ~ 2600 4000 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_09.sch b/rev03-KiCad/rev02_09.sch index 5a6ae29..ec6e848 100644 --- a/rev03-KiCad/rev02_09.sch +++ b/rev03-KiCad/rev02_09.sch @@ -1029,4 +1029,70 @@ NoConn ~ 7300 5100 NoConn ~ 7300 5000 NoConn ~ 7300 4900 NoConn ~ 2000 3600 +$Comp +L Cryptech_Alpha:FT_VPLL #PWR? +U 1 1 5AF3BF7C +P 7550 2600 +F 0 "#PWR?" H 7550 2450 50 0001 C CNN +F 1 "FT_VPLL" V 7565 2727 50 0000 L CNN +F 2 "" H 7550 2600 60 0000 C CNN +F 3 "" H 7550 2600 60 0000 C CNN + 1 7550 2600 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:FT_VCC3V3 #PWR? +U 1 1 5AF3CDAF +P 6000 3600 +F 0 "#PWR?" H 6000 3450 50 0001 C CNN +F 1 "FT_VCC3V3" V 6015 3728 50 0000 L CNN +F 2 "" H 6000 3600 60 0000 C CNN +F 3 "" H 6000 3600 60 0000 C CNN + 1 6000 3600 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:FT_VREGIN #PWR? +U 1 1 5AF3DC52 +P 6000 3400 +F 0 "#PWR?" H 6000 3250 50 0001 C CNN +F 1 "FT_VREGIN" V 6015 3527 50 0000 L CNN +F 2 "" H 6000 3400 60 0000 C CNN +F 3 "" H 6000 3400 60 0000 C CNN + 1 6000 3400 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:FT_VPHY #PWR? +U 1 1 5AF3EA0F +P 7550 2800 +F 0 "#PWR?" H 7550 2650 50 0001 C CNN +F 1 "FT_VPHY" V 7565 2927 50 0000 L CNN +F 2 "" H 7550 2800 60 0000 C CNN +F 3 "" H 7550 2800 60 0000 C CNN + 1 7550 2800 + 0 -1 -1 0 +$EndComp +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFAEA32 +P 8200 7700 +F 0 "#FLG?" H 8200 7775 50 0001 C CNN +F 1 "PWR_FLAG" H 8200 7874 50 0000 C CNN +F 2 "" H 8200 7700 50 0001 C CNN +F 3 "~" H 8200 7700 50 0001 C CNN + 1 8200 7700 + 1 0 0 -1 +$EndComp +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFAEB88 +P 6400 7700 +F 0 "#FLG?" H 6400 7775 50 0001 C CNN +F 1 "PWR_FLAG" H 6400 7874 50 0000 C CNN +F 2 "" H 6400 7700 50 0001 C CNN +F 3 "~" H 6400 7700 50 0001 C CNN + 1 6400 7700 + 1 0 0 -1 +$EndComp $EndSCHEMATC diff --git a/rev03-KiCad/rev02_10.sch b/rev03-KiCad/rev02_10.sch index ffe7fd1..f84c224 100644 --- a/rev03-KiCad/rev02_10.sch +++ b/rev03-KiCad/rev02_10.sch @@ -1033,4 +1033,70 @@ NoConn ~ 2100 3700 NoConn ~ 7400 5000 NoConn ~ 7400 5100 NoConn ~ 7400 5200 +$Comp +L Cryptech_Alpha:FT_MGMT_VPLL #PWR? +U 1 1 5AF74540 +P 7650 2700 +F 0 "#PWR?" H 7650 2550 50 0001 C CNN +F 1 "FT_MGMT_VPLL" V 7665 2827 50 0000 L CNN +F 2 "" H 7650 2700 60 0000 C CNN +F 3 "" H 7650 2700 60 0000 C CNN + 1 7650 2700 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:FT_MGMT_VPHY #PWR? +U 1 1 5AF74918 +P 7650 2900 +F 0 "#PWR?" H 7650 2750 50 0001 C CNN +F 1 "FT_MGMT_VPHY" V 7665 3028 50 0000 L CNN +F 2 "" H 7650 2900 60 0000 C CNN +F 3 "" H 7650 2900 60 0000 C CNN + 1 7650 2900 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:FT_MGMT_VREGIN #PWR? +U 1 1 5AF74D26 +P 6100 3500 +F 0 "#PWR?" H 6100 3350 50 0001 C CNN +F 1 "FT_MGMT_VREGIN" V 6115 3628 50 0000 L CNN +F 2 "" H 6100 3500 60 0000 C CNN +F 3 "" H 6100 3500 60 0000 C CNN + 1 6100 3500 + 0 -1 -1 0 +$EndComp +$Comp +L Cryptech_Alpha:FT_MGMT_VCC3V3 #PWR? +U 1 1 5AF74F88 +P 6100 3700 +F 0 "#PWR?" H 6100 3550 50 0001 C CNN +F 1 "FT_MGMT_VCC3V3" V 6115 3828 50 0000 L CNN +F 2 "" H 6100 3700 60 0000 C CNN +F 3 "" H 6100 3700 60 0000 C CNN + 1 6100 3700 + 0 -1 -1 0 +$EndComp +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFA8493 +P 8300 7800 +F 0 "#FLG?" H 8300 7875 50 0001 C CNN +F 1 "PWR_FLAG" H 8300 7974 50 0000 C CNN +F 2 "" H 8300 7800 50 0001 C CNN +F 3 "~" H 8300 7800 50 0001 C CNN + 1 8300 7800 + 1 0 0 -1 +$EndComp +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFA857D +P 6500 7800 +F 0 "#FLG?" H 6500 7875 50 0001 C CNN +F 1 "PWR_FLAG" H 6500 7974 50 0000 C CNN +F 2 "" H 6500 7800 50 0001 C CNN +F 3 "~" H 6500 7800 50 0001 C CNN + 1 6500 7800 + 1 0 0 -1 +$EndComp $EndSCHEMATC diff --git a/rev03-KiCad/rev02_18.sch b/rev03-KiCad/rev02_18.sch index 76b9301..e1947c7 100644 --- a/rev03-KiCad/rev02_18.sch +++ b/rev03-KiCad/rev02_18.sch @@ -305,11 +305,11 @@ Wire Wire Line 5500 9000 5500 9200 Wire Wire Line 7000 4800 6000 4800 -Text GLabel 7000 4800 2 48 Output ~ 0 +Text Label 7000 4800 2 48 ~ 0 FPGA_VCCAUX_1V8 Wire Wire Line 7000 8000 6000 8000 -Text Label 7000 8000 2 48 ~ 0 +Text Label 7000 8000 0 48 ~ 0 VCCO_3V3 Wire Wire Line 2100 6200 2100 6300 @@ -788,4 +788,28 @@ F 3 "" H 7000 7800 60 0000 C CNN 1 7000 7800 1 0 0 -1 $EndComp +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFA31D0 +P 6050 4800 +F 0 "#FLG?" H 6050 4875 50 0001 C CNN +F 1 "PWR_FLAG" H 6050 4974 50 0000 C CNN +F 2 "" H 6050 4800 50 0001 C CNN +F 3 "~" H 6050 4800 50 0001 C CNN + 1 6050 4800 + 1 0 0 -1 +$EndComp +Connection ~ 6050 4800 +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFB3F33 +P 6050 8000 +F 0 "#FLG?" H 6050 8075 50 0001 C CNN +F 1 "PWR_FLAG" H 6050 8174 50 0000 C CNN +F 2 "" H 6050 8000 50 0001 C CNN +F 3 "~" H 6050 8000 50 0001 C CNN + 1 6050 8000 + 1 0 0 -1 +$EndComp +Connection ~ 6050 8000 $EndSCHEMATC diff --git a/rev03-KiCad/rev02_24.sch b/rev03-KiCad/rev02_24.sch index 2a5c73f..94dfe10 100644 --- a/rev03-KiCad/rev02_24.sch +++ b/rev03-KiCad/rev02_24.sch @@ -175,7 +175,7 @@ Wire Wire Line 7600 7400 7600 7600 Wire Wire Line 8300 6400 8100 6400 -Text Label 8300 6400 2 48 ~ 0 +Text Label 8300 6400 0 48 ~ 0 FPGA_VCCINT_1V0 Wire Wire Line 1600 6200 1600 6400 @@ -467,4 +467,27 @@ NoConn ~ 3600 8700 NoConn ~ 5300 8700 Wire Wire Line 8300 6400 8300 6200 +$Comp +L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR? +U 1 1 5AF3F25C +P 8300 6200 +F 0 "#PWR?" H 8300 6050 50 0001 C CNN +F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN +F 2 "" H 8300 6200 60 0000 C CNN +F 3 "" H 8300 6200 60 0000 C CNN + 1 8300 6200 + 1 0 0 -1 +$EndComp +$Comp +L power:PWR_FLAG #FLG? +U 1 1 5AFA77EC +P 8150 6400 +F 0 "#FLG?" H 8150 6475 50 0001 C CNN +F 1 "PWR_FLAG" H 8150 6574 50 0000 C CNN +F 2 "" H 8150 6400 50 0001 C CNN +F 3 "~" H 8150 6400 50 0001 C CNN + 1 8150 6400 + 1 0 0 -1 +$EndComp +Connection ~ 8150 6400 $EndSCHEMATC -- cgit v1.2.3