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+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:special
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+EELAYER 27 0
+EELAYER END
+$Descr B 17000 11000
+encoding utf-8
+Sheet 27 27
+Title "rev02_25"
+Date "15 10 2016"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text Notes 8910 4400 0 60 ~ 12
+*) Recommended power-up sequence:\n1) VCCINT\n2) VCCAUX\n3) VCCO\nRC network values are preliminary,\nshould be tweaked after experiments
+Text Notes 4510 4730 0 60 ~ 12
+--->
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+--->
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+--->
+Text Notes 5610 8470 0 60 ~ 12
+--->
+Text Notes 7150 9240 0 60 ~ 12
+*) "Power OK" LED, should be of green color
+Text Notes 9570 10142 0 66 ~ 12
+FPGA power sequencing
+Text Notes 2145 4675 0 60 ~ 12
+R72
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+100k
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+D2
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+4.7k
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+R76
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+D4
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+R73
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+R77
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+4.7k
+Text Notes 7689 8294 0 60 ~ 12
+Q6
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+LED18
+Text Notes 8899 7359 0 60 ~ 12
+R78
+Text Label 8899 7557 0 70 ~
+330
+Text Notes 2816 5049 0 60 ~ 12
+C211
+Text Label 3124 5038 0 70 ~
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