diff options
Diffstat (limited to 'rev03-KiCad/rev02_20.sch')
| -rw-r--r-- | rev03-KiCad/rev02_20.sch | 98 |
1 files changed, 48 insertions, 50 deletions
diff --git a/rev03-KiCad/rev02_20.sch b/rev03-KiCad/rev02_20.sch index d528116..69fa351 100644 --- a/rev03-KiCad/rev02_20.sch +++ b/rev03-KiCad/rev02_20.sch @@ -23,15 +23,15 @@ Text Notes 4800 6500 0 60 ~ 12 <-- FPGA_GPIO_* and FPGA_IRQ_N_* signals can be swapped Text Notes 4980 4810 0 60 ~ 12 <-- Disable pull-ups on all pins during configuration -Text Notes 8500 10220 0 84 ~ 12 +Text Notes 8500 10220 0 84 ~ 17 FPGA MKM interface Text Notes 4280 4890 0 60 ~ 12 R65 $Comp -L Cryptech_Alpha:VCCO_3V3 VCCO_3V3_38 +L Cryptech_Alpha:VCCO_3V3 #VCCO_3V3_038 U 1 1 58023EEC P 4200 4300 -F 0 "VCCO_3V3_38" H 4200 4300 20 0000 C CNN +F 0 "#VCCO_3V3_038" H 4200 4300 20 0000 C CNN F 1 "+VCCO_3V3" H 4200 4230 30 0000 C CNN F 2 "" H 4200 4300 70 0000 C CNN F 3 "" H 4200 4300 70 0000 C CNN @@ -40,21 +40,19 @@ F 3 "" H 4200 4300 70 0000 C CNN $EndComp Wire Wire Line 3600 7400 2400 7400 -Text GLabel 3600 7400 2 48 Input ~ 0 +Text GLabel 3600 7400 2 48 Input ~ 0 DIGITIZED_NOISE Wire Wire Line 3600 6500 2400 6500 -Text GLabel 3600 6500 2 48 Output ~ 0 +Text GLabel 3600 6500 2 48 Output ~ 0 FPGA_GPIO_LED_2 Wire Wire Line 3600 6600 2400 6600 -Text GLabel 3600 6600 2 48 Output ~ 0 +Text GLabel 3600 6600 2 48 Output ~ 0 FPGA_GPIO_LED_3 Wire Wire Line 3600 6400 2400 6400 Wire Wire Line - 2900 5600 2400 5600 -Wire Wire Line 2600 4500 2400 4500 Wire Wire Line 2600 4500 2600 4600 @@ -73,8 +71,6 @@ Wire Wire Line Wire Wire Line 2600 4600 2400 4600 Wire Wire Line - 2900 4500 2600 4500 -Wire Wire Line 4200 4300 4200 4500 Wire Wire Line 2600 4900 2600 5000 @@ -82,103 +78,99 @@ Wire Wire Line 2600 5000 2400 5000 Wire Wire Line 3600 5200 3500 5200 -Text GLabel 3600 5200 2 48 UnSpc ~ 0 +Text GLabel 3600 5200 2 48 UnSpc ~ 0 FPGA_CFG_MOSI Wire Wire Line 3600 5300 3500 5300 -Text GLabel 3600 5300 2 48 Input ~ 0 +Text GLabel 3600 5300 2 48 Input ~ 0 FPGA_CFG_MISO Wire Wire Line 3600 6200 3500 6200 -Text GLabel 3600 6200 2 48 Output ~ 0 +Text GLabel 3600 6200 2 48 Output ~ 0 FPGA_CFG_CS_N Wire Wire Line 3100 5300 2400 5300 -Text Label 2460 5300 2 48 ~ 0 +Text Label 2460 5300 2 48 ~ 0 FPGA_CFG_MISO1 Wire Wire Line 3100 5200 2400 5200 -Text Label 2460 5200 2 48 ~ 0 +Text Label 2460 5200 2 48 ~ 0 FPGA_CFG_MOSI1 Wire Wire Line 3100 6200 2400 6200 -Text Label 2460 6200 2 48 ~ 0 +Text Label 2460 6200 2 48 ~ 0 FPGA_CFG_CS_N1 -Text GLabel 3600 7000 2 48 Input ~ 0 +Text GLabel 3600 7000 2 48 Input ~ 0 FMC_A19 -Text GLabel 3600 7100 2 48 Input ~ 0 +Text GLabel 3600 7100 2 48 Input ~ 0 FMC_A20 Wire Wire Line 3600 7000 2400 7000 Wire Wire Line 3600 7100 2400 7100 -Text GLabel 3610 8100 2 48 Input ~ 0 +Text GLabel 3610 8100 2 48 Input ~ 0 FMC_A21 Wire Wire Line 3610 8100 2400 8100 -Text GLabel 3600 6800 2 48 Input ~ 0 +Text GLabel 3600 6800 2 48 Input ~ 0 FMC_A22 -Text GLabel 3600 6900 2 48 Input ~ 0 +Text GLabel 3600 6900 2 48 Input ~ 0 FMC_A23 Wire Wire Line 3600 6900 2400 6900 Wire Wire Line 3600 6800 2400 6800 -Text GLabel 3600 8500 2 48 Input ~ 0 +Text GLabel 3600 8500 2 48 Input ~ 0 FMC_A24 Wire Wire Line 3600 8500 2400 8500 -Text GLabel 3600 8000 2 48 Input ~ 0 +Text GLabel 3600 8000 2 48 Input ~ 0 FMC_A25 Wire Wire Line 3600 8000 2400 8000 -Text GLabel 3600 7600 2 48 BiDi ~ 0 +Text GLabel 3600 7600 2 48 BiDi ~ 0 FMC_D8 Wire Wire Line 3600 7600 2400 7600 -Text GLabel 3600 6700 2 48 BiDi ~ 0 +Text GLabel 3600 6700 2 48 BiDi ~ 0 FMC_D9 Wire Wire Line 3600 6700 2400 6700 -Text GLabel 3600 7500 2 48 BiDi ~ 0 +Text GLabel 3600 7500 2 48 BiDi ~ 0 FMC_D10 Wire Wire Line 3600 7500 2400 7500 -Text GLabel 3600 7200 2 48 BiDi ~ 0 +Text GLabel 3600 7200 2 48 BiDi ~ 0 FMC_D12 Wire Wire Line 3600 7200 2400 7200 -Text GLabel 3600 7300 2 48 BiDi ~ 0 +Text GLabel 3600 7300 2 48 BiDi ~ 0 FMC_D28 Wire Wire Line 3600 7300 2400 7300 -Text GLabel 3600 7800 2 48 BiDi ~ 0 +Text GLabel 3600 7800 2 48 BiDi ~ 0 FMC_D29 Wire Wire Line 3600 7800 2400 7800 -Text GLabel 3100 5500 2 48 BiDi ~ 0 +Text GLabel 3100 5500 2 48 BiDi ~ 0 FMC_D30 Wire Wire Line 3100 5500 2400 5500 -Text GLabel 3100 5400 2 48 BiDi ~ 0 +Text GLabel 3100 5400 2 48 BiDi ~ 0 FMC_D31 Wire Wire Line 3100 5400 2400 5400 -Text GLabel 3600 8300 2 48 UnSpc ~ 0 +Text GLabel 3600 8300 2 48 UnSpc ~ 0 FMC_NL Wire Wire Line 3600 8300 2400 8300 -Text GLabel 3600 10000 2 48 BiDi ~ 0 +Text GLabel 3600 10000 2 48 BiDi ~ 0 FMC_D11 Wire Wire Line 3600 10000 2400 10000 Wire Wire Line - 4200 5600 2900 5600 -Wire Wire Line 4200 5000 4200 5600 Wire Wire Line - 4200 4500 2900 4500 -Wire Wire Line 4200 4600 4200 4500 $Comp L Cryptech_Alpha:R-EU_R0402 R65 @@ -189,7 +181,7 @@ F 1 "1k" V 4030 4730 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 4030 4730 60 0001 C CNN F 3 "" H 4030 4730 60 0000 C CNN 1 4200 4800 - 0 -1 -1 0 + 0 -1 -1 0 $EndComp $Comp L Cryptech_Alpha:R-EU_R0603 R83 @@ -200,7 +192,7 @@ F 1 "0" H 3220 5120 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 3220 5120 60 0001 C CNN F 3 "" H 3220 5120 60 0000 C CNN 1 3300 5200 - -1 0 0 1 + -1 0 0 1 $EndComp $Comp L Cryptech_Alpha:R-EU_R0603 R84 @@ -211,7 +203,7 @@ F 1 "0" H 3210 5470 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 3210 5470 60 0001 C CNN F 3 "" H 3210 5470 60 0000 C CNN 1 3300 5300 - -1 0 0 1 + -1 0 0 1 $EndComp $Comp L Cryptech_Alpha:R-EU_R0603 R85 @@ -222,16 +214,7 @@ F 1 "0" H 3170 6300 60 0000 R TNN F 2 "Cryptech_Alpha_Footprints:R_0402" H 3170 6300 60 0001 C CNN F 3 "" H 3170 6300 60 0000 C CNN 1 3300 6200 - -1 0 0 1 -$EndComp -$Comp -L Cryptech_Alpha:XC7A200TFBG484_3 U13_12 -U 1 1 58023EE7 -P 2200 7200 -F 0 "U13_12" H 1790 4190 60 0000 L BNN - 1 2200 7200 - 1 0 0 -1 -F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1790 4190 60 0001 C CNN + -1 0 0 1 $EndComp NoConn ~ 2400 5700 NoConn ~ 2400 5900 @@ -259,4 +242,19 @@ NoConn ~ 2400 9800 NoConn ~ 2400 9900 NoConn ~ 2400 5100 NoConn ~ 3600 6400 +Wire Wire Line + 2400 5600 4200 5600 +Wire Wire Line + 2600 4500 4200 4500 +$Comp +L Cryptech_Alpha:XC7A200TFBG484 U13 +U 3 1 5AFEFFED +P 2200 7100 +F 0 "U13" H 1306 9967 50 0000 C CNN +F 1 "XC7A200TFBG484" H 1306 9876 50 0000 C CNN +F 2 "" H 1800 7100 50 0001 C CNN +F 3 "" H 1800 7100 50 0001 C CNN + 3 2200 7100 + 1 0 0 -1 +$EndComp $EndSCHEMATC |