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-rw-r--r--rev03-KiCad/rev02_18.sch12
1 files changed, 6 insertions, 6 deletions
diff --git a/rev03-KiCad/rev02_18.sch b/rev03-KiCad/rev02_18.sch
index b862c6f..4acd2fd 100644
--- a/rev03-KiCad/rev02_18.sch
+++ b/rev03-KiCad/rev02_18.sch
@@ -334,11 +334,11 @@ Wire Wire Line
5500 9000 5500 9200
Wire Wire Line
7000 4800 6000 4800
-Text Label 6100 4800 0 48 ~
+Text GLabel 7000 4800 2 48 Output ~ 0
FPGA_VCCAUX_1V8
Wire Wire Line
7000 8000 6000 8000
-Text Label 6100 8000 0 48 ~
+Text GLabel 7000 8000 2 48 Output ~ 0
VCCO_3V3
Wire Wire Line
2100 6200 2100 6300
@@ -386,7 +386,7 @@ Wire Wire Line
2300 5200 1900 5200
Wire Wire Line
1900 4150 1900 5200
-Text Label 1900 4740 1 48 ~
+Text GLabel 1900 4150 0 48 Input ~ 0
PWR_ENA_VCCAUX
Wire Wire Line
1600 5800 1600 6200
@@ -482,19 +482,19 @@ Wire Wire Line
1900 7500 1900 8400
Wire Wire Line
1900 7500 1800 7500
-Text Label 1400 7500 0 48 ~
+Text GLabel 1400 7500 0 48 Input ~ 0
PWR_ENA_VCCO
Wire Wire Line
4000 6200 3900 6200
Wire Wire Line
4000 6200 4000 6500
-Text Label 4000 6200 3 48 ~
+Text GLabel 4000 6500 2 48 Output ~ 0
POK_VCCAUX
Wire Wire Line
4000 9400 3900 9400
Wire Wire Line
4000 9400 4000 9700
-Text Label 4000 9700 0 48 ~
+Text GLabel 4000 9700 2 48 Output ~ 0
POK_VCCO
Text Notes 2700 4440 0 60 ~ 12
U14