diff options
| -rwxr-xr-x | add-components.py | 435 | ||||
| -rwxr-xr-x | convert.sh | 44 |
2 files changed, 479 insertions, 0 deletions
diff --git a/add-components.py b/add-components.py new file mode 100755 index 0000000..eea96b3 --- /dev/null +++ b/add-components.py @@ -0,0 +1,435 @@ +#!/usr/bin/env python + +""" +Change all net labels from a static list into global labels +""" + +import os +import re +import sys +import pprint +from copy import copy + + +def print_lines(fn, out): + comp = {'rev02_00.sch': [], + 'rev02_01.sch': ['NoConn ~ 8700 8000', + # VCC5V0 symbol + 'Wire Wire Line', + ' 12300 6600 12300 6450', + '$Comp', + 'L Cryptech_Alpha:VCC_5V0 #PWR?', + 'U 1 1 5AF35ED8', + 'P 12300 6450', + 'F 0 "#PWR?" H 12300 6300 50 0001 C CNN', + 'F 1 "VCC_5V0" H 12315 6623 50 0000 C CNN', + 'F 2 "" H 12300 6450 60 0000 C CNN', + 'F 3 "" H 12300 6450 60 0000 C CNN', + ' 1 12300 6450', + ' 1 0 0 -1 ', + '$EndComp', + ], + 'rev02_02.sch': ['NoConn ~ 11500 5200', 'NoConn ~ 4250 6200'], + 'rev02_03.sch': ['NoConn ~ 9100 5100', + 'NoConn ~ 9100 5200', + 'NoConn ~ 9100 5300'], + 'rev02_04.sch': [], + 'rev02_05.sch': ['NoConn ~ 3100 5300', + 'NoConn ~ 3100 5400', + 'NoConn ~ 3100 5500', + 'NoConn ~ 3100 5600', + 'NoConn ~ 3100 5700', + 'NoConn ~ 3100 5800', + 'NoConn ~ 3100 6900', + 'NoConn ~ 3100 7000', + 'NoConn ~ 3100 7100', + 'NoConn ~ 3100 7700', + 'NoConn ~ 3100 7800', + 'NoConn ~ 3100 7900', + 'NoConn ~ 3100 8000', + 'NoConn ~ 3100 8100', + 'NoConn ~ 3100 8200', + 'NoConn ~ 3100 8300', + 'NoConn ~ 3100 8400', + 'NoConn ~ 6200 7600', + 'NoConn ~ 6200 7500', + 'NoConn ~ 6200 7400', + 'NoConn ~ 6200 7300', + 'NoConn ~ 6200 6900', + 'NoConn ~ 6200 6400', + 'NoConn ~ 6200 6100', + 'NoConn ~ 6200 6000', + 'NoConn ~ 6200 5900', + 'NoConn ~ 6200 5800', + 'NoConn ~ 6200 5700', + 'NoConn ~ 6200 5600', + 'NoConn ~ 6200 5500', + 'NoConn ~ 6200 5200', + 'NoConn ~ 6200 5000', + 'NoConn ~ 6200 4900', + 'NoConn ~ 6200 4800', + 'NoConn ~ 6200 4700', + 'NoConn ~ 6200 4200', + 'NoConn ~ 6200 3900', + 'NoConn ~ 6200 3800', + 'NoConn ~ 6200 3700', + 'NoConn ~ 6200 3600', + 'NoConn ~ 6200 3500', + 'NoConn ~ 6200 3400', + 'NoConn ~ 6200 3100', + 'NoConn ~ 6200 3000', + 'NoConn ~ 6200 2900', + 'NoConn ~ 6200 2800'], + 'rev02_06.sch': [], + 'rev02_07.sch': [], + 'rev02_08.sch': [], + 'rev02_09.sch': ['NoConn ~ 9500 3900', + 'NoConn ~ 9500 4000', + 'NoConn ~ 9500 4100', + 'NoConn ~ 9500 4300', + 'NoConn ~ 9500 4400', + 'NoConn ~ 9500 4500', + 'NoConn ~ 9500 4600', + 'NoConn ~ 9500 4700', + 'NoConn ~ 9500 4800', + 'NoConn ~ 9500 4900', + 'NoConn ~ 9500 5000', + 'NoConn ~ 9500 5100', + 'NoConn ~ 9500 5200', + 'NoConn ~ 7300 5100', + 'NoConn ~ 7300 5000', + 'NoConn ~ 7300 4900', + 'NoConn ~ 2000 3600'], + 'rev02_10.sch': ['NoConn ~ 9600 4000', + 'NoConn ~ 9600 4100', + 'NoConn ~ 9600 4200', + 'NoConn ~ 9600 4400', + 'NoConn ~ 9600 4500', + 'NoConn ~ 9600 4600', + 'NoConn ~ 9600 4700', + 'NoConn ~ 9600 4800', + 'NoConn ~ 9600 4900', + 'NoConn ~ 9600 5000', + 'NoConn ~ 9600 5100', + 'NoConn ~ 9600 5200', + 'NoConn ~ 9600 5300', + 'NoConn ~ 2100 3700', + 'NoConn ~ 7400 5000', + 'NoConn ~ 7400 5100', + 'NoConn ~ 7400 5200'], + 'rev02_11.sch': [], + 'rev02_12.sch': ['NoConn ~ 11400 5900'], + 'rev02_13.sch': [], + 'rev02_14.sch': ['NoConn ~ 5505 4800', + 'NoConn ~ 5500 4900', + 'NoConn ~ 2100 4800', + 'NoConn ~ 2100 4900', + 'NoConn ~ 2100 5000', + 'NoConn ~ 2100 5100', + 'NoConn ~ 2100 5200', + 'NoConn ~ 2100 5800', + 'NoConn ~ 2100 5900', + 'NoConn ~ 2100 6000', + 'NoConn ~ 2100 6100', + 'NoConn ~ 2100 6200', + 'NoConn ~ 2100 6300', + 'NoConn ~ 2100 6900', + 'NoConn ~ 2100 7000', + 'NoConn ~ 2100 7100', + 'NoConn ~ 2100 7200', + 'NoConn ~ 2100 7300', + 'NoConn ~ 2100 7400', + 'NoConn ~ 2100 7500', + 'NoConn ~ 2100 7600', + 'NoConn ~ 2100 7700', + 'NoConn ~ 2100 7800', + 'NoConn ~ 2100 7900', + 'NoConn ~ 2100 8000', + 'NoConn ~ 2100 8100', + 'NoConn ~ 2100 8300', + 'NoConn ~ 2100 8200', + 'NoConn ~ 2100 8400', + 'NoConn ~ 2100 8500', + 'NoConn ~ 2100 8600', + 'NoConn ~ 2100 8700', + 'NoConn ~ 2100 8800', + 'NoConn ~ 2100 8900'], + 'rev02_15.sch': [], + 'rev02_16.sch': ['NoConn ~ 2100 5100', + 'NoConn ~ 2100 5200', + 'NoConn ~ 2100 5300', + 'NoConn ~ 2100 5400', + 'NoConn ~ 2100 5500', + 'NoConn ~ 2100 5600', + 'NoConn ~ 2100 5700', + 'NoConn ~ 2100 5800', + 'NoConn ~ 2100 5900', + 'NoConn ~ 2100 6000', + 'NoConn ~ 2100 6100', + 'NoConn ~ 2100 6200', + 'NoConn ~ 2100 6300', + 'NoConn ~ 2100 6400', + 'NoConn ~ 2100 6500', + 'NoConn ~ 2100 6700', + 'NoConn ~ 2100 6600', + 'NoConn ~ 2100 6800', + 'NoConn ~ 2100 6900', + 'NoConn ~ 2100 7000', + 'NoConn ~ 2100 7100', + 'NoConn ~ 2100 7300', + 'NoConn ~ 2100 7200', + 'NoConn ~ 2100 7400', + 'NoConn ~ 2100 7500', + 'NoConn ~ 2100 7600', + 'NoConn ~ 2100 7700', + 'NoConn ~ 2100 7800', + 'NoConn ~ 2100 7900', + 'NoConn ~ 2100 8000', + 'NoConn ~ 2100 8100', + 'NoConn ~ 2100 8200', + 'NoConn ~ 2100 8300', + 'NoConn ~ 5600 5000', + 'NoConn ~ 5600 5100', + 'NoConn ~ 5600 5200', + 'NoConn ~ 5600 5300', + 'NoConn ~ 5600 5400', + 'NoConn ~ 5600 5500', + 'NoConn ~ 5600 5600', + 'NoConn ~ 5600 5700', + 'NoConn ~ 5600 5800', + 'NoConn ~ 5600 5900', + 'NoConn ~ 5600 6000', + 'NoConn ~ 5600 6100', + 'NoConn ~ 5600 6200', + 'NoConn ~ 5600 6300', + 'NoConn ~ 5600 6400', + 'NoConn ~ 5600 6500', + 'NoConn ~ 5600 6600', + 'NoConn ~ 5600 6700', + 'NoConn ~ 5600 6800', + 'NoConn ~ 5600 6900', + 'NoConn ~ 5600 7000', + 'NoConn ~ 5600 7100', + 'NoConn ~ 5600 7200', + 'NoConn ~ 5600 7400', + 'NoConn ~ 5600 7300', + 'NoConn ~ 5600 7500', + 'NoConn ~ 5600 7700', + 'NoConn ~ 5600 7600', + 'NoConn ~ 5600 7900', + 'NoConn ~ 5600 7800', + 'NoConn ~ 5600 8000', + 'NoConn ~ 5600 8100', + 'NoConn ~ 5600 8200', + 'NoConn ~ 5600 8300', + 'NoConn ~ 5600 8400', + 'NoConn ~ 5600 8500', + 'NoConn ~ 5600 8600', + 'NoConn ~ 5600 8800', + 'NoConn ~ 5600 8700', + 'NoConn ~ 5600 8900', + 'NoConn ~ 5600 9000', + 'NoConn ~ 5600 9100', + 'NoConn ~ 5600 9200', + 'NoConn ~ 5600 9300', + 'NoConn ~ 5600 9400', + 'NoConn ~ 5600 9500', + 'NoConn ~ 5600 9600', + 'NoConn ~ 5600 9800', + 'NoConn ~ 5600 9900', + 'NoConn ~ 5600 9700', + 'NoConn ~ 2100 8400', + 'NoConn ~ 2100 8500', + 'NoConn ~ 2100 8600', + 'NoConn ~ 2100 8700', + 'NoConn ~ 2100 8800', + 'NoConn ~ 2100 8900', + 'NoConn ~ 2100 9000', + 'NoConn ~ 2100 9300', + 'NoConn ~ 2100 9100', + 'NoConn ~ 2100 9200', + 'NoConn ~ 2100 9400', + 'NoConn ~ 2100 9500', + 'NoConn ~ 2100 9600', + 'NoConn ~ 2100 9700', + 'NoConn ~ 2100 9800', + 'NoConn ~ 2100 9900', + 'NoConn ~ 2100 10000'], + 'rev02_17.sch': ['NoConn ~ 1800 5700', + 'NoConn ~ 1800 5800', + 'NoConn ~ 1800 6000', + 'NoConn ~ 1800 7600', + 'NoConn ~ 1800 7800', + 'NoConn ~ 1800 7900', + 'NoConn ~ 1800 8000', + 'NoConn ~ 1800 8100', + 'NoConn ~ 1800 8200', + 'NoConn ~ 1800 8300', + 'NoConn ~ 1800 8500', + 'NoConn ~ 1800 8600', + 'NoConn ~ 1800 8900', + 'NoConn ~ 1800 9000', + 'NoConn ~ 1800 9400', + 'NoConn ~ 1800 9300', + 'NoConn ~ 1800 9700', + 'NoConn ~ 1800 9900', + 'NoConn ~ 1800 10000', + 'NoConn ~ 1800 10100', + 'NoConn ~ 6750 8200', + 'NoConn ~ 6750 8300', + 'NoConn ~ 6750 8400', + 'NoConn ~ 6750 8500', + 'NoConn ~ 6750 8600', + 'NoConn ~ 6750 8800', + 'NoConn ~ 6750 8900', + 'NoConn ~ 6750 7400', + 'NoConn ~ 6750 7200', + 'NoConn ~ 2950 5200'], + 'rev02_18.sch': ['NoConn ~ 3900 5800', + 'NoConn ~ 3900 9000', + # VCC 1V8 + 'Wire Wire Line', + ' 7000 4800 7000 4500', + '$Comp', + 'L Cryptech_Alpha:FPGA_VCCAUX_1V8 #PWR?', + 'U 1 1 5AF45C1F', + 'P 7000 4500', + 'F 0 "#PWR?" H 7000 4350 50 0001 C CNN', + 'F 1 "FPGA_VCCAUX_1V8" H 7015 4673 50 0000 C CNN', + 'F 2 "" H 7000 4500 60 0000 C CNN', + 'F 3 "" H 7000 4500 60 0000 C CNN', + ' 1 7000 4500', + ' 1 0 0 -1', + '$EndComp', + # VCC 3V3 + 'Wire Wire Line', + ' 7000 8000 7000 7800', + '$Comp', + 'L Cryptech_Alpha:VCCO_3V3 #PWR?', + 'U 1 1 5AF49BC2', + 'P 7000 7800', + 'F 0 "#PWR?" H 7000 7650 50 0001 C CNN', + 'F 1 "VCCO_3V3" H 7015 7973 50 0000 C CNN', + 'F 2 "" H 7000 7800 60 0000 C CNN', + 'F 3 "" H 7000 7800 60 0000 C CNN', + ' 1 7000 7800', + ' 1 0 0 -1', + '$EndComp', + ], + 'rev02_19.sch': ['NoConn ~ 1900 5000', + 'NoConn ~ 1900 5100', + 'NoConn ~ 1900 5900', + 'NoConn ~ 1900 6000', + 'NoConn ~ 1900 7100', + 'NoConn ~ 1900 7400', + 'NoConn ~ 1900 7600', + 'NoConn ~ 1900 7700', + 'NoConn ~ 1900 7800', + 'NoConn ~ 1900 8000', + 'NoConn ~ 1900 7900', + 'NoConn ~ 1900 8500', + 'NoConn ~ 1900 8600', + 'NoConn ~ 1900 8700', + 'NoConn ~ 1900 9000', + 'NoConn ~ 1900 9100', + 'NoConn ~ 1900 9300', + 'NoConn ~ 1900 9400', + 'NoConn ~ 1900 9500', + 'NoConn ~ 1900 9600', + 'NoConn ~ 1900 9700', + 'NoConn ~ 1900 9800', + 'NoConn ~ 1900 9900'], + 'rev02_20.sch': ['NoConn ~ 2400 5700', + 'NoConn ~ 2400 5900', + 'NoConn ~ 2400 5800', + 'NoConn ~ 2400 6000', + 'NoConn ~ 2400 6100', + 'NoConn ~ 2400 6300', + 'NoConn ~ 2400 7700', + 'NoConn ~ 2400 7900', + 'NoConn ~ 2400 8200', + 'NoConn ~ 2400 8400', + 'NoConn ~ 2400 8600', + 'NoConn ~ 2400 8700', + 'NoConn ~ 2400 8800', + 'NoConn ~ 2400 8900', + 'NoConn ~ 2400 9000', + 'NoConn ~ 2400 9100', + 'NoConn ~ 2400 9200', + 'NoConn ~ 2400 9300', + 'NoConn ~ 2400 9400', + 'NoConn ~ 2400 9500', + 'NoConn ~ 2400 9600', + 'NoConn ~ 2400 9700', + 'NoConn ~ 2400 9800', + 'NoConn ~ 2400 9900', + 'NoConn ~ 2400 5100'], + 'rev02_21.sch': [], + 'rev02_22.sch': [], + 'rev02_23.sch': [], + 'rev02_24.sch': ['NoConn ~ 5300 8100', + 'NoConn ~ 5300 8300', + 'NoConn ~ 3600 7400', + 'NoConn ~ 3600 7600', + 'NoConn ~ 3600 7800', + 'NoConn ~ 3600 8000', + 'NoConn ~ 3600 8200', + 'NoConn ~ 3600 8700', + 'NoConn ~ 5300 8700', + # VCC 1V0 symbol + 'Wire Wire Line', + ' 8300 6400 8300 6200', + '$Comp', + 'L Cryptech_Alpha:FPGA_VCCINT_1V0 #PWR?', + 'U 1 1 5AF3F25C', + 'P 8300 6200', + 'F 0 "#PWR?" H 8300 6050 50 0001 C CNN', + 'F 1 "FPGA_VCCINT_1V0" H 8315 6373 50 0000 C CNN', + 'F 2 "" H 8300 6200 60 0000 C CNN', + 'F 3 "" H 8300 6200 60 0000 C CNN', + ' 1 8300 6200', + ' 1 0 0 -1', + '$EndComp', + ], + 'rev02_25.sch': []} + if not comp.get(fn, []): + return + out.write('\n'.join(comp[fn])) + out.write('\n') + + +def add_components(fn_in, fn_out): + in_ = open(fn_in) + out = open(fn_out, 'w') + prev = None + fn = os.path.basename(fn_in) + print('Adding components to {}'.format(fn)) + for line in in_.readlines(): + #print('R: {!r}'.format(line)) + if line.startswith('$EndSCHEMATC'): + print_lines(fn, out) + out.write(line) + return True + + +def main(schemas): + for this in schemas: + fn = os.path.basename(this) + if add_components(this, this + '.tmp'): + os.rename(this + '.tmp', this) + + return True + + +if __name__ == '__main__': + try: + if len(sys.argv) == 0: + sys.stderr.write('Syntax: add-components.py *.sch\n') + sys.exit(1) + schemas = [x for x in sys.argv if x.endswith('.sch')] + res = main(schemas) + if res: + sys.exit(0) + sys.exit(1) + except KeyboardInterrupt: + pass @@ -99,6 +99,50 @@ done # Turn some labels into global labels. All labels seem to be global in Altium? ../fix-labels.py rev02*sch +# Add NotConnected and some other symbols +../add-components.py rev02*sch + +# Conversion seems to make all power pins power-input, change some to power-output +# LT3060ITS8-15 +sed -i -e 's/^X OUT 6 600 300 200 L 70 70 0 1 W$/X OUT 6 600 300 200 L 70 70 0 1 w/' Cryptech_Alpha.lib +# Voltage regulator outputs +#sed -i -e 's/^X VOUT \(.*\) W$/X VOUT \1 w/g' Cryptech_Alpha.lib +# Power jack +sed -i \ + -e 's/^X PWR 1 100 300 100 L 1 1 0 1 w$/X PWR 1 100 300 100 L 1 1 0 1 P/' \ + -e 's/^X GND 2 100 100 100 L 1 1 0 1 W$/X GND 2 100 100 100 L 1 1 0 1 P/' \ + -e 's/^X GNDBREAK 3 100 200 100 L 1 1 0 1 W$/X GNDBREAK 3 100 200 100 L 1 1 0 1 P/' \ + Cryptech_Alpha.lib +# VCCs +#sed -i \ +# -e 's/^X 3V3_BATT 1 0 0 0 U 50 50 1 1 w N$/X 3V3_BATT 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VPLL 1 0 0 0 U 50 50 1 1 w N$/X FT_VPLL 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VPHY 1 0 0 0 U 50 50 1 1 w N$/X FT_VPHY 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VREGIN 1 0 0 0 U 50 50 1 1 w N$/X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VCC3V3 1 0 0 0 U 50 50 1 1 w N$/X FT_VCC3V3 1 0 0 0 U 50 50 1 1 W N/' \ +# -e 's/^X FT_VREGIN 1 0 0 0 U 50 50 1 1 w N$/X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N/' \ +# Cryptech_Alpha.lib + +# Fix off-grid capacitor +sed -i \ + -e 's/^X + 1 110 0 10 L 1 1 0 1 P$/X + 1 100 0 10 L 1 1 0 1 P/' \ + -e 's/^X - 2 -110 0 10 R 1 1 0 1 P$/X - 2 -100 0 10 R 1 1 0 1 P/' \ + Cryptech_Alpha.lib + +# Component attributes seem to get added in a big pile on components +grep -v \ + -e '^T 0 -80 120 50 0 1 1 10% Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 50V Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 6.3V Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 X5R Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 X7R Normal 1 C C' \ + -e '^T 0 -220 -50 50 0 1 1 5% Normal 1 C C' \ + -e '^T 0 -220 40 50 0 1 1 5% Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 16V Normal 1 C C' \ + -e '^T 0 -80 120 50 0 1 1 20% Normal 1 C C' \ + Cryptech_Alpha.lib > Cryptech_Alpha.lib2 +mv Cryptech_Alpha.lib2 Cryptech_Alpha.lib + # KiCad nightly has changed how symbols are located ../remap-symbols.py rev02*sch |