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-rwxr-xr-xconvert.sh10
-rw-r--r--rev03-KiCad/Cryptech Alpha.kicad_pcb48811
2 files changed, 48821 insertions, 0 deletions
diff --git a/convert.sh b/convert.sh
index c0ce866..302cd33 100755
--- a/convert.sh
+++ b/convert.sh
@@ -7,6 +7,7 @@
set -e
+# this facilitates reproducible conversions, making all timestamps the same for consecutive runs
export A2K_STARTTIME="1476542686"
altiumdir="rev03-Altium"
@@ -51,6 +52,15 @@ sed -i -e 's/-SchDoc//g' *.{sch,lib}
sed -i -e 's/trace_min 0.254/trace_min 0.15/g' "Cryptech Alpha.kicad_pcb"
# show ratsnest
sed -i -e 's/visible_elements 7FFFF77F/visible_elements 7FFFFF7F/g' "Cryptech Alpha.kicad_pcb"
+# Power layers
+for l in 1 3 4 6; do
+ sed -i -e "s/${l} In${l}.Cu signal/${l} In${l}.Cu power/g" "Cryptech Alpha.kicad_pcb"
+done
+# Mixed layers
+for l in 2 5; do
+ sed -i -e "s/${l} In${l}.Cu signal/${l} In${l}.Cu mixed/g" "Cryptech Alpha.kicad_pcb"
+done
+
# Sheet number fixups. This hides all the hierarchical sub-sheets from the project view.
num_sheets=$(ls Cryptech\ Alpha.sch rev02*sch | wc -l)
diff --git a/rev03-KiCad/Cryptech Alpha.kicad_pcb b/rev03-KiCad/Cryptech Alpha.kicad_pcb
index a780446..1545df1 100644
--- a/rev03-KiCad/Cryptech Alpha.kicad_pcb
+++ b/rev03-KiCad/Cryptech Alpha.kicad_pcb
@@ -14,6 +14,19 @@
(page A4)
(layers
+<<<<<<< HEAD
+ (0 F.Cu signal)
+ (1 In1.Cu power)
+ (2 In2.Cu mixed)
+ (3 In3.Cu power)
+ (4 In4.Cu power)
+ (5 In5.Cu mixed)
+ (6 In6.Cu power)
+
+ (31 B.Cu signal)
+ (32 B.Adhes user)
+ (33 F.Adhes user)
+=======
(0 F.Cu signal hide)
(1 In1.Cu power hide)
(2 In2.Cu mixed)
@@ -24,6 +37,7 @@
(31 B.Cu signal hide)
(32 B.Adhes user hide)
(33 F.Adhes user hide)
+>>>>>>> local-tests
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user hide)
@@ -68,7 +82,11 @@
(pad_drill 0.800001)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
+<<<<<<< HEAD
+ (visible_elements 7FFFFF7F)
+=======
(visible_elements 7FFCCE1F)
+>>>>>>> local-tests
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
@@ -748,6 +766,64 @@
(fp_text value "Connector; Header; 10 Position" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:0 pos:0(0x0) type:1 net:17
+#010000000005000000047C267C300100000000AA0000004A0C001100FFFF0000FFFFFFFF079E8C0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "3" thru_hole circle (at 5.08000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 19 "AVR_GPIO_1")
+ )
+#1309 counter:1 pos:204(0xCC) type:1 net:5
+#010000000005000000047C267C300100000000AA0000004A0C000500FFFF0000FFFFFFFFC76DF70563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000007000101010101010101010000000000000000000F0003010000
+ (pad "10" thru_hole circle (at 22.86000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:2 pos:409(0x199) type:1 net:23
+#010000000005000000047C267C300100000000AA0000004A0C001700FFFF0000FFFFFFFF872BE80563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "9" thru_hole circle (at 20.32000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 25 "AVR_GPIO_7")
+ )
+#1309 counter:3 pos:613(0x265) type:1 net:22
+#010000000005000000047C267C300100000000AA0000004A0C001600FFFF0000FFFFFFFF47E9D80563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "8" thru_hole circle (at 17.78000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 24 "AVR_GPIO_6")
+ )
+#1309 counter:4 pos:817(0x331) type:1 net:21
+#010000000005000000047C267C300100000000AA0000004A0C001500FFFF0000FFFFFFFF07A7C90563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "7" thru_hole circle (at 15.24000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 23 "AVR_GPIO_5")
+ )
+#1309 counter:5 pos:1021(0x3FD) type:1 net:20
+#010000000005000000047C267C300100000000AA0000004A0C001400FFFF0000FFFFFFFFC764BA0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "6" thru_hole circle (at 12.70000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 22 "AVR_GPIO_4")
+ )
+#1309 counter:6 pos:1225(0x4C9) type:1 net:19
+#010000000005000000047C267C300100000000AA0000004A0C001300FFFF0000FFFFFFFF8722AB0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "5" thru_hole circle (at 10.16000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 21 "AVR_GPIO_3")
+ )
+#1309 counter:7 pos:1429(0x595) type:1 net:18
+#010000000005000000047C267C300100000000AA0000004A0C001200FFFF0000FFFFFFFF47E09B0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "4" thru_hole circle (at 7.62000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 20 "AVR_GPIO_2")
+ )
+#1309 counter:8 pos:1633(0x661) type:1 net:16
+#010000000005000000047C267C300100000000AA0000004A0C001000FFFF0000FFFFFFFFC75B7D0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "2" thru_hole circle (at 2.54000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 18 "AVR_GPIO_0")
+ )
+#1309 counter:9 pos:1837(0x72D) type:2 net:301
+#010000000005000000047C267C300100000000AA0000004A0C002D01FFFF0000FFFFFFFF87196E0563875F01D7020900D7020900D7020900D7020900D7020900D7020900E501060002020200000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000008000101010101010101010000000000000000000F0003010000
+ (pad "1" thru_hole rect (at 0.00000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+
+ )
+#Components#1: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11183.4152mil|Y=3791.9685mil|PATTERN=PLS-2|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=JP6|SOURCEUNIQUEID=\NOUSWGVF|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Connectors.PcbLib|SOURCECOMPONENTLIBRARY=jumper.IntLib|SOURCELIBREFERENCE=JP1Q|SOURCEDESCRIPTION=Wurth 2pins connector (for jumper)|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=MJLNOLGI|JUMPERSVISIBLE=TRUE
+#$pads{1}
+ (module "PLS-2" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+=======
(pad 3 thru_hole circle (at 5.08 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 18 AVR_GPIO_1))
(pad 10 thru_hole circle (at 22.86 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -771,6 +847,7 @@
)
(module PLS-2 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+>>>>>>> local-tests
(at 84.160746 -31.8)
(path /539EEC0F)
(attr smd)
@@ -780,11 +857,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:10 pos:2041(0x7F9) type:2 net:5
+#010000000005000000047C267C300100000000AA0000004A0C000500FFFF0100FFFFFFFF2774AA06A6FA3A02D7020900D7020900D7020900D7020900D7020900D7020900E501060002020200000000008056400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000005000101010101010101010000000000000000000F0003010000
+ (pad "1" thru_hole rect (at -0.00000 1.27000 90) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:11 pos:2245(0x8C5) type:1 net:210
+#010000000005000000047C267C300100000000AA0000004A0C00D200FFFF0100FFFFFFFF2774AA06E63C4A02D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000008056400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000
+ (pad "2" thru_hole circle (at -0.00000 -1.27000 90) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 212 "MKM_AVR_MISO")
+ )
+#1365
+ (model "wrlshp/3416A7AC-A52A.wrl"
+=======
(pad 1 thru_hole rect (at 0 1.27 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 6 GND))
(pad 2 thru_hole circle (at 0 -1.27 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 211 MKM_AVR_MISO))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/3416A7AC-A52A.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -801,11 +894,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1730 pos:357542(0x574A6) type:2 net:5
+#010000000005000000047C267C300100000000AA000000200C000500FFFF0200FFFFFFFF87D03A0590D1D603A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:1731 pos:357746(0x57572) type:2 net:282
+#010000000005000000047C267C300100000000AA000000200C001A01FFFF0200FFFFFFFFD9CA280590D1D603A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 283 PWR_18V))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -822,11 +931,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1728 pos:357134(0x5730E) type:2 net:282
+#010000000005000000047C267C300100000000AA000000200C001A01FFFF0300FFFFFFFFD9CA2805B8AEB803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
+ )
+#1309 counter:1729 pos:357338(0x573DA) type:2 net:5
+#010000000005000000047C267C300100000000AA000000200C000500FFFF0300FFFFFFFF87D03A05B8AEB803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 283 PWR_18V))
(pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -843,11 +968,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1726 pos:356726(0x57176) type:2 net:5
+#010000000005000000047C267C300100000000AA000000200C000500FFFF0400FFFFFFFF87D03A05E08B9A03A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:1727 pos:356930(0x57242) type:2 net:282
+#010000000005000000047C267C300100000000AA000000200C001A01FFFF0400FFFFFFFFD9CA2805E08B9A03A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 283 PWR_18V))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -864,11 +1005,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1682 pos:347750(0x54E66) type:2 net:282
+#010000000005000000047C267C300100000000AA000000200C001A01FFFF0500FFFFFFFFF5A74A05596680030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
+ )
+#1309 counter:1683 pos:347954(0x54F32) type:2 net:5
+#010000000005000000047C267C300100000000AA000000200C000500FFFF0500FFFFFFFFDAA95005596680030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 283 PWR_18V))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -885,11 +1042,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1680 pos:347342(0x54CCE) type:2 net:5
+#010000000005000000047C267C300100000000AA000000200C000500FFFF0600FFFFFFFF025C4D05C07B4A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:1681 pos:347546(0x54D9A) type:2 net:223
+#010000000005000000047C267C300100000000AA000000200C00DF00FFFF0600FFFFFFFF1D5A4705C07B4A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 225 "NetC5_1")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 224 NetC5_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -906,11 +1079,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1678 pos:346934(0x54B36) type:2 net:300
+#010000000005000000047C267C300100000000AA000000200C002C01FFFF0700FFFFFFFFDE844705801733030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
+#1309 counter:1679 pos:347138(0x54C02) type:2 net:5
+#010000000005000000047C267C300100000000AA000000200C000500FFFF0700FFFFFFFFC3864D05801733030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -927,11 +1116,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:445 pos:92763(0x16A5B) type:2 net:5
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 284 "PWR_18V")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 283 PWR_18V))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -948,11 +1153,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 1.50000 0.00000 180) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
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+ (pad "2" smd rect (at -1.50000 0.00000 180) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -969,11 +1190,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
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+ (pad "2" smd rect (at -3.25000 0.00000 180) (size 2.4000003 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/5917D381-109F.wrl"
+=======
(pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -990,11 +1227,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -3.25000 0.00000 180) (size 2.4000003 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/5917D381-109F.wrl"
+=======
(pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1011,11 +1264,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:373 pos:78075(0x130FB) type:2 net:4
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 6 "15V_STABLE")
+ )
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 226 "NetC11_1")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 5 15V_STABLE))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 225 NetC11_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1032,11 +1301,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 227 "NetC12_2")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 226 NetC12_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -1053,11 +1338,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:443 pos:92355(0x168C3) type:2 net:4
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+ (pad "1" smd rect (at -0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 6 "15V_STABLE")
+ )
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+ (pad "2" smd rect (at -0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 5 15V_STABLE))
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1074,11 +1375,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 276 "NOISE_IN")
+ )
+#1309 counter:1677 pos:346730(0x54A6A) type:2 net:5
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 275 NOISE_IN))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1095,11 +1412,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 288 "RAW_NOISE")
+ )
+#1309 counter:1675 pos:346322(0x548D2) type:2 net:6
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 8 "NetC15_2")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 287 RAW_NOISE))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 7 NetC15_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1116,11 +1449,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1309 counter:1673 pos:345914(0x5473A) type:2 net:5
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1137,11 +1486,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 228 "NetC17_2")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 227 NetC17_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -1158,11 +1523,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 280 "OSC_OUT")
+ )
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+ (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 279 OSC_OUT))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1179,11 +1560,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1200,11 +1597,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 278 "NRST")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 277 NRST))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1221,11 +1634,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/175C1D2E-5B2D.wrl"
+=======
(pad 2 smd rect (at 0.7 0) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.7 0) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -1242,11 +1671,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.70000 0.00000 180) (size 0.8000009 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "2" smd rect (at -0.70000 0.00000 180) (size 0.8000009 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 300 "VCAP1")
+ )
+#1365
+ (model "wrlshp/175C1D2E-5B2D.wrl"
+=======
(pad 1 smd rect (at 0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 2 smd rect (at -0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 299 VCAP1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1263,11 +1708,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.70000 0.00000 180) (size 0.8000009 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 300 "VCAP1")
+ )
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+ (pad "1" smd rect (at 0.70000 0.00000 180) (size 0.8000009 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/175C1D2E-5B2D.wrl"
+=======
(pad 2 smd rect (at -0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 299 VCAP1))
(pad 1 smd rect (at 0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1284,11 +1745,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.70000 90) (size 0.8000009 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.70000 90) (size 0.8000009 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 301 "VCAP2")
+ )
+#1365
+ (model "wrlshp/175C1D2E-5B2D.wrl"
+=======
(pad 1 smd rect (at 0 0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 2 smd rect (at 0 -0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 300 VCAP2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1305,11 +1782,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.70000 90) (size 0.8000009 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 301 "VCAP2")
+ )
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+ (pad "1" smd rect (at 0.00000 0.70000 90) (size 0.8000009 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/175C1D2E-5B2D.wrl"
+=======
(pad 2 smd rect (at 0 -0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 300 VCAP2))
(pad 1 smd rect (at 0 0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1326,11 +1819,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1700 pos:351422(0x55CBE) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:1701 pos:351626(0x55D8A) type:2 net:301
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+ (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1347,11 +1856,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1368,11 +1893,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1389,11 +1930,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1410,11 +1967,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1431,11 +2004,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -1452,11 +2041,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1473,11 +2078,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1494,11 +2115,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1515,11 +2152,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1536,11 +2189,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1557,11 +2226,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1578,11 +2263,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -1599,11 +2300,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1648 pos:340814(0x5334E) type:2 net:5
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -1620,11 +2337,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1641,11 +2374,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1644 pos:339998(0x5301E) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1662,11 +2411,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -1683,11 +2448,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -1704,11 +2485,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -1725,11 +2522,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1746,11 +2559,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1767,11 +2596,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1788,11 +2633,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1809,11 +2670,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1830,11 +2707,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1851,11 +2744,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1872,11 +2781,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1893,11 +2818,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1914,11 +2855,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1935,11 +2892,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1956,11 +2929,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:343 pos:71955(0x11913) type:2 net:301
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+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1977,11 +2966,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -1998,11 +3003,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2019,11 +3040,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2040,11 +3077,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2061,11 +3114,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2082,11 +3151,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2103,11 +3188,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2124,11 +3225,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2145,11 +3262,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2166,11 +3299,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2187,11 +3336,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2208,11 +3373,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1309 counter:1613 pos:333674(0x5176A) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2229,11 +3410,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -2250,11 +3447,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 229 "NetC70_2")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 228 NetC70_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2271,11 +3484,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 230 "NetC71_2")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 229 NetC71_2))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2292,11 +3521,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 1.00000 -0.00000) (size 1.0 1.2000001)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -1.00000 -0.00000) (size 1.0 1.2000001)
+ (layers B.Cu B.Mask B.Paste) (net 206 "FT_VREGIN")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 1 0) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -1 0) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 205 FT_VREGIN))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -2313,11 +3558,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 206 "FT_VREGIN")
+ )
+#1309 counter:1611 pos:333266(0x515D2) type:2 net:5
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+ (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 205 FT_VREGIN))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -2334,11 +3595,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:334 pos:70119(0x111E7) type:2 net:201
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 203 "FT_VCCORE")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 202 FT_VCCORE))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2355,11 +3632,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 231 "NetC75_2")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 230 NetC75_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2376,11 +3669,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:330 pos:69303(0x10EB7) type:2 net:199
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 201 "FT_VCCA")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 200 FT_VCCA))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2397,11 +3706,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:441 pos:91947(0x1672B) type:2 net:202
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+ (pad "1" smd rect (at -0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 204 "FT_VPHY")
+ )
+#1309 counter:442 pos:92151(0x167F7) type:2 net:5
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+ (pad "2" smd rect (at -0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 203 FT_VPHY))
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2418,11 +3743,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 232 "NetC78_2")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 231 NetC78_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2439,11 +3780,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:325 pos:68283(0x10ABB) type:2 net:5
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:326 pos:68487(0x10B87) type:2 net:202
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 204 "FT_VPHY")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 203 FT_VPHY))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2460,11 +3817,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:439 pos:91539(0x16593) type:2 net:5
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+ (pad "2" smd rect (at -0.00000 -1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:440 pos:91743(0x1665F) type:2 net:203
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+ (pad "1" smd rect (at -0.00000 1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 205 "FT_VPLL")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 204 FT_VPLL))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2481,11 +3854,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 205 "FT_VPLL")
+ )
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 204 FT_VPLL))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2502,11 +3891,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
+ )
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+ (pad "2" smd rect (at -0.00000 -1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 198 FT_VCC3V3))
(pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2523,11 +3928,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 198 FT_VCC3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -2544,11 +3965,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 198 FT_VCC3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -2565,11 +4002,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 198 FT_VCC3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2586,11 +4039,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
+ )
+#1309 counter:316 pos:66447(0x1038F) type:2 net:5
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 198 FT_VCC3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -2607,11 +4076,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0 1.2000001)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0 1.2000001)
+ (layers B.Cu B.Mask B.Paste) (net 189 "FT_MGMT_VREGIN")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 188 FT_MGMT_VREGIN))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2628,11 +4113,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 189 "FT_MGMT_VREGIN")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 188 FT_MGMT_VREGIN))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2649,11 +4150,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 202 "FT_VCCORE1")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 201 FT_VCCORE1))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -2670,11 +4187,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 233 "NetC90_2")
+ )
+#1309 counter:312 pos:65631(0x1005F) type:2 net:5
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+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 232 NetC90_2))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -2691,11 +4224,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 200 "FT_VCCA1")
+ )
+#1309 counter:310 pos:65223(0xFEC7) type:2 net:5
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 199 FT_VCCA1))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -2712,11 +4261,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 187 "FT_MGMT_VPHY")
+ )
+#1309 counter:436 pos:90927(0x1632F) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 186 FT_MGMT_VPHY))
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2733,11 +4298,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 234 "NetC93_2")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 233 NetC93_2))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -2754,11 +4335,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 187 "FT_MGMT_VPHY")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 186 FT_MGMT_VPHY))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2775,11 +4372,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 188 "FT_MGMT_VPLL")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 187 FT_MGMT_VPLL))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2796,11 +4409,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 188 "FT_MGMT_VPLL")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 187 FT_MGMT_VPLL))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2817,11 +4446,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
+ )
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 185 FT_MGMT_VCC3V3))
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -2838,11 +4483,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 185 FT_MGMT_VCC3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2859,11 +4520,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 185 FT_MGMT_VCC3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2880,11 +4557,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 185 FT_MGMT_VCC3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2901,11 +4594,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 185 FT_MGMT_VCC3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -2922,11 +4631,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 1.00000 -0.00000) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -1.00000 -0.00000) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 3V3_BATT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -2943,11 +4668,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
+ )
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+ (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 3V3_BATT))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -2964,11 +4705,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 3V3_BATT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -2985,11 +4742,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3006,11 +4779,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 3V3_BATT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3027,11 +4816,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 3V3_BATT))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3048,11 +4853,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3069,11 +4890,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3090,11 +4927,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3111,11 +4964,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3132,11 +5001,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3153,11 +5038,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 1.50000 90) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3174,11 +5075,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1720 pos:355502(0x56CAE) type:2 net:300
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+ (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
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+ (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3195,11 +5112,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 235 "NetC115_1")
+ )
+#1309 counter:1601 pos:331226(0x50DDA) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 234 NetC115_1))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3216,11 +5149,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 236 "NetC116_1")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 235 NetC116_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3237,11 +5186,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 238 "NetC117_2")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 236 NetC117_1))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 237 NetC117_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3258,11 +5223,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 240 "NetC118_2")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 239 NetC118_2))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 238 NetC118_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3279,11 +5260,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 236 NetC117_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3300,11 +5297,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
+ )
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+ (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 238 NetC118_1))
(pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3321,11 +5334,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3342,11 +5371,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3363,11 +5408,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (pad "1" smd rect (at 0.00000 3.25000 90) (size 2.4000003 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
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+ (pad "2" smd rect (at 0.00000 -3.25000 90) (size 2.4000003 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/5917D381-109F.wrl"
+=======
(pad 1 smd rect (at 0 3.25 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0 -3.25 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3384,11 +5445,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3405,11 +5482,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3426,11 +5519,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3447,11 +5556,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -3.25000 -0.00000 180) (size 2.4000003 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/5917D381-109F.wrl"
+=======
(pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3468,11 +5593,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3489,11 +5630,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3510,11 +5667,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3531,11 +5704,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3552,11 +5741,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -1.00000 0.00000) (size 1.0 1.2000001)
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3573,11 +5778,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3594,11 +5815,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
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+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3615,11 +5852,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3636,11 +5889,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3657,11 +5926,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3678,11 +5963,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3699,11 +6000,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -1.00000 0.00000) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
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+ (pad "2" smd rect (at 1.00000 0.00000) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3720,11 +6037,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3741,11 +6074,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3762,11 +6111,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3783,11 +6148,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3804,11 +6185,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3825,11 +6222,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3846,11 +6259,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3867,11 +6296,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3888,11 +6333,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3909,11 +6370,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -3930,11 +6407,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3951,11 +6444,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
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+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -3972,11 +6481,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3993,11 +6518,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4014,11 +6555,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4035,11 +6592,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4056,11 +6629,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4077,11 +6666,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0 1.2000001)
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+ )
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4098,11 +6703,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4119,11 +6740,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4140,11 +6777,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4161,11 +6814,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4182,11 +6851,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4203,11 +6888,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4224,11 +6925,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 175 FPGA_VCCINT_1V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -4245,11 +6962,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 1.50000 0.00000 180) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -1.50000 0.00000 180) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4266,11 +6999,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -1.50000 0.00000 180) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 1.50000 0.00000 180) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4287,11 +7036,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1309 counter:454 pos:94599(0x17187) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4308,11 +7073,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:451 pos:93987(0x16F23) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4329,11 +7110,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:397 pos:82971(0x1441B) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4350,11 +7147,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4371,11 +7184,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4392,11 +7221,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4413,11 +7258,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4434,11 +7295,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4455,11 +7332,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4476,11 +7369,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4497,11 +7406,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 1.00000 0.00000) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -1.00000 0.00000) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -4518,11 +7443,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4539,11 +7480,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:377 pos:78891(0x1342B) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:378 pos:79095(0x134F7) type:2 net:301
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+ (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4560,11 +7517,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -1.00000 0.00000) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 1.00000 0.00000) (size 1.0 1.2000001)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/68E8DA21-73BF.wrl"
+=======
(pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -4581,11 +7554,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4602,11 +7591,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -4623,11 +7628,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4644,11 +7665,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4665,11 +7702,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4686,11 +7739,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4707,11 +7776,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4728,11 +7813,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4749,11 +7850,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4770,11 +7887,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -4791,11 +7924,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4812,11 +7961,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4833,11 +7998,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4854,11 +8035,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4875,11 +8072,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4896,11 +8109,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -4917,11 +8146,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -4938,11 +8183,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -4959,11 +8220,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1309 counter:200 pos:42783(0xA71F) type:2 net:5
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -4980,11 +8257,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5001,11 +8294,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5022,11 +8331,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5043,11 +8368,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5064,11 +8405,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5085,11 +8442,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1714 pos:354278(0x567E6) type:2 net:300
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+ (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
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+ (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -5106,11 +8479,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1712 pos:353870(0x5664E) type:2 net:5
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+ (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -5127,11 +8516,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1590 pos:328982(0x50516) type:2 net:239
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 241 "NetC207_1")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 240 NetC207_1))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5148,11 +8553,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 243 "NetC208_2")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 242 NetC208_2))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 241 NetC208_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5169,11 +8590,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1710 pos:353462(0x564B6) type:2 net:240
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+ (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1")
+ )
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+ (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 241 NetC208_1))
(pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5190,11 +8627,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:1709 pos:353258(0x563EA) type:2 net:240
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+ (pad "1" smd rect (at 0.00000 1.50000 90) (size 1.5999993 2.5999999)
+ (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1")
+ )
+#1365
+ (model "wrlshp/F26EE9BE-B6B0.wrl"
+=======
(pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
(net 241 NetC208_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5211,11 +8664,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 286 "PWR_ENA_VCCINT")
+ )
+#1309 counter:188 pos:40335(0x9D8F) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 285 PWR_ENA_VCCINT))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5232,11 +8701,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:185 pos:39723(0x9B2B) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 287 "PWR_ENA_VCCO")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 286 PWR_ENA_VCCO))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5253,11 +8738,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 285 "PWR_ENA_VCCAUX")
+ )
+#1309 counter:184 pos:39519(0x9A5F) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 284 PWR_ENA_VCCAUX))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5274,11 +8775,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 206 "FT_VREGIN")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 205 FT_VREGIN))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5295,11 +8812,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 189 "FT_MGMT_VREGIN")
+ )
+#1309 counter:180 pos:38703(0x972F) type:2 net:5
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/ECAF1ED8-FCC0.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 188 FT_MGMT_VREGIN))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -5310,6 +8843,72 @@
(at 65 14.900001)
(path /539EEC0F)
(attr smd)
+<<<<<<< HEAD
+ (fp_text reference "CN1" (at 0 0) (layer F.SilkS) hide
+ (effects (font (thickness 0.05)))
+ )
+ (fp_text value "USB-MINIB" (at 0 0) (layer F.SilkS) hide
+ (effects (font (thickness 0.05)))
+ )
+
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+ (pad "" np_thru_hole circle (at 2.20980 -1.01600) (size 1.0160000 1.0160000) (drill 1.1000003)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste)
+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste)
+ )
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+ )
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+ (pad "GND" smd rect (at 4.36000 -3.50520) (size 1.5999993 2.0000011)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/23D50C2B-5C98.wrl"
+=======
(fp_text reference CN1 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
@@ -5336,6 +8935,7 @@
(pad GND smd rect (at -4.34 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/23D50C2B-5C98.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5346,6 +8946,72 @@
(at 85 14.900001)
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+ (effects (font (thickness 0.05)))
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/23D50C2B-5C98.wrl"
+=======
(fp_text reference CN2 (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
@@ -5372,6 +9038,7 @@
(pad GND smd rect (at 4.36 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/23D50C2B-5C98.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5388,12 +9055,33 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (layers B.Cu B.Mask B.Paste) (net 8 "NetC15_2")
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
(net 8 AMPLIFIED))
(pad 2 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask))
(pad 1 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
(net 7 NetC15_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
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(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5410,12 +9098,33 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 285 PWR_ENA_VCCINT))
(pad 2 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
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(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5432,12 +9141,33 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 287 "PWR_ENA_VCCO")
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 280 POK_VCCAUX))
(pad 2 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 286 PWR_ENA_VCCO))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5454,12 +9184,33 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT")
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 1 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 284 PWR_ENA_VCCAUX))
(pad 2 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 281 POK_VCCINT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5476,11 +9227,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (pad "1" smd rect (at -0.00000 -0.85000) (size 1.0 0.9000007)
+ (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
+ )
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+ (pad "2" smd rect (at -0.00000 0.85000) (size 1.0 0.9000007)
+ (layers F.Cu F.Mask F.Paste) (net 204 "FT_VPHY")
+ )
+#1365
+ (model "wrlshp/AF13F747-700F.wrl"
+=======
(pad 1 smd rect (at 0 -0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
(net 198 FT_VCC3V3))
(pad 2 smd rect (at 0 0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
(net 203 FT_VPHY))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5497,11 +9264,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.85000 0.00000 90) (size 1.0 0.9000007)
+ (layers F.Cu F.Mask F.Paste) (net 205 "FT_VPLL")
+ )
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+ (pad "1" smd rect (at -0.85000 0.00000 90) (size 1.0 0.9000007)
+ (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
+ )
+#1365
+ (model "wrlshp/AF13F747-700F.wrl"
+=======
(pad 2 smd rect (at 0.85 0 90) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
(net 204 FT_VPLL))
(pad 1 smd rect (at -0.85 0 90) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
(net 198 FT_VCC3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -5518,11 +9301,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.85000) (size 1.0 0.9000007)
+ (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
+ )
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+ (pad "2" smd rect (at 0.00000 0.85000) (size 1.0 0.9000007)
+ (layers F.Cu F.Mask F.Paste) (net 187 "FT_MGMT_VPHY")
+ )
+#1365
+ (model "wrlshp/AF13F747-700F.wrl"
+=======
(pad 1 smd rect (at 0 -0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
(net 185 FT_MGMT_VCC3V3))
(pad 2 smd rect (at 0 0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
(net 186 FT_MGMT_VPHY))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5539,11 +9338,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.85000) (size 1.0 0.9000007)
+ (layers F.Cu F.Mask F.Paste) (net 188 "FT_MGMT_VPLL")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
+ )
+#1365
+ (model "wrlshp/AF13F747-700F.wrl"
+=======
(pad 2 smd rect (at 0 0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
(net 187 FT_MGMT_VPLL))
(pad 1 smd rect (at 0 -0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
(net 185 FT_MGMT_VCC3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5560,11 +9375,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 1.40000 0.00000 270) (size 1.7999989 1.3999997)
+ (layers B.Cu B.Mask B.Paste) (net 175 "FPGA_VCCAUX_1V8")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
+ )
+#1365
+ (model "wrlshp/76148CD0-6DD3.wrl"
+=======
(pad 2 smd rect (at 1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
(net 174 FPGA_VCCAUX_1V8))
(pad 1 smd rect (at -1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
(net 236 NetC117_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5581,11 +9412,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -1.40000 0.00000 270) (size 1.7999989 1.3999997)
+ (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/76148CD0-6DD3.wrl"
+=======
(pad 1 smd rect (at -1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
(net 238 NetC118_1))
(pad 2 smd rect (at 1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5602,11 +9449,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 -1.40000) (size 1.7999989 1.3999997)
+ (layers B.Cu B.Mask B.Paste) (net 176 "FPGA_VCCINT_1V0")
+ )
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+ (pad "1" smd rect (at 0.00000 1.40000) (size 1.7999989 1.3999997)
+ (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1")
+ )
+#1365
+ (model "wrlshp/76148CD0-6DD3.wrl"
+=======
(pad 2 smd rect (at 0 -1.4) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
(net 175 FPGA_VCCINT_1V0))
(pad 1 smd rect (at 0 1.4) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
(net 241 NetC208_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5831,6 +9694,41 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste)
+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 278 "NRST")
+ )
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+ (pad "4" thru_hole circle (at 1.27000 0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 295 "SWDIO")
+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "2" thru_hole circle (at -3.81000 0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 294 "SWDCLK")
+ )
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+ (pad "1" thru_hole rect (at -6.35000 0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/670BFB14-85C2.wrl"
+=======
(pad 6 thru_hole circle (at 6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask))
(pad 5 thru_hole circle (at 3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 277 NRST))
@@ -5843,6 +9741,7 @@
(pad 1 thru_hole rect (at -6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/670BFB14-85C2.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5859,6 +9758,41 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 206 "FT_VREGIN")
+ )
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+ )
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+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 195 "FT_RXD1")
+ )
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+ (pad "6" thru_hole circle (at 2.54000 -1.27000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 197 "FT_TXD1")
+ )
+#1365
+ (model "wrlshp/B3089A96-FA19.wrl"
+=======
(pad 1 thru_hole rect (at -2.54 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 6 GND))
(pad 2 thru_hole circle (at -2.54 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -5872,6 +9806,7 @@
(pad 6 thru_hole circle (at 2.54 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 196 FT_TXD1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5888,6 +9823,41 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (pad "2" thru_hole circle (at -2.54000 -1.27000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 189 "FT_MGMT_VREGIN")
+ )
+#1309 counter:26 pos:5305(0x14B9) type:2 net:5
+#010000000005000000047C267C300100000000AA0000004A0C000500FFFFEE00FFFFFFFFEE966306702BC701D7020900D7020900D7020900D7020900D7020900D7020900E501060002020200000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000007000101010101010101010000000000000000000F0003010000
+ (pad "1" thru_hole rect (at -2.54000 1.27000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/B3089A96-FA19.wrl"
+=======
(pad 6 thru_hole circle (at 2.54 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 183 FT_MGMT_TXD1))
(pad 5 thru_hole circle (at 2.54 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -5901,6 +9871,7 @@
(pad 1 thru_hole rect (at -2.54 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5917,6 +9888,26 @@
(fp_text value "Wurth DC Power Jack, 2.1mm, PCB Mount" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "3" thru_hole oval (at 4.80000 -10.60000 90) (size 4.5000012 2.0000011) (drill 0.8000009)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "2" thru_hole oval (at -0.00000 -7.80000 90) (size 2.0000011 4.5000012) (drill 0.8000009)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:53 pos:12111(0x2F4F) type:1 net:282
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+ (pad "1" thru_hole oval (at -0.00000 -13.60000 90) (size 2.0000011 4.5000012) (drill 0.8000009)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 284 "PWR_18V")
+ )
+#1365
+ (model "wrlshp/51D2E761-0F4D.wrl"
+=======
(pad 3 thru_hole oval (at 4.8 -10.6 90) (size 4.500001 2.000001) (drill 0.800001) (layers *.Cu *.Paste *.Mask)
(net 6 GND))
(pad 2 thru_hole oval (at 0 -7.8 90) (size 2.000001 4.500001) (drill 0.800001) (layers *.Cu *.Paste *.Mask)
@@ -5924,6 +9915,7 @@
(pad 1 thru_hole oval (at 0 -13.6 90) (size 2.000001 4.500001) (drill 0.800001) (layers *.Cu *.Paste *.Mask)
(net 283 PWR_18V))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/51D2E761-0F4D.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5940,11 +9932,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:54 pos:12966(0x32A6) type:1 net:243
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+ (pad "2" thru_hole circle (at 1.27000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 245 "NetJP2_2")
+ )
+#1309 counter:55 pos:13170(0x3372) type:2 net:3
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+ (pad "1" thru_hole rect (at -1.27000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 5 "15V_LDO_ENABLE")
+ )
+#1365
+ (model "wrlshp/3416A7AC-A52A.wrl"
+=======
(pad 2 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 244 NetJP2_2))
(pad 1 thru_hole rect (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 4 15V_LDO_ENABLE))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/3416A7AC-A52A.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -5961,6 +9969,41 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:15 pos:3061(0xBF5) type:2 net:210
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+ (pad "1" thru_hole rect (at -1.27000 -2.54000 270) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 212 "MKM_AVR_MISO")
+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 4 "3V3_BATT")
+ )
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+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 213 "MKM_AVR_MOSI")
+ )
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+ (pad "5" thru_hole circle (at -1.27000 2.54000 270) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 39 "AVR_RESET")
+ )
+#1309 counter:20 pos:4081(0xFF1) type:1 net:5
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+ (pad "6" thru_hole circle (at 1.27000 2.54000 270) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/B3089A96-FA19.wrl"
+=======
(pad 1 thru_hole rect (at -1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 211 MKM_AVR_MISO))
(pad 2 thru_hole circle (at 1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -5974,6 +10017,7 @@
(pad 6 thru_hole circle (at 1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -5990,6 +10034,26 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:12 pos:2449(0x991) type:1 net:5
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+ (pad "3" thru_hole circle (at 2.54000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND")
+ )
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+ (pad "2" thru_hole circle (at 0.00000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 4 "3V3_BATT")
+ )
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+ (pad "1" thru_hole rect (at -2.54000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/836C6F64-A2E5.wrl"
+=======
(pad 3 thru_hole circle (at 2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 6 GND))
(pad 2 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -5997,6 +10061,7 @@
(pad 1 thru_hole rect (at -2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/836C6F64-A2E5.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -6013,6 +10078,41 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" thru_hole rect (at -1.27000 -2.54000 270) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 122 "FPGA_CFG_CTRL_ARM_ENA")
+ )
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+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 123 "FPGA_CFG_CTRL_FPGA_DIS")
+ )
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+ )
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 174 "FPGA_PROM_W_N")
+ )
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+ (pad "6" thru_hole circle (at 1.27000 2.54000 270) (size 1.4999995 1.4999995) (drill 1.0)
+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/B3089A96-FA19.wrl"
+=======
(pad 1 thru_hole rect (at -1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 121 FPGA_CFG_CTRL_ARM_ENA))
(pad 2 thru_hole circle (at 1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -6026,6 +10126,7 @@
(pad 6 thru_hole circle (at 1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6042,11 +10143,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 246 "NetLED1_1")
+ )
+#1309 counter:117 pos:25832(0x64E8) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 245 NetLED1_1))
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6063,11 +10180,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 247 "NetLED2_1")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 246 NetLED2_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6084,11 +10217,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 248 "NetLED3_1")
+ )
+#1309 counter:111 pos:24608(0x6020) type:2 net:5
+#010000000005000000047C267C300100000000AA000000010C000500FFFFF600FFFFFFFF813E9E0524A61E01E501060051CE0400E501060051CE0400E501060051CE04000000000002020200000000000000000100000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 247 NetLED3_1))
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6105,11 +10254,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:114 pos:25220(0x6284) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:115 pos:25424(0x6350) type:2 net:247
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 249 "NetLED4_1")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 248 NetLED4_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6126,11 +10291,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:106 pos:23588(0x5C24) type:2 net:248
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 250 "NetLED9_1")
+ )
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 249 NetLED9_1))
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6147,11 +10328,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 251 "NetLED10_1")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 250 NetLED10_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6168,11 +10365,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 252 "NetLED11_1")
+ )
+#1309 counter:103 pos:22976(0x59C0) type:2 net:5
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+ (pad "2" smd rect (at -0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 251 NetLED11_1))
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6189,11 +10402,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:108 pos:23996(0x5DBC) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:109 pos:24200(0x5E88) type:2 net:251
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 253 "NetLED12_1")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 252 NetLED12_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6210,11 +10439,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:449 pos:93579(0x16D8B) type:2 net:252
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 254 "NetLED13_1")
+ )
+#1309 counter:450 pos:93783(0x16E57) type:2 net:128
+#010000000005000000047C267C300100000000AA000000010C008000FFFFFC00FFFFFFFF026A6D0623A61E01E501060051CE0400E501060051CE0400E501060051CE04000000000002020200000000000000000100000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 130 "FPGA_DONE_INT")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 253 NetLED13_1))
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 129 FPGA_DONE_INT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6231,11 +10476,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:98 pos:21956(0x55C4) type:2 net:5
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+ (pad "2" smd rect (at -0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:99 pos:22160(0x5690) type:2 net:253
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+ (pad "1" smd rect (at -0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 255 "NetLED14_1")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 254 NetLED14_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6252,11 +10513,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:94 pos:21140(0x5294) type:2 net:254
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 256 "NetLED15_1")
+ )
+#1309 counter:95 pos:21344(0x5360) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 255 NetLED15_1))
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6273,11 +10550,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:96 pos:21548(0x542C) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:97 pos:21752(0x54F8) type:2 net:255
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 257 "NetLED16_1")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 256 NetLED16_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6294,11 +10587,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:100 pos:22364(0x575C) type:2 net:256
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 258 "NetLED17_1")
+ )
+#1309 counter:101 pos:22568(0x5828) type:2 net:5
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 257 NetLED17_1))
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6315,11 +10624,27 @@
(fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:447 pos:93171(0x16BF3) type:2 net:258
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+ (pad "2" smd rect (at 0.00000 0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 260 "NetLED18_2")
+ )
+#1309 counter:448 pos:93375(0x16CBF) type:2 net:257
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+ (pad "1" smd rect (at 0.00000 -0.80000) (size 1.0 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 259 "NetLED18_1")
+ )
+#1365
+ (model "wrlshp/A9F03225-78F3.wrl"
+=======
(pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 259 NetLED18_2))
(pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
(net 258 NetLED18_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6336,6 +10661,26 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "3" smd rect (at -0.00000 1.10000 270) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 245 "NetJP2_2")
+ )
+#1309 counter:125 pos:27464(0x6B48) type:2 net:5
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+ (pad "2" smd rect (at -0.95000 -1.10000 270) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:126 pos:27668(0x6C14) type:2 net:259
+#010000000005000000047C267C300100000000AA000000011C000301FFFF0201FFFFFFFF59D269069551C6037935070051CE04007935070051CE04007935070051CE0400000000000202020000000000E070400000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "1" smd rect (at 0.95000 -1.10000 270) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 261 "NetQ1_1")
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 3 smd rect (at 0 1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 244 NetJP2_2))
(pad 2 smd rect (at -0.95 -1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
@@ -6343,6 +10688,7 @@
(pad 1 smd rect (at 0.95 -1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 260 NetQ1_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6359,12 +10705,33 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1573 pos:324217(0x4F279) type:2 net:275
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+ (pad "1" smd rect (at -1.10000 0.95000) (size 1.2000001 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 277 "NOISE_OUT")
+ )
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+ (pad "2" smd rect (at -1.10000 -0.95000) (size 1.2000001 0.8000009)
+ (layers B.Cu B.Mask B.Paste) (net 276 "NOISE_IN")
+ )
+#1309 counter:1575 pos:324625(0x4F411) type:2 net:-1
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+ (pad "3" smd rect (at 1.10000 0.00000) (size 1.2000001 0.8000009)
+ (layers B.Cu B.Mask B.Paste)
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 1 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
(net 276 NOISE_OUT))
(pad 2 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
(net 275 NOISE_IN))
(pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6401,6 +10768,26 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:121 pos:26648(0x6818) type:2 net:153
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+ (pad "3" smd rect (at -1.10000 0.00000 180) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 155 "FPGA_INIT_B_INT")
+ )
+#1309 counter:122 pos:26852(0x68E4) type:2 net:5
+#010000000005000000047C267C300100000000AA000000011C000500FFFF0501FFFFFFFF4FF9CF06801F40037935070051CE04007935070051CE04007935070051CE04000000000002020200000000008066400000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "2" smd rect (at 1.10000 -0.95000 180) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:123 pos:27056(0x69B0) type:2 net:154
+#010000000005000000047C267C300100000000AA000000011C009A00FFFF0501FFFFFFFF4FF9CF0680B534037935070051CE04007935070051CE04007935070051CE04000000000002020200000000008066400000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "1" smd rect (at 1.10000 0.95000 180) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 156 "FPGA_INIT_B")
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 154 FPGA_INIT_B_INT))
(pad 2 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
@@ -6408,6 +10795,7 @@
(pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 155 FPGA_INIT_B))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6444,6 +10832,26 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:118 pos:26036(0x65B4) type:2 net:281
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+ (pad "1" smd rect (at -1.10000 -0.95000) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 283 "POK_VCCO")
+ )
+#1309 counter:119 pos:26240(0x6680) type:2 net:5
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+ (pad "2" smd rect (at -1.10000 0.95000) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:120 pos:26444(0x674C) type:2 net:258
+#010000000005000000047C267C300100000000AA000000011C000201FFFF0701FFFFFFFFB3071605BF5982027935070051CE04007935070051CE04007935070051CE04000000000002020200000000000000000000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "3" smd rect (at 1.10000 0.00000) (size 1.2000001 0.8000009)
+ (layers F.Cu F.Mask F.Paste) (net 260 "NetLED18_2")
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 1 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 282 POK_VCCO))
(pad 2 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
@@ -6451,6 +10859,7 @@
(pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
(net 259 NetLED18_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6467,11 +10876,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:587 pos:121731(0x1DB83) type:2 net:282
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 284 "PWR_18V")
+ )
+#1309 counter:588 pos:121935(0x1DC4F) type:2 net:262
+#010000000005000000047C267C300100000000AA000000010C000601FFFF0801FFFFFFFFF41156055A9269030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 264 "NetR1_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 283 PWR_18V))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 263 NetR1_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6488,11 +10913,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:585 pos:121323(0x1D9EB) type:2 net:5
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:586 pos:121527(0x1DAB7) type:2 net:262
+#010000000005000000047C267C300100000000AA000000010C000601FFFF0901FFFFFFFFF4115605E15C62030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 264 "NetR1_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 263 NetR1_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6509,11 +10950,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:583 pos:120915(0x1D853) type:2 net:263
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 265 "NetR3_2")
+ )
+#1309 counter:584 pos:121119(0x1D91F) type:2 net:262
+#010000000005000000047C267C300100000000AA000000010C000601FFFF0A01FFFFFFFF124A4E05EE2769030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 264 "NetR1_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 264 NetR3_2))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 263 NetR1_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6530,11 +10987,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1999 pos:508903(0x7C3E7) type:2 net:131
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 133 "FPGA_GCLK")
+ )
+#1309 counter:2000 pos:509107(0x7C4B3) type:2 net:261
+#010000000005000000047C267C300100000000AA000000200C000501FFFF0B01FFFFFFFF90493406C3C678030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 263 "NetQ5_3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 132 FPGA_GCLK))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 262 NetQ5_3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6551,11 +11024,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:581 pos:120507(0x1D6BB) type:2 net:259
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 261 "NetQ1_1")
+ )
+#1309 counter:582 pos:120711(0x1D787) type:2 net:130
+#010000000005000000047C267C300100000000AA000000010C008200FFFF0C01FFFFFFFFCDE45C062C4FD9030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 132 "FPGA_ENTROPY_DISABLE")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 260 NetQ1_1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 131 FPGA_ENTROPY_DISABLE))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -6572,11 +11061,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:579 pos:120099(0x1D523) type:2 net:259
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+ (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 261 "NetQ1_1")
+ )
+#1309 counter:580 pos:120303(0x1D5EF) type:2 net:5
+#010000000005000000047C267C300100000000AA000000010C000500FFFF0D01FFFFFFFFCCE45C06CECCD1030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 260 NetQ1_1))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6593,11 +11098,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1997 pos:508495(0x7C24F) type:2 net:3
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 5 "15V_LDO_ENABLE")
+ )
+#1309 counter:1998 pos:508699(0x7C31B) type:2 net:282
+#010000000005000000047C267C300100000000AA000000200C001A01FFFF0E01FFFFFFFF54645B064A3B9A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 4 15V_LDO_ENABLE))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 283 PWR_18V))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6614,11 +11135,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1995 pos:508087(0x7C0B7) type:2 net:264
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 266 "NetR8_1")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 265 NetR8_1))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6635,11 +11172,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 265 NetR8_1))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6656,11 +11209,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers B.Cu B.Mask B.Paste) (net 276 "NOISE_IN")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 287 RAW_NOISE))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 275 NOISE_IN))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6677,11 +11246,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers B.Cu B.Mask B.Paste) (net 6 "15V_STABLE")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 287 RAW_NOISE))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 5 15V_STABLE))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6698,11 +11283,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 8 "NetC15_2")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 9 "AMPLIFIED")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 7 NetC15_2))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 8 AMPLIFIED))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6719,11 +11320,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 9 "AMPLIFIED")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 8 AMPLIFIED))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6740,11 +11357,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 279 "OSC_IN")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 228 "NetC17_2")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 278 OSC_IN))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 227 NetC17_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6761,11 +11394,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 39 BOOT0))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -6782,11 +11431,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 249 "NetLED4_1")
+ )
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 16 "ARM_LED3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 248 NetLED4_1))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 15 ARM_LED3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6803,11 +11468,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ )
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+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 243 NetIC1_3))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -6824,11 +11505,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 207 "KSM_PROM_CS_N")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 206 KSM_PROM_CS_N))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -6845,11 +11542,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 291 "RTC_SDA")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 290 RTC_SDA))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6866,11 +11579,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 290 "RTC_SCL")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 289 RTC_SCL))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6887,11 +11616,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 289 "RTC_MFP")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 288 RTC_MFP))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6908,11 +11653,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 191 "FT_REF")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 190 FT_REF))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -6929,11 +11690,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3")
+ )
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 193 "FT_RESET")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 198 FT_VCC3V3))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 192 FT_RESET))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -6950,11 +11727,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 190 "FT_REF1")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 189 FT_REF1))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -6971,11 +11764,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3")
+ )
+#1309 counter:560 pos:116223(0x1C5FF) type:2 net:190
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 192 "FT_RESET1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 185 FT_MGMT_VCC3V3))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 191 FT_RESET1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -6992,11 +11801,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 39 "AVR_RESET")
+ )
+#1309 counter:558 pos:115815(0x1C467) type:2 net:2
+#010000000005000000047C267C300100000000AA000000010C000200FFFF2101FFFFFFFF8369C9050D9962020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 38 AVR_RESET))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 3V3_BATT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7013,11 +11838,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1979 pos:504823(0x7B3F7) type:2 net:34
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 36 "AVR_LED3")
+ )
+#1309 counter:1980 pos:505027(0x7B4C3) type:2 net:251
+#010000000005000000047C267C300100000000AA000000200C00FB00FFFF2201FFFFFFFFE612590501A0AD010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 253 "NetLED12_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 35 AVR_LED3))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 252 NetLED12_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7034,11 +11875,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:555 pos:115203(0x1C203) type:2 net:2
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT")
+ )
+#1309 counter:556 pos:115407(0x1C2CF) type:2 net:265
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 267 "NetR32_2")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 3V3_BATT))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 266 NetR32_2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7055,11 +11912,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 268 "NetR33_2")
+ )
+#1309 counter:1978 pos:504619(0x7B32B) type:2 net:2
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 267 NetR33_2))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 3V3_BATT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7076,11 +11949,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1975 pos:504007(0x7B0C7) type:2 net:215
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 217 "MKM_CS_N")
+ )
+#1309 counter:1976 pos:504211(0x7B193) type:2 net:2
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 216 MKM_CS_N))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 3V3_BATT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7097,11 +11986,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:553 pos:114795(0x1C06B) type:2 net:301
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 254 "NetLED13_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 253 NetLED13_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7118,11 +12023,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:551 pos:114387(0x1BED3) type:2 net:129
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+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 131 "FPGA_DONE")
+ )
+#1309 counter:552 pos:114591(0x1BF9F) type:2 net:128
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 130 "FPGA_DONE_INT")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 130 FPGA_DONE))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 129 FPGA_DONE_INT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7139,11 +12060,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:549 pos:113979(0x1BD3B) type:2 net:301
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 155 "FPGA_INIT_B_INT")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 154 FPGA_INIT_B_INT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7160,11 +12097,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 169 "FPGA_PROGRAM_B")
+ )
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+ (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 168 FPGA_PROGRAM_B))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7181,11 +12134,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 156 "FPGA_INIT_B")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 155 FPGA_INIT_B))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7202,11 +12171,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 162 "FPGA_JTAG_TDI")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 161 FPGA_JTAG_TDI))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7223,11 +12208,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 164 "FPGA_JTAG_TMS")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 163 FPGA_JTAG_TMS))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7244,11 +12245,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 161 "FPGA_JTAG_TCK")
+ )
+#1309 counter:540 pos:112143(0x1B60F) type:2 net:301
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 160 FPGA_JTAG_TCK))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7265,11 +12282,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 292 "SPI_A_TRISTATE")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 291 SPI_A_TRISTATE))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7286,11 +12319,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 293 "SPI_B_TRISTATE")
+ )
+#1309 counter:536 pos:111327(0x1B2DF) type:2 net:5
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 292 SPI_B_TRISTATE))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7307,11 +12356,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 262 "NetQ5_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 261 NetQ5_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7328,11 +12393,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 174 "FPGA_PROM_W_N")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 173 FPGA_PROM_W_N))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7349,11 +12430,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 170 "FPGA_PROM_CS_N")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 169 FPGA_PROM_CS_N))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7370,11 +12467,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 269 "NetR52_1")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 268 NetR52_1))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7391,11 +12504,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 270 "NetR53_2")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 269 NetR53_2))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7412,11 +12541,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 271 "NetR54_1")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 270 NetR54_1))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7433,11 +12578,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 272 "NetR55_2")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 271 NetR55_2))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7454,11 +12615,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 238 "NetC117_2")
+ )
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 237 NetC117_2))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 236 NetC117_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7475,11 +12652,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 238 "NetC117_2")
+ )
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 237 NetC117_2))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7496,11 +12689,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 240 "NetC118_2")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 239 NetC118_2))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 238 NetC118_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7517,11 +12726,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 240 "NetC118_2")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 239 NetC118_2))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7538,11 +12763,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
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+ (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 236 NetC117_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7559,11 +12800,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1")
+ )
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 238 NetC118_1))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7580,11 +12837,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 155 "FPGA_INIT_B_INT")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 154 "FPGA_INIT_B_INT1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 154 FPGA_INIT_B_INT))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 153 FPGA_INIT_B_INT1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7601,11 +12874,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 168 "FPGA_PROGRAM_B1")
+ )
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+ (layers F.Cu F.Mask F.Paste) (net 169 "FPGA_PROGRAM_B")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 167 FPGA_PROGRAM_B1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 168 FPGA_PROGRAM_B))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7622,11 +12911,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 256 "NetLED15_1")
+ )
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 151 "FPGA_GPIO_LED_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 255 NetLED15_1))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 150 FPGA_GPIO_LED_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7643,11 +12948,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 273 "NetR65_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 272 NetR65_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7664,11 +12985,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 274 "NetR66_1")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 273 NetR66_1))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7685,11 +13022,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 275 "NetR67_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 241 NetC208_1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 274 NetR67_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7706,11 +13059,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 243 "NetC208_2")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 242 NetC208_2))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 241 NetC208_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7727,11 +13096,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 243 "NetC208_2")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 242 NetC208_2))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7748,11 +13133,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1309 counter:1942 pos:497275(0x7967B) type:2 net:240
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 241 NetC208_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7769,11 +13170,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 128 "FPGA_CFG_SCLK1")
+ )
+#1309 counter:524 pos:108879(0x1A94F) type:2 net:127
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+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 129 "FPGA_CFG_SCLK")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 127 FPGA_CFG_SCLK1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 128 FPGA_CFG_SCLK))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7790,11 +13207,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0")
+ )
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+ (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 286 "PWR_ENA_VCCINT")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 301 VCC_5V0))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 285 PWR_ENA_VCCINT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7811,11 +13244,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 281 "POK_VCCAUX")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 301 VCC_5V0))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 280 POK_VCCAUX))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7832,11 +13281,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 281 "POK_VCCAUX")
+ )
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 287 "PWR_ENA_VCCO")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 280 POK_VCCAUX))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 286 PWR_ENA_VCCO))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7853,11 +13318,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:515 pos:107043(0x1A223) type:2 net:300
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 301 VCC_5V0))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 281 POK_VCCINT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7874,11 +13355,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT")
+ )
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 285 "PWR_ENA_VCCAUX")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 281 POK_VCCINT))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 284 PWR_ENA_VCCAUX))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7895,11 +13392,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:511 pos:106227(0x19EF3) type:2 net:300
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0")
+ )
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 283 "POK_VCCO")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 301 VCC_5V0))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 282 POK_VCCO))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -7916,11 +13429,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 259 "NetLED18_1")
+ )
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 258 NetLED18_1))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 301 VCC_5V0))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7937,11 +13466,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT")
+ )
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 215 "MKM_CONTROL_AVR_ENA")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 3V3_BATT))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 214 MKM_CONTROL_AVR_ENA))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -7958,11 +13503,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 216 "MKM_CONTROL_FPGA_DIS")
+ )
+#1309 counter:1938 pos:496459(0x7934B) type:2 net:5
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 7 "GND")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 215 MKM_CONTROL_FPGA_DIS))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -7979,11 +13540,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1935 pos:495847(0x790E7) type:2 net:2
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT")
+ )
+#1309 counter:1936 pos:496051(0x791B3) type:2 net:36
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 38 "AVR_PANIC")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 3V3_BATT))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 37 AVR_PANIC))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -8000,11 +13577,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 127 "FPGA_CFG_MOSI")
+ )
+#1309 counter:508 pos:105615(0x19C8F) type:2 net:124
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 126 "FPGA_CFG_MOSI1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_CFG_MOSI))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 125 FPGA_CFG_MOSI1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -8021,11 +13614,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:505 pos:105003(0x19A2B) type:2 net:122
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+ (pad "2" smd rect (at 0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 124 "FPGA_CFG_MISO1")
+ )
+#1309 counter:506 pos:105207(0x19AF7) type:2 net:123
+#010000000005000000047C267C300100000000AA000000010C007B00FFFF5201FFFFFFFFAE098D05326A07030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "1" smd rect (at -0.50000 -0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 125 "FPGA_CFG_MISO")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 123 FPGA_CFG_MISO1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 124 FPGA_CFG_MISO))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -8042,11 +13651,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:503 pos:104595(0x19893) type:2 net:119
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 121 "FPGA_CFG_CS_N")
+ )
+#1309 counter:504 pos:104799(0x1995F) type:2 net:118
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 120 "FPGA_CFG_CS_N1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 120 FPGA_CFG_CS_N))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 119 FPGA_CFG_CS_N1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -8063,11 +13688,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:501 pos:104187(0x196FB) type:2 net:195
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 197 "FT_TXD1")
+ )
+#1309 counter:502 pos:104391(0x197C7) type:2 net:196
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 198 "FT_TXD")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 196 FT_TXD1))
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 197 FT_TXD))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8084,11 +13725,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:499 pos:103779(0x19563) type:2 net:194
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+ (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 196 "FT_RXD")
+ )
+#1309 counter:500 pos:103983(0x1962F) type:2 net:193
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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 195 "FT_RXD1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 195 FT_RXD))
(pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 194 FT_RXD1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8105,11 +13762,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:497 pos:103371(0x193CB) type:2 net:182
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 184 "FT_MGMT_TXD1")
+ )
+#1309 counter:498 pos:103575(0x19497) type:2 net:183
+#010000000005000000047C267C300100000000AA000000010C00B700FFFF5601FFFFFFFFB334E006D979DE010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 185 "FT_MGMT_TXD")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 183 FT_MGMT_TXD1))
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 184 FT_MGMT_TXD))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -8126,11 +13799,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:495 pos:102963(0x19233) type:2 net:181
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+ (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 183 "FT_MGMT_RXD")
+ )
+#1309 counter:496 pos:103167(0x192FF) type:2 net:180
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+ (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 182 "FT_MGMT_RXD1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 182 FT_MGMT_RXD))
(pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 181 FT_MGMT_RXD1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -8147,11 +13836,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:493 pos:102555(0x1909B) type:2 net:183
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+ (pad "2" smd rect (at 0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 185 "FT_MGMT_TXD")
+ )
+#1309 counter:494 pos:102759(0x19167) type:2 net:301
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+ (pad "1" smd rect (at -0.50000 0.00000) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 184 FT_MGMT_TXD))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
@@ -8168,11 +13873,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3")
+ )
+#1309 counter:492 pos:102351(0x18FCF) type:2 net:196
+#010000000005000000047C267C300100000000AA000000010C00C400FFFF5901FFFFFFFFBA0E1D051723E8010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000
+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers F.Cu F.Mask F.Paste) (net 198 "FT_TXD")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 302 VCCO_3V3))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 197 FT_TXD))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8189,11 +13910,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1933 pos:495439(0x78F4F) type:2 net:13
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 15 "ARM_LED2")
+ )
+#1309 counter:1934 pos:495643(0x7901B) type:2 net:244
+#010000000005000000047C267C300100000000AA000000200C00F400FFFF5A01FFFFFFFFE036CB0501A0AD010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 246 "NetLED1_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 14 ARM_LED2))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 245 NetLED1_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8210,11 +13947,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1931 pos:495031(0x78DB7) type:2 net:246
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 248 "NetLED3_1")
+ )
+#1309 counter:1932 pos:495235(0x78E83) type:2 net:12
+#010000000005000000047C267C300100000000AA000000200C000C00FFFF5B01FFFFFFFF832BA705E6A1B3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 14 "ARM_LED1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 247 NetLED3_1))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 13 ARM_LED1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8231,11 +13984,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1929 pos:494623(0x78C1F) type:2 net:15
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 17 "ARM_LED4")
+ )
+#1309 counter:1930 pos:494827(0x78CEB) type:2 net:245
+#010000000005000000047C267C300100000000AA000000200C00F500FFFF5C01FFFFFFFF4D2FB30501A0AD010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 247 "NetLED2_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 16 ARM_LED4))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 246 NetLED2_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8252,11 +14021,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1927 pos:494215(0x78A87) type:2 net:248
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 250 "NetLED9_1")
+ )
+#1309 counter:1928 pos:494419(0x78B53) type:2 net:33
+#010000000005000000047C267C300100000000AA000000200C002100FFFF5D01FFFFFFFFB0166505E6A1B3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 35 "AVR_LED2")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 249 NetLED9_1))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 34 AVR_LED2))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8273,11 +14058,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1925 pos:493807(0x788EF) type:2 net:32
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 34 "AVR_LED1")
+ )
+#1309 counter:1926 pos:494011(0x789BB) type:2 net:250
+#010000000005000000047C267C300100000000AA000000200C00FA00FFFF5E01FFFFFFFF530B410501A0AD010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 252 "NetLED11_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 33 AVR_LED1))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 251 NetLED11_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8294,11 +14095,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1923 pos:493399(0x78757) type:2 net:249
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+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 251 "NetLED10_1")
+ )
+#1309 counter:1924 pos:493603(0x78823) type:2 net:35
+#010000000005000000047C267C300100000000AA000000200C002300FFFF5F01FFFFFFFF1D0F4D05E6A1B3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 37 "AVR_LED4")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 250 NetLED10_1))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 36 AVR_LED4))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8315,11 +14132,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1921 pos:492991(0x785BF) type:2 net:150
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+ (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 152 "FPGA_GPIO_LED_2")
+ )
+#1309 counter:1922 pos:493195(0x7868B) type:2 net:255
+#010000000005000000047C267C300100000000AA000000200C00FF00FFFF6001FFFFFFFF7A738B06109FAA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 257 "NetLED16_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 151 FPGA_GPIO_LED_2))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 256 NetLED16_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8336,11 +14169,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1919 pos:492583(0x78427) type:2 net:253
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+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 255 "NetLED14_1")
+ )
+#1309 counter:1920 pos:492787(0x784F3) type:2 net:151
+#010000000005000000047C267C300100000000AA000000200C009700FFFF6101FFFFFFFFB16F7F06F5A0B0010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 153 "FPGA_GPIO_LED_3")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 254 NetLED14_1))
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 152 FPGA_GPIO_LED_3))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8357,11 +14206,27 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:1917 pos:492175(0x7828F) type:2 net:148
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+ (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 150 "FPGA_GPIO_LED_0")
+ )
+#1309 counter:1918 pos:492379(0x7835B) type:2 net:256
+#010000000005000000047C267C300100000000AA000000200C000001FFFF6201FFFFFFFFE76B7306109FAA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000
+ (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.45 0.6)
+ (layers B.Cu B.Mask B.Paste) (net 258 "NetLED17_1")
+ )
+#1365
+ (model "wrlshp/537E0B02-A9B3.wrl"
+=======
(pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 149 FPGA_GPIO_LED_0))
(pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 257 NetLED17_1))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
+>>>>>>> local-tests
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
@@ -8422,6 +14287,40 @@
(fp_text value TACTILE_SWITCH (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
+ #1309 counter:867 pos:179065(0x2BB79) type:2 net:5
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+ (pad "G1" smd rect (at 2.51700 0.00000 270) (size 1.0160000 0.45)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:868 pos:179270(0x2BC46) type:2 net:5
+#010000000005000000047C267C300100000000AA000000010C000500FFFF6401FFFFFFFF0AE71A0617C7A301801A06000DB40200801A06000DB40200801A06000DB40200000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
+ (pad "G2" smd rect (at -2.53500 0.00000 270) (size 1.0160000 0.45)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:869 pos:179475(0x2BD13) type:2 net:5
+#010000000005000000047C267C300100000000AA000000010C000500FFFF6401FFFFFFFF09FE1E0675FEB00180A90300801A060080A90300801A060080A90300801A06000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
+ (pad "B2" smd rect (at -1.85420 -2.20000 180) (size 0.6096000 1.0160000)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:870 pos:179680(0x2BDE0) type:2 net:5
+#010000000005000000047C267C300100000000AA000000010C000500FFFF6401FFFFFFFF09FE1E06A780960180A90300801A060080A90300801A060080A90300801A06000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
+ (pad "B1" smd rect (at -1.85420 2.20980 180) (size 0.6096000 1.0160000)
+ (layers F.Cu F.Mask F.Paste) (net 7 "GND")
+ )
+#1309 counter:871 pos:179885(0x2BEAD) type:2 net:-1
+#010000000005000000047C267C300100000000AA000000010C00FFFFFFFF6401FFFFFFFFB33E3506A780960180A90300801A060080A90300801A060080A90300801A06000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
+ (pad "A1" smd rect (at 1.85000 2.20980 180) (size 0.6096000 1.0160000)
+ (layers F.Cu F.Mask F.Paste)
+ )
+#1309 counter:872 pos:180090(0x2BF7A) type:2 net:36
+#010000000005000000047C267C300100000000AA000000010C002400FFFF6401FFFFFFFFB33E350675FEB00180A90300801A060080A90300801A060080A90300801A06000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFFE54C00000000000101010101010100000000000000000000010000010000
+ (pad "A2" smd rect (at 1.85000 -2.20000 180) (size 0.6096000 1.0160000)
+ (layers F.Cu F.Mask F.Paste) (net 38 "AVR_PANIC")
+ )
+
+=======
(pad G1 smd rect (at 2.517 0 270) (size 1.016 0.45) (layers F.Cu F.Paste F.Mask)
(net 6 GND))
(pad G2 smd rect (at -2.535 0 270) (size 1.016 0.45) (layers F.Cu F.Paste F.Mask)
@@ -8433,6 +14332,7 @@
(pad A1 smd rect (at 1.85 2.2098 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask))
(pad A2 smd rect (at 1.85 -2.2 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask)
(net 37 AVR_PANIC))
+>>>>>>> local-tests
)
(module PLS-8 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
@@ -8445,6 +14345,51 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
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+#1365
+ (model "wrlshp/A962434E-CFE5.wrl"
+=======
(pad 8 thru_hole circle (at 8.89 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 6 GND))
(pad 1 thru_hole rect (at -8.89 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -8462,6 +14407,7 @@
(pad 7 thru_hole circle (at 6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 6 GND))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A962434E-CFE5.wrl
+>>>>>>> local-tests
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@@ -8478,6 +14424,91 @@
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+=======
(pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
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(pad 15 thru_hole circle (at -8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
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(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B280C847-2543.wrl
+>>>>>>> local-tests
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+ (layers *.Cu F.Mask F.Paste B.Mask B.Paste) (net 149 "FPGA_GPIO_B_7")
+ )
+#1365
+ (model "wrlshp/B280C847-2543.wrl"
+=======
(pad 1 thru_hole rect (at 8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 302 VCCO_3V3))
(pad 2 thru_hole circle (at 8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -8560,6 +14677,7 @@
(pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 148 FPGA_GPIO_B_7))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B280C847-2543.wrl
+>>>>>>> local-tests
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(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -8576,6 +14694,26 @@
(fp_text value "" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.05)))
)
+<<<<<<< HEAD
+
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+ (layers B.Cu B.Mask B.Paste) (net 277 "NOISE_OUT")
+ )
+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
(pad 3 smd rect (at 0 1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
(net 287 RAW_NOISE))
(pad 2 smd rect (at 0.95 -1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
@@ -8583,6 +14721,7 @@
(pad 1 smd rect (at -0.95 -1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
(net 276 NOISE_OUT))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
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(rotate (xyz 0 0 0))
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(fp_text value "" (at 0 0) (layer F.SilkS) hide
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+#1365
+ (model "wrlshp/04B9CA18-3B1B.wrl"
+=======
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(pad 3 smd rect (at 0 -1.1 90) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
(net 8 AMPLIFIED))
(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
+>>>>>>> local-tests
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+#1365
+ (model "wrlshp/612DFB50-5309.wrl"
+=======
(pad 5 smd rect (at -1.35 -0.95 90) (size 0.650001 1.1) (layers B.Cu B.Paste B.Mask)
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@@ -8723,6 +14913,7 @@
(net 8 AMPLIFIED))
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(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/612DFB50-5309.wrl
+>>>>>>> local-tests
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+=======
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(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/590BE70C-A1C3.wrl
+>>>>>>> local-tests
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+=======
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+>>>>>>> local-tests
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+=======
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(model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/041B98A5-F02D.wrl
+>>>>>>> local-tests
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