diff options
60 files changed, 83455 insertions, 0 deletions
diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..ac1bb7f --- /dev/null +++ b/.gitignore @@ -0,0 +1,4 @@ +*~ +rev03-Altium +git-init.sh +altium2kicad diff --git a/Cryptech Alpha.pro.template b/Cryptech Alpha.pro.template new file mode 100644 index 0000000..e6a775f --- /dev/null +++ b/Cryptech Alpha.pro.template @@ -0,0 +1,86 @@ +update=lör 15 okt 2016 14:22:46 +version=1 +last_client=kicad +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=microcontrollers +LibName13=dsp +LibName14=microchip +LibName15=analog_switches +LibName16=motorola +LibName17=texas +LibName18=intel +LibName19=audio +LibName20=interface +LibName21=digital-audio +LibName22=philips +LibName23=display +LibName24=cypress +LibName25=siliconi +LibName26=opto +LibName27=atmel +LibName28=contrib +LibName29=valves +LibName30=rev02_01-SchDoc-cache +LibName31=rev02_00-SchDoc-cache +LibName32=rev02_02-SchDoc-cache +LibName33=rev02_03-SchDoc-cache +LibName34=rev02_04-SchDoc-cache +LibName35=rev02_05-SchDoc-cache +LibName36=rev02_06-SchDoc-cache +LibName37=rev02_07-SchDoc-cache +LibName38=rev02_08-SchDoc-cache +LibName39=rev02_09-SchDoc-cache +LibName40=rev02_10-SchDoc-cache +LibName41=rev02_11-SchDoc-cache +LibName42=rev02_12-SchDoc-cache +LibName43=rev02_13-SchDoc-cache +LibName44=rev02_14-SchDoc-cache +LibName45=rev02_15-SchDoc-cache +LibName46=rev02_16-SchDoc-cache +LibName47=rev02_17-SchDoc-cache +LibName48=rev02_18-SchDoc-cache +LibName49=rev02_19-SchDoc-cache +LibName50=rev02_20-SchDoc-cache +LibName51=rev02_21-SchDoc-cache +LibName52=rev02_22-SchDoc-cache +LibName53=rev02_23-SchDoc-cache +LibName54=rev02_24-SchDoc-cache +LibName55=rev02_25-SchDoc-cache +[general] +version=1 diff --git a/Cryptech Alpha.sch.template b/Cryptech Alpha.sch.template new file mode 100644 index 0000000..0f83e0a --- /dev/null +++ b/Cryptech Alpha.sch.template @@ -0,0 +1,228 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:rev02_01-SchDoc-cache +LIBS:rev02_00-SchDoc-cache +LIBS:rev02_02-SchDoc-cache +LIBS:rev02_03-SchDoc-cache +LIBS:rev02_04-SchDoc-cache +LIBS:rev02_05-SchDoc-cache +LIBS:rev02_06-SchDoc-cache +LIBS:rev02_07-SchDoc-cache +LIBS:rev02_08-SchDoc-cache +LIBS:rev02_09-SchDoc-cache +LIBS:rev02_10-SchDoc-cache +LIBS:rev02_11-SchDoc-cache +LIBS:rev02_12-SchDoc-cache +LIBS:rev02_13-SchDoc-cache +LIBS:rev02_14-SchDoc-cache +LIBS:rev02_15-SchDoc-cache +LIBS:rev02_16-SchDoc-cache +LIBS:rev02_17-SchDoc-cache +LIBS:rev02_18-SchDoc-cache +LIBS:rev02_19-SchDoc-cache +LIBS:rev02_20-SchDoc-cache +LIBS:rev02_21-SchDoc-cache +LIBS:rev02_22-SchDoc-cache +LIBS:rev02_23-SchDoc-cache +LIBS:rev02_24-SchDoc-cache +LIBS:rev02_25-SchDoc-cache +LIBS:Cryptech Alpha rev03-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 27 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Sheet +S 700 1050 500 300 +U 57D8469B +F0 "Sheet0" 60 +F1 "rev02_00-SchDoc.sch" 60 +$EndSheet +$Sheet +S 2000 1000 700 350 +U 57D84708 +F0 "Power" 60 +F1 "rev02_01-SchDoc.sch" 60 +$EndSheet +$Sheet +S 3300 1000 850 350 +U 57D8488D +F0 "Entropy source" 60 +F1 "rev02_02-SchDoc.sch" 60 +$EndSheet +$Sheet +S 4500 1050 850 300 +U 57D84936 +F0 "Sheet57D84935" 60 +F1 "rev02_03-SchDoc.sch" 60 +$EndSheet +$Sheet +S 5750 1000 800 350 +U 57D849FD +F0 "Sheet57D849FC" 60 +F1 "rev02_04-SchDoc.sch" 60 +$EndSheet +$Sheet +S 1950 1600 800 400 +U 57D84B22 +F0 "Sheet57D84B21" 60 +F1 "rev02_06-SchDoc.sch" 60 +$EndSheet +$Sheet +S 3400 1650 650 450 +U 57D84C13 +F0 "Sheet57D84C12" 60 +F1 "rev02_07-SchDoc.sch" 60 +$EndSheet +$Sheet +S 4500 1650 650 350 +U 57D84C55 +F0 "Sheet57D84C54" 60 +F1 "rev02_08-SchDoc.sch" 60 +$EndSheet +$Sheet +S 5750 1600 650 400 +U 57D84CB3 +F0 "Sheet57D84CB2" 60 +F1 "rev02_09-SchDoc.sch" 60 +$EndSheet +$Sheet +S 700 2450 500 300 +U 57D84E30 +F0 "Sheet57D84E2F" 60 +F1 "rev02_10-SchDoc.sch" 60 +$EndSheet +$Sheet +S 2100 2400 800 350 +U 57D84FAD +F0 "Sheet57D84FAC" 60 +F1 "rev02_11-SchDoc.sch" 60 +$EndSheet +$Sheet +S 3450 2400 750 350 +U 57D8509E +F0 "Sheet57D8509D" 60 +F1 "rev02_12-SchDoc.sch" 60 +$EndSheet +$Sheet +S 4550 2400 750 350 +U 57D85134 +F0 "Sheet57D85133" 60 +F1 "rev02_13-SchDoc.sch" 60 +$EndSheet +$Sheet +S 5750 2350 700 400 +U 57D85217 +F0 "Sheet57D85216" 60 +F1 "rev02_14-SchDoc.sch" 60 +$EndSheet +$Sheet +S 700 3100 800 350 +U 57D85260 +F0 "Sheet57D8525F" 60 +F1 "rev02_15-SchDoc.sch" 60 +$EndSheet +$Sheet +S 2150 3100 850 350 +U 57D85319 +F0 "Sheet57D85318" 60 +F1 "rev02_16-SchDoc.sch" 60 +$EndSheet +$Sheet +S 3500 3100 700 350 +U 57D85338 +F0 "Sheet57D85337" 60 +F1 "rev02_17-SchDoc.sch" 60 +$EndSheet +$Sheet +S 750 1700 700 350 +U 57D85391 +F0 "Sheet57D85390" 60 +F1 "rev02_05-SchDoc.sch" 60 +$EndSheet +$Sheet +S 4600 3150 700 250 +U 57D853B0 +F0 "Sheet57D853AF" 60 +F1 "rev02_18-SchDoc.sch" 60 +$EndSheet +$Sheet +S 5700 3200 800 250 +U 57D854CB +F0 "Sheet57D854CA" 60 +F1 "rev02_19-SchDoc.sch" 60 +$EndSheet +$Sheet +S 700 3800 650 250 +U 57D8556F +F0 "Sheet57D8556E" 60 +F1 "rev02_20-SchDoc.sch" 60 +$EndSheet +$Sheet +S 2050 3850 700 250 +U 57D8559C +F0 "Sheet57D8559B" 60 +F1 "rev02_21-SchDoc.sch" 60 +$EndSheet +$Sheet +S 3500 3900 650 250 +U 57D855DE +F0 "Sheet57D855DD" 60 +F1 "rev02_22-SchDoc.sch" 60 +$EndSheet +$Sheet +S 4700 3900 700 200 +U 57D8583B +F0 "Sheet57D8583A" 60 +F1 "rev02_23-SchDoc.sch" 60 +$EndSheet +$Sheet +S 5850 3900 750 350 +U 57D85A75 +F0 "Sheet57D85A74" 60 +F1 "rev02_24-SchDoc.sch" 60 +$EndSheet +$Sheet +S 750 4350 800 300 +U 57D85B19 +F0 "Sheet57D85B18" 60 +F1 "rev02_25-SchDoc.sch" 60 +$EndSheet +$EndSCHEMATC diff --git a/README.md b/README.md new file mode 100644 index 0000000..ebc31ae --- /dev/null +++ b/README.md @@ -0,0 +1,11 @@ +Work-in-progress repository with output of altium2kicad conversion +of the Cryptech Alpha rev03 board. + +The conversion was done using 'convert.sh', with the Altium Designer +project files from + + https://wiki.cryptech.is/browser/hardware/cad/rev03 + +and the altium2kicad project from + + https://github.com/thesourcerer8/altium2kicad diff --git a/convert.sh b/convert.sh new file mode 100755 index 0000000..b05f705 --- /dev/null +++ b/convert.sh @@ -0,0 +1,53 @@ +#!/bin/bash +# +# This script runs the conversion from Altium to KiCad. It expects the +# Altium project in ../../../hardware/cad/rev03/ and the altium2kicad +# source in ../altium2kicad +# + +set -e + +altiumdir="rev03-Altium" +kicaddir="rev03-KiCad" + +test -d altium2kicad || git clone https://github.com/thesourcerer8/altium2kicad + +rm -rf ${altiumdir} +cp -rp ../../../hardware/cad/rev03/ ${altiumdir} + +cd ${altiumdir} + +# make sheet numbers in filenames two digits to have them sort properly +rename 's/rev02_/rev02_0/' rev02_?.* + +../altium2kicad/unpack.pl +../altium2kicad/convertschema.pl +../altium2kicad/convertpcb.pl + +cd .. + +rm -rf "${kicaddir}" +mkdir "${kicaddir}" +cp ${altiumdir}/*.{sch,lib} "${kicaddir}"/ +cp ${altiumdir}/CrypTech-PcbDoc.kicad_pcb "${kicaddir}/Cryptech Alpha.kicad_pcb" +cp "Cryptech Alpha.pro.template" "${kicaddir}/Cryptech Alpha.pro" +cp "Cryptech Alpha.sch.template" "${kicaddir}/Cryptech Alpha.sch" + +# Change to more sensible filenames +cd "${kicaddir}" +rename 's/-SchDoc//' rev02_* +sed -i -e 's/-SchDoc//g' * + +# Sheet number fixups. This hides all the hierarchical sub-sheets from the project view. +num_sheets=$(ls Cryptech\ Alpha.sch rev02*sch | wc -l) +num=1 +ls Cryptech\ Alpha.sch rev02*sch | while read file; do + sed -i -e "s/^Sheet .*/Sheet ${num} ${num_sheets}/g" "${file}" + num=$[$num + 1] +done + +echo "" +echo "Done. The leftovers from conversion is in ${altiumdir}, and you can start KiCad like this:" +echo "" +echo " kicad \"${kicaddir}/Cryptech Alpha.pro\"" +echo "" diff --git a/rev03-KiCad/Cryptech Alpha.kicad_pcb b/rev03-KiCad/Cryptech Alpha.kicad_pcb new file mode 100644 index 0000000..62a2e61 --- /dev/null +++ b/rev03-KiCad/Cryptech Alpha.kicad_pcb @@ -0,0 +1,62030 @@ +(kicad_pcb (version 4) (host pcbnew "(2014-07-21 BZR 5016)-product") + + (general + (links 0) + (no_connects 0) + (area 0 0 0 0) + (thickness 1.6) + (drawings 1) + (tracks 0) + (zones 0) + (modules 42) + (nets 304) + ) + + (page A4) + (layers + (0 F.Cu signal) + (1 In1.Cu signal) + (2 In2.Cu signal) + (3 In3.Cu signal) + (4 In4.Cu signal) + (5 In5.Cu signal) + (6 In6.Cu signal) + + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + + ) + + (setup + (last_trace_width 0.254) + (trace_clearance 0.127) + (zone_clearance 0.0144) + (zone_45_only no) + (trace_min 0.254) + (segment_width 0.2) + (edge_width 0.1) + (via_size 0.889) + (via_drill 0.635) + (via_min_size 0.889) + (via_min_drill 0.508) + (uvia_size 0.508) + (uvia_drill 0.127) + (uvias_allowed no) + (uvia_min_size 0.508) + (uvia_min_drill 0.127) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.5 1.5) + (pad_drill 0.6) + (pad_to_mask_clearance 0) + (aux_axis_origin 0 0) + (visible_elements 7FFFF77F) + (pcbplotparams + (layerselection 262143) + (usegerberextensions false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 2) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "GerberOutput/")) + ) + + (net 0 "") + (net 1 "Net1") + (net 2 "DM_P") + (net 3 "DM_N") + (net 4 "3V3_BATT") + (net 5 "15V_LDO_ENABLE") + (net 6 "15V_STABLE") + (net 7 "GND") + (net 8 "NetC15_2") + (net 9 "AMPLIFIED") + (net 10 "ARM_FPGA_CFG_CS_N") + (net 11 "ARM_FPGA_CFG_MISO") + (net 12 "ARM_FPGA_CFG_MOSI") + (net 13 "ARM_FPGA_CFG_SCLK") + (net 14 "ARM_LED1") + (net 15 "ARM_LED2") + (net 16 "ARM_LED3") + (net 17 "ARM_LED4") + (net 18 "AVR_GPIO_0") + (net 19 "AVR_GPIO_1") + (net 20 "AVR_GPIO_2") + (net 21 "AVR_GPIO_3") + (net 22 "AVR_GPIO_4") + (net 23 "AVR_GPIO_5") + (net 24 "AVR_GPIO_6") + (net 25 "AVR_GPIO_7") + (net 26 "AVR_GPIO_ARM_0") + (net 27 "AVR_GPIO_ARM_1") + (net 28 "AVR_GPIO_ARM_2") + (net 29 "AVR_GPIO_ARM_3") + (net 30 "AVR_GPIO_FPGA_0") + (net 31 "AVR_GPIO_FPGA_1") + (net 32 "AVR_GPIO_FPGA_2") + (net 33 "AVR_GPIO_FPGA_3") + (net 34 "AVR_LED1") + (net 35 "AVR_LED2") + (net 36 "AVR_LED3") + (net 37 "AVR_LED4") + (net 38 "AVR_PANIC") + (net 39 "AVR_RESET") + (net 40 "BOOT0") + (net 41 "D1_N") + (net 42 "D1_P") + (net 43 "DIGITIZED_NOISE") + (net 44 "FMC_A0") + (net 45 "FMC_A1") + (net 46 "FMC_A2") + (net 47 "FMC_A3") + (net 48 "FMC_A4") + (net 49 "FMC_A5") + (net 50 "FMC_A6") + (net 51 "FMC_A7") + (net 52 "FMC_A8") + (net 53 "FMC_A9") + (net 54 "FMC_A10") + (net 55 "FMC_A11") + (net 56 "FMC_A12") + (net 57 "FMC_A13") + (net 58 "FMC_A14") + (net 59 "FMC_A15") + (net 60 "FMC_A16") + (net 61 "FMC_A17") + (net 62 "FMC_A18") + (net 63 "FMC_A19") + (net 64 "FMC_A20") + (net 65 "FMC_A21") + (net 66 "FMC_A22") + (net 67 "FMC_A23") + (net 68 "FMC_A24") + (net 69 "FMC_A25") + (net 70 "FMC_CLK") + (net 71 "FMC_D0") + (net 72 "FMC_D1") + (net 73 "FMC_D2") + (net 74 "FMC_D3") + (net 75 "FMC_D4") + (net 76 "FMC_D5") + (net 77 "FMC_D6") + (net 78 "FMC_D7") + (net 79 "FMC_D8") + (net 80 "FMC_D9") + (net 81 "FMC_D10") + (net 82 "FMC_D11") + (net 83 "FMC_D12") + (net 84 "FMC_D13") + (net 85 "FMC_D14") + (net 86 "FMC_D15") + (net 87 "FMC_D16") + (net 88 "FMC_D17") + (net 89 "FMC_D18") + (net 90 "FMC_D19") + (net 91 "FMC_D20") + (net 92 "FMC_D21") + (net 93 "FMC_D22") + (net 94 "FMC_D23") + (net 95 "FMC_D24") + (net 96 "FMC_D25") + (net 97 "FMC_D26") + (net 98 "FMC_D27") + (net 99 "FMC_D28") + (net 100 "FMC_D29") + (net 101 "FMC_D30") + (net 102 "FMC_D31") + (net 103 "FMC_NBL0") + (net 104 "FMC_NBL1") + (net 105 "FMC_NBL2") + (net 106 "FMC_NBL3") + (net 107 "FMC_NE1") + (net 108 "FMC_NL") + (net 109 "FMC_NOE") + (net 110 "FMC_NWAIT") + (net 111 "FMC_NWE") + (net 112 "FMC_SDCKE0") + (net 113 "FMC_SDCKE1") + (net 114 "FMC_SDCLK") + (net 115 "FMC_SDNCAS") + (net 116 "FMC_SDNE0") + (net 117 "FMC_SDNE1") + (net 118 "FMC_SDNRAS") + (net 119 "FMC_SDNWE") + (net 120 "FPGA_CFG_CS_N1") + (net 121 "FPGA_CFG_CS_N") + (net 122 "FPGA_CFG_CTRL_ARM_ENA") + (net 123 "FPGA_CFG_CTRL_FPGA_DIS") + (net 124 "FPGA_CFG_MISO1") + (net 125 "FPGA_CFG_MISO") + (net 126 "FPGA_CFG_MOSI1") + (net 127 "FPGA_CFG_MOSI") + (net 128 "FPGA_CFG_SCLK1") + (net 129 "FPGA_CFG_SCLK") + (net 130 "FPGA_DONE_INT") + (net 131 "FPGA_DONE") + (net 132 "FPGA_ENTROPY_DISABLE") + (net 133 "FPGA_GCLK") + (net 134 "FPGA_GPIO_A_0") + (net 135 "FPGA_GPIO_A_1") + (net 136 "FPGA_GPIO_A_2") + (net 137 "FPGA_GPIO_A_3") + (net 138 "FPGA_GPIO_A_4") + (net 139 "FPGA_GPIO_A_5") + (net 140 "FPGA_GPIO_A_6") + (net 141 "FPGA_GPIO_A_7") + (net 142 "FPGA_GPIO_B_0") + (net 143 "FPGA_GPIO_B_1") + (net 144 "FPGA_GPIO_B_2") + (net 145 "FPGA_GPIO_B_3") + (net 146 "FPGA_GPIO_B_4") + (net 147 "FPGA_GPIO_B_5") + (net 148 "FPGA_GPIO_B_6") + (net 149 "FPGA_GPIO_B_7") + (net 150 "FPGA_GPIO_LED_0") + (net 151 "FPGA_GPIO_LED_1") + (net 152 "FPGA_GPIO_LED_2") + (net 153 "FPGA_GPIO_LED_3") + (net 154 "FPGA_INIT_B_INT1") + (net 155 "FPGA_INIT_B_INT") + (net 156 "FPGA_INIT_B") + (net 157 "FPGA_IRQ_N_0") + (net 158 "FPGA_IRQ_N_1") + (net 159 "FPGA_IRQ_N_2") + (net 160 "FPGA_IRQ_N_3") + (net 161 "FPGA_JTAG_TCK") + (net 162 "FPGA_JTAG_TDI") + (net 163 "FPGA_JTAG_TDO") + (net 164 "FPGA_JTAG_TMS") + (net 165 "FPGA_M0") + (net 166 "FPGA_M1") + (net 167 "FPGA_M2") + (net 168 "FPGA_PROGRAM_B1") + (net 169 "FPGA_PROGRAM_B") + (net 170 "FPGA_PROM_CS_N") + (net 171 "FPGA_PROM_MISO") + (net 172 "FPGA_PROM_MOSI") + (net 173 "FPGA_PROM_SCLK") + (net 174 "FPGA_PROM_W_N") + (net 175 "FPGA_VCCAUX_1V8") + (net 176 "FPGA_VCCINT_1V0") + (net 177 "FT_CTS") + (net 178 "FT_DTR") + (net 179 "FT_MGMT_CTS") + (net 180 "FT_MGMT_DTR") + (net 181 "FT_MGMT_RTS") + (net 182 "FT_MGMT_RXD1") + (net 183 "FT_MGMT_RXD") + (net 184 "FT_MGMT_TXD1") + (net 185 "FT_MGMT_TXD") + (net 186 "FT_MGMT_VCC3V3") + (net 187 "FT_MGMT_VPHY") + (net 188 "FT_MGMT_VPLL") + (net 189 "FT_MGMT_VREGIN") + (net 190 "FT_REF1") + (net 191 "FT_REF") + (net 192 "FT_RESET1") + (net 193 "FT_RESET") + (net 194 "FT_RTS") + (net 195 "FT_RXD1") + (net 196 "FT_RXD") + (net 197 "FT_TXD1") + (net 198 "FT_TXD") + (net 199 "FT_VCC3V3") + (net 200 "FT_VCCA1") + (net 201 "FT_VCCA") + (net 202 "FT_VCCORE1") + (net 203 "FT_VCCORE") + (net 204 "FT_VPHY") + (net 205 "FT_VPLL") + (net 206 "FT_VREGIN") + (net 207 "KSM_PROM_CS_N") + (net 208 "KSM_PROM_MISO") + (net 209 "KSM_PROM_MOSI") + (net 210 "KSM_PROM_SCLK") + (net 211 "MKM_AVR_CS_N") + (net 212 "MKM_AVR_MISO") + (net 213 "MKM_AVR_MOSI") + (net 214 "MKM_AVR_SCK") + (net 215 "MKM_CONTROL_AVR_ENA") + (net 216 "MKM_CONTROL_FPGA_DIS") + (net 217 "MKM_CS_N") + (net 218 "MKM_FPGA_CS_N") + (net 219 "MKM_FPGA_MISO") + (net 220 "MKM_FPGA_MOSI") + (net 221 "MKM_FPGA_SCK") + (net 222 "MKM_MISO") + (net 223 "MKM_MOSI") + (net 224 "MKM_SCK") + (net 225 "NetC5_1") + (net 226 "NetC11_1") + (net 227 "NetC12_2") + (net 228 "NetC17_2") + (net 229 "NetC70_2") + (net 230 "NetC71_2") + (net 231 "NetC75_2") + (net 232 "NetC78_2") + (net 233 "NetC90_2") + (net 234 "NetC93_2") + (net 235 "NetC115_1") + (net 236 "NetC116_1") + (net 237 "NetC117_1") + (net 238 "NetC117_2") + (net 239 "NetC118_1") + (net 240 "NetC118_2") + (net 241 "NetC207_1") + (net 242 "NetC208_1") + (net 243 "NetC208_2") + (net 244 "NetIC1_3") + (net 245 "NetJP2_2") + (net 246 "NetLED1_1") + (net 247 "NetLED2_1") + (net 248 "NetLED3_1") + (net 249 "NetLED4_1") + (net 250 "NetLED9_1") + (net 251 "NetLED10_1") + (net 252 "NetLED11_1") + (net 253 "NetLED12_1") + (net 254 "NetLED13_1") + (net 255 "NetLED14_1") + (net 256 "NetLED15_1") + (net 257 "NetLED16_1") + (net 258 "NetLED17_1") + (net 259 "NetLED18_1") + (net 260 "NetLED18_2") + (net 261 "NetQ1_1") + (net 262 "NetQ5_1") + (net 263 "NetQ5_3") + (net 264 "NetR1_1") + (net 265 "NetR3_2") + (net 266 "NetR8_1") + (net 267 "NetR32_2") + (net 268 "NetR33_2") + (net 269 "NetR52_1") + (net 270 "NetR53_2") + (net 271 "NetR54_1") + (net 272 "NetR55_2") + (net 273 "NetR65_1") + (net 274 "NetR66_1") + (net 275 "NetR67_1") + (net 276 "NOISE_IN") + (net 277 "NOISE_OUT") + (net 278 "NRST") + (net 279 "OSC_IN") + (net 280 "OSC_OUT") + (net 281 "POK_VCCAUX") + (net 282 "POK_VCCINT") + (net 283 "POK_VCCO") + (net 284 "PWR_18V") + (net 285 "PWR_ENA_VCCAUX") + (net 286 "PWR_ENA_VCCINT") + (net 287 "PWR_ENA_VCCO") + (net 288 "RAW_NOISE") + (net 289 "RTC_MFP") + (net 290 "RTC_SCL") + (net 291 "RTC_SDA") + (net 292 "SPI_A_TRISTATE") + (net 293 "SPI_B_TRISTATE") + (net 294 "SWDCLK") + (net 295 "SWDIO") + (net 296 "USB_MGMT_N") + (net 297 "USB_MGMT_P") + (net 298 "USB_N") + (net 299 "USB_P") + (net 300 "VCAP1") + (net 301 "VCAP2") + (net 302 "VCC_5V0") + (net 303 "VCCO_3V3") + + + (net_class Default "This is the default net class." + (clearance 0.150000) + (trace_width 0.254000) + (via_dia 0.889) + (via_drill 0.635) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net Net1) + ) + + (net_class FMC "FMC" + (clearance 0.150000) + (trace_width 0.254000) + (via_dia 0.889) + (via_drill 0.635) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net "FMC_A0") + (add_net "FMC_A1") + (add_net "FMC_A10") + (add_net "FMC_A11") + (add_net "FMC_A12") + (add_net "FMC_A13") + (add_net "FMC_A14") + (add_net "FMC_A15") + (add_net "FMC_A16") + (add_net "FMC_A17") + (add_net "FMC_A18") + (add_net "FMC_A19") + (add_net "FMC_A2") + (add_net "FMC_A20") + (add_net "FMC_A21") + (add_net "FMC_A22") + (add_net "FMC_A23") + (add_net "FMC_A24") + (add_net "FMC_A25") + (add_net "FMC_A3") + (add_net "FMC_A4") + (add_net "FMC_A5") + (add_net "FMC_A6") + (add_net "FMC_A7") + (add_net "FMC_A8") + (add_net "FMC_A9") + (add_net "FMC_CLK") + (add_net "FMC_D0") + (add_net "FMC_D1") + (add_net "FMC_D10") + (add_net "FMC_D11") + (add_net "FMC_D12") + (add_net "FMC_D13") + (add_net "FMC_D14") + (add_net "FMC_D15") + (add_net "FMC_D16") + (add_net "FMC_D17") + (add_net "FMC_D18") + (add_net "FMC_D19") + (add_net "FMC_D2") + (add_net "FMC_D20") + (add_net "FMC_D21") + (add_net "FMC_D22") + (add_net "FMC_D23") + (add_net "FMC_D24") + (add_net "FMC_D25") + (add_net "FMC_D26") + (add_net "FMC_D27") + (add_net "FMC_D28") + (add_net "FMC_D29") + (add_net "FMC_D3") + (add_net "FMC_D30") + (add_net "FMC_D31") + (add_net "FMC_D4") + (add_net "FMC_D5") + (add_net "FMC_D6") + (add_net "FMC_D7") + (add_net "FMC_D8") + (add_net "FMC_D9") + (add_net "FMC_NBL0") + (add_net "FMC_NBL1") + (add_net "FMC_NBL2") + (add_net "FMC_NBL3") + (add_net "FMC_NE1") + (add_net "FMC_NL") + (add_net "FMC_NOE") + (add_net "FMC_NWAIT") + (add_net "FMC_NWE") + (add_net "FMC_SDCKE0") + (add_net "FMC_SDCKE1") + (add_net "FMC_SDCLK") + (add_net "FMC_SDNCAS") + (add_net "FMC_SDNE0") + (add_net "FMC_SDNE1") + (add_net "FMC_SDNRAS") + (add_net "FMC_SDNWE") + ) + (net_class FPGA_GPIO "FPGA_GPIO" + (clearance 0.150000) + (trace_width 0.254000) + (via_dia 0.889) + (via_drill 0.635) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net "FPGA_GPIO_A_0") + (add_net "FPGA_GPIO_A_1") + (add_net "FPGA_GPIO_A_2") + (add_net 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(layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1730 pos:357542(0x574A6) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0200FFFFFFFF87D03A0590D1D603A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1731 pos:357746(0x57572) type:2 net:282 +#010000000005000000047C267C300100000000AA000000200C001A01FFFF0200FFFFFFFFD9CA280590D1D603A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#3: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8715mil|Y=6243.5mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C2|SOURCEUNIQUEID=\IOLGIWQB|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=NBPBNQDA|JUMPERSVISIBLE=TRUE +#$pads{3} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 21.463 -94.0689) + (path /539EEC0F) + (attr smd) + (fp_text reference "C2" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1728 pos:357134(0x5730E) type:2 net:282 +#010000000005000000047C267C300100000000AA000000200C001A01FFFF0300FFFFFFFFD9CA2805B8AEB803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V") + ) +#1309 counter:1729 pos:357338(0x573DA) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0300FFFFFFFF87D03A05B8AEB803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#4: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8715mil|Y=6046mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C3|SOURCEUNIQUEID=\GQYOAUWQ|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UDNYJKQI|JUMPERSVISIBLE=TRUE +#$pads{4} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 21.463 -89.0524) + (path /539EEC0F) + (attr smd) + (fp_text reference "C3" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1726 pos:356726(0x57176) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0400FFFFFFFF87D03A05E08B9A03A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1727 pos:356930(0x57242) type:2 net:282 +#010000000005000000047C267C300100000000AA000000200C001A01FFFF0400FFFFFFFFD9CA2805E08B9A03A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#5: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8897.5591mil|Y=5874.6457mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C4|SOURCEUNIQUEID=\JTNMPEQT|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=HLOWEYXK|JUMPERSVISIBLE=TRUE +#$pads{5} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 26.100001 -84.700001) + (path /539EEC0F) + (attr smd) + (fp_text reference "C4" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1682 pos:347750(0x54E66) type:2 net:282 +#010000000005000000047C267C300100000000AA000000200C001A01FFFF0500FFFFFFFFF5A74A05596680030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V") + ) +#1309 counter:1683 pos:347954(0x54F32) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0500FFFFFFFFDAA95005596680030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#6: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8875.9055mil|Y=5521.2992mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C5|SOURCEUNIQUEID=\DHXJMWHX|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ARVYIINX|JUMPERSVISIBLE=TRUE +#$pads{6} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 25.55 -75.725) + (path /539EEC0F) + (attr smd) + (fp_text reference "C5" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1680 pos:347342(0x54CCE) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0600FFFFFFFF025C4D05C07B4A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1681 pos:347546(0x54D9A) type:2 net:223 +#010000000005000000047C267C300100000000AA000000200C00DF00FFFF0600FFFFFFFF1D5A4705C07B4A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 225 "NetC5_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#7: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8877mil|Y=5368mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C6|SOURCEUNIQUEID=\XAUUFRQR|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VMCHPYUW|JUMPERSVISIBLE=TRUE +#$pads{7} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 25.5778 -71.8312) + (path /539EEC0F) + (attr smd) + (fp_text reference "C6" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1678 pos:346934(0x54B36) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFF0700FFFFFFFFDE844705801733030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1309 counter:1679 pos:347138(0x54C02) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0700FFFFFFFFC3864D05801733030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#8: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10724.3307mil|Y=5945.5118mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C7|SOURCEUNIQUEID=\LGRMREEA|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR X7R 25V|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=ACVBYLQP|JUMPERSVISIBLE=TRUE +#$pads{8} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 72.5 -86.5) + (path /539EEC0F) + (attr smd) + (fp_text reference "C7" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:445 pos:92763(0x16A5B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF0800FFFFFFFF46655E068E368B03E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:446 pos:92967(0x16B27) type:2 net:282 +#010000000005000000047C267C300100000000AA000000010C001A01FFFF0800FFFFFFFF10696A068E368B03E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 284 "PWR_18V") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#9: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8472mil|Y=5191mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C8|SOURCEUNIQUEID=\QFBFXXFU|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BDAWWRKF|JUMPERSVISIBLE=TRUE +#$pads{9} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 15.2908 -67.3354) + (path /539EEC0F) + (attr smd) + (fp_text reference "C8" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1724 pos:356318(0x56FDE) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFF0900FFFFFFFF57BC150570151803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at 1.50000 0.00000 180) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1309 counter:1725 pos:356522(0x570AA) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0900FFFFFFFFA9B6030570151803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at -1.50000 0.00000 180) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#10: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8282mil|Y=4689mil|PATTERN=C_D|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C9|SOURCEUNIQUEID=\BBDAMTBV|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CP_E-035X080|SOURCEDESCRIPTION=Kemet Tantalum Capacitor|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=GEXVCJTH|JUMPERSVISIBLE=TRUE +#$pads{10} + (module "C_D" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 10.4648 -54.5846) + (path /539EEC0F) + (attr smd) + (fp_text reference "C9" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1812 pos:425114(0x67C9A) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFF0A00FFFFFFFFC7410305107CCB02F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at 3.25000 0.00000 180) (size 2.4000003 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1309 counter:1813 pos:425318(0x67D66) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0A00FFFFFFFF7835DC04107CCB02F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at -3.25000 0.00000 180) (size 2.4000003 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#11: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8282mil|Y=4944mil|PATTERN=C_D|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C10|SOURCEUNIQUEID=\GKXFCOSK|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CP_E-035X080|SOURCEDESCRIPTION=Kemet Tantalum Capacitor|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=QUYICOWB|JUMPERSVISIBLE=TRUE +#$pads{11} + (module "C_D" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 10.4648 -61.0616) + (path /539EEC0F) + (attr smd) + (fp_text reference "C10" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1810 pos:424706(0x67B02) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0B00FFFFFFFF7835DC040065F202F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at -3.25000 0.00000 180) (size 2.4000003 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1811 pos:424910(0x67BCE) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFF0B00FFFFFFFFC74103050065F202F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at 3.25000 0.00000 180) (size 2.4000003 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#12: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10803.0709mil|Y=6063.622mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C11|SOURCEUNIQUEID=\FHFALBPP|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rcl.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=UWVMBBJO|JUMPERSVISIBLE=TRUE +#$pads{12} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 74.500001 -89.499999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C11" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:373 pos:78075(0x130FB) type:2 net:4 +#010000000005000000047C267C300100000000AA000000010C000400FFFF0C00FFFFFFFFF56A7006493B9A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 6 "15V_STABLE") + ) +#1309 counter:374 pos:78279(0x131C7) type:2 net:224 +#010000000005000000047C267C300100000000AA000000010C00E000FFFF0C00FFFFFFFFF56A70062E3DA0030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 226 "NetC11_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#13: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10675.1181mil|Y=6181.7323mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C12|SOURCEUNIQUEID=\AGMQMKVQ|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rcl.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=VMJWGKJO|JUMPERSVISIBLE=TRUE +#$pads{13} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 71.25 -92.5) + (path /539EEC0F) + (attr smd) + (fp_text reference "C12" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:371 pos:77667(0x12F63) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF0D00FFFFFFFFDBE35906EB41AF030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:372 pos:77871(0x1302F) type:2 net:225 +#010000000005000000047C267C300100000000AA000000010C00E100FFFF0D00FFFFFFFFC0E55F06EB41AF030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 227 "NetC12_2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#14: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10871.9685mil|Y=5994.7244mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C13|SOURCEUNIQUEID=\DFUGYXUK|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR X7R 25V|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=FJVTKVXI|JUMPERSVISIBLE=TRUE +#$pads{14} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 76.25 -87.75) + (path /539EEC0F) + (attr smd) + (fp_text reference "C13" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:443 pos:92355(0x168C3) type:2 net:4 +#010000000005000000047C267C300100000000AA000000010C000400FFFF0E00FFFFFFFF45EE7A06D1BA9803E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 6 "15V_STABLE") + ) +#1309 counter:444 pos:92559(0x1698F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF0E00FFFFFFFF45EE7A0607B78C03E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#15: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11413mil|Y=6328mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C14|SOURCEUNIQUEID=\KEXRXNOQ|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CVWYBJDA|JUMPERSVISIBLE=TRUE +#$pads{15} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 89.9922 -96.2152) + (path /539EEC0F) + (attr smd) + (fp_text reference "C14" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1676 pos:346526(0x5499E) type:2 net:274 +#010000000005000000047C267C300100000000AA000000200C001201FFFF0F00FFFFFFFF5D7BCA068093C5030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 276 "NOISE_IN") + ) +#1309 counter:1677 pos:346730(0x54A6A) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF0F00FFFFFFFF427DD0068093C5030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#16: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11393mil|Y=5756mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C15|SOURCEUNIQUEID=\PFQHDLHY|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DVCYXRLH|JUMPERSVISIBLE=TRUE +#$pads{16} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 89.4842 -81.6864) + (path /539EEC0F) + (attr smd) + (fp_text reference "C15" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1674 pos:346118(0x54806) type:2 net:286 +#010000000005000000047C267C300100000000AA000000200C001E01FFFF1000FFFFFFFF0270CD06C04B6E030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 288 "RAW_NOISE") + ) +#1309 counter:1675 pos:346322(0x548D2) type:2 net:6 +#010000000005000000047C267C300100000000AA000000200C000600FFFF1000FFFFFFFF1D6EC706C04B6E030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 8 "NetC15_2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#17: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10915mil|Y=6026mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C16|SOURCEUNIQUEID=\OEEHSEKR|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BHUPQHBF|JUMPERSVISIBLE=TRUE +#$pads{17} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 77.343 -88.5444) + (path /539EEC0F) + (attr smd) + (fp_text reference "C16" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1672 pos:345710(0x5466E) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF1100FFFFFFFF3D7E7E06A07E97030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1673 pos:345914(0x5473A) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1100FFFFFFFF22808406A07E97030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#18: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9008.7795mil|Y=3801.811mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C17|SOURCEUNIQUEID=\HTCCIDNV|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rcl.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=LUYKEXKO|JUMPERSVISIBLE=TRUE +#$pads{18} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 28.924999 -32.049999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C17" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1670 pos:345302(0x544D6) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1200FFFFFFFF81A05B053E1C44020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1671 pos:345506(0x545A2) type:2 net:226 +#010000000005000000047C267C300100000000AA000000200C00E200FFFF1200FFFFFFFF66A261053E1C44020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 228 "NetC17_2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#19: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8979.252mil|Y=4057.7165mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C18|SOURCEUNIQUEID=\CIJPUSKD|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rcl.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=KWEEOKSG|JUMPERSVISIBLE=TRUE +#$pads{19} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 28.175001 -38.549999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C18" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1668 pos:344894(0x5433E) type:2 net:278 +#010000000005000000047C267C300100000000AA000000200C001601FFFF1300FFFFFFFF151F57058D286B020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 280 "OSC_OUT") + ) +#1309 counter:1669 pos:345098(0x5440A) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1300FFFFFFFFFA205D058D286B020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#20: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8386.7323mil|Y=3345.1181mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C19|SOURCEUNIQUEID=\XVBDNHLO|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=RCJVNOMG|JUMPERSVISIBLE=TRUE +#$pads{20} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 13.125 -20.45) + (path /539EEC0F) + (attr smd) + (fp_text reference "C19" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:369 pos:77259(0x12DCB) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF1400FFFFFFFFADB70205AD6CFE010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:370 pos:77463(0x12E97) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF1400FFFFFFFFC8B5FC04AD6CFE010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#21: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8917.2441mil|Y=3457.3228mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C20|SOURCEUNIQUEID=\QHTVRJCA|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=LQFUJQBV|JUMPERSVISIBLE=TRUE +#$pads{21} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 26.6 -23.299999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C20" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:367 pos:76851(0x12C33) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF1500FFFFFFFFD9A950059F8C12020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:368 pos:77055(0x12CFF) type:2 net:276 +#010000000005000000047C267C300100000000AA000000010C001401FFFF1500FFFFFFFFD9A95005BA8A0C020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 278 "NRST") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#22: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9749mil|Y=3101mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C21|SOURCEUNIQUEID=\OERWFUKM|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=HTXGUFMA|JUMPERSVISIBLE=TRUE +#$pads{22} + (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 47.7266 -14.2494) + (path /539EEC0F) + (attr smd) + (fp_text reference "C21" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1692 pos:349790(0x5565E) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1600FFFFFFFFD7C8D305D02CD90151CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000000000000100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.70000 0.00000) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1693 pos:349994(0x5572A) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF1600FFFFFFFFCA5FCB05D02CD90151CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000000000000100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.70000 0.00000) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#23: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10038mil|Y=4568mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C22|SOURCEUNIQUEID=\QRDVIVYO|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FMQDRRGE|JUMPERSVISIBLE=TRUE +#$pads{23} + (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 55.0672 -51.5112) + (path /539EEC0F) + (attr smd) + (fp_text reference "C22" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1690 pos:349382(0x554C6) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1700FFFFFFFFE6E1FF058005B90251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008066400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.70000 0.00000 180) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1691 pos:349586(0x55592) type:2 net:298 +#010000000005000000047C267C300100000000AA000000200C002A01FFFF1700FFFFFFFFD978F7058005B90251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008066400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.70000 0.00000 180) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 300 "VCAP1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#24: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10038mil|Y=4496mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C23|SOURCEUNIQUEID=\HJARIKGM|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YNNFFGYM|JUMPERSVISIBLE=TRUE +#$pads{24} + (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 55.0672 -49.6824) + (path /539EEC0F) + (attr smd) + (fp_text reference "C23" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1688 pos:348974(0x5532E) type:2 net:298 +#010000000005000000047C267C300100000000AA000000200C002A01FFFF1800FFFFFFFFD978F7050009AE0251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008066400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.70000 0.00000 180) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 300 "VCAP1") + ) +#1309 counter:1689 pos:349178(0x553FA) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1800FFFFFFFFE6E1FF050009AE0251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008066400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.70000 0.00000 180) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#25: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10467mil|Y=3500mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C24|SOURCEUNIQUEID=\NFRWNSFV|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YDBOUWJD|JUMPERSVISIBLE=TRUE +#$pads{25} + (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 65.9638 -24.384) + (path /539EEC0F) + (attr smd) + (fp_text reference "C24" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1686 pos:348566(0x55196) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1900FFFFFFFF30233D063ADA110251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008056400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.70000 90) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1687 pos:348770(0x55262) type:2 net:299 +#010000000005000000047C267C300100000000AA000000200C002B01FFFF1900FFFFFFFF30233D0647431A0251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008056400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.70000 90) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 301 "VCAP2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#26: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10539mil|Y=3500mil|PATTERN=C_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C25|SOURCEUNIQUEID=\JPEWGSJL|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0603 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VJKMEVHC|JUMPERSVISIBLE=TRUE +#$pads{26} + (module "C_0603" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 67.7926 -24.384) + (path /539EEC0F) + (attr smd) + (fp_text reference "C25" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1684 pos:348158(0x54FFE) type:2 net:299 +#010000000005000000047C267C300100000000AA000000200C002B01FFFF1A00FFFFFFFFB01F480647431A0251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008056400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.70000 90) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 301 "VCAP2") + ) +#1309 counter:1685 pos:348362(0x550CA) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1A00FFFFFFFFB01F48063ADA110251CE040051CE040051CE040051CE040051CE040051CE04000000000002020200000000008056400100000000000000F20003000400798001007980010079800100BAA3FFFF087B00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.70000 90) (size 0.8000009 0.8000009) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#27: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9040mil|Y=3586mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C26|SOURCEUNIQUEID=\CGCPBGIP|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=IMYGPLPE|JUMPERSVISIBLE=TRUE +#$pads{27} + (module "C_0805" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 29.718 -26.5684) + (path /539EEC0F) + (attr smd) + (fp_text reference "C26" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1700 pos:351422(0x55CBE) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1B00FFFFFFFF006563053B2C1D02E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1701 pos:351626(0x55D8A) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF1B00FFFFFFFF0065630505302902E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#28: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9669mil|Y=4561mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C27|SOURCEUNIQUEID=\SFOVQEEA|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DYPSYBFJ|JUMPERSVISIBLE=TRUE +#$pads{28} + (module "C_0805" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 45.6946 -51.3334) + (path /539EEC0F) + (attr smd) + (fp_text reference "C27" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1698 pos:351014(0x55B26) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF1C00FFFFFFFF3561C90510F4B702E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1699 pos:351218(0x55BF2) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1C00FFFFFFFF6B5DBD0510F4B702E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#29: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9864mil|Y=4483mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C28|SOURCEUNIQUEID=\CGWPAUPR|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VMLEHLLQ|JUMPERSVISIBLE=TRUE +#$pads{29} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 50.6476 -49.3522) + (path /539EEC0F) + (attr smd) + (fp_text reference "C28" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1666 pos:344486(0x541A6) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF1D00FFFFFFFF7221E405300DAC020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1667 pos:344690(0x54272) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1D00FFFFFFFF8D1FDE05300DAC020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#30: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10446mil|Y=3944mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C29|SOURCEUNIQUEID=\ACVRKIVN|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YOGXTRXS|JUMPERSVISIBLE=TRUE +#$pads{30} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 65.4304 -35.6616) + (path /539EEC0F) + (attr smd) + (fp_text reference "C29" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1664 pos:344078(0x5400E) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1E00FFFFFFFFE0EE39068DCD56020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1665 pos:344282(0x540DA) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF1E00FFFFFFFFE0EE390672CF5C020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#31: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10128mil|Y=4500mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C30|SOURCEUNIQUEID=\GFVUFRNR|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XEGDJXDO|JUMPERSVISIBLE=TRUE +#$pads{31} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 57.3532 -49.784) + (path /539EEC0F) + (attr smd) + (fp_text reference "C30" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1662 pos:343670(0x53E76) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF1F00FFFFFFFF006909064EA4AB020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1663 pos:343874(0x53F42) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1F00FFFFFFFF0069090633A6B1020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#32: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10285mil|Y=3168mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C31|SOURCEUNIQUEID=\DOWCWNSY|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FBUYFSNV|JUMPERSVISIBLE=TRUE +#$pads{32} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 61.341 -15.9512) + (path /539EEC0F) + (attr smd) + (fp_text reference "C31" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1660 pos:343262(0x53CDE) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2000FFFFFFFFC35E24060066E3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1661 pos:343466(0x53DAA) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2000FFFFFFFFDE5C1E060066E3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#33: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=3588mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C32|SOURCEUNIQUEID=\OLLSKMDE|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PUEAGWAY|JUMPERSVISIBLE=TRUE +#$pads{33} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 31.9278 -26.6192) + (path /539EEC0F) + (attr smd) + (fp_text reference "C32" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1658 pos:342854(0x53B46) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2100FFFFFFFF70AB7005327D26020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1659 pos:343058(0x53C12) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2100FFFFFFFF70AB70054D7B20020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#34: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9072mil|Y=4173mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C33|SOURCEUNIQUEID=\ICCXRKBS|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ICLFMCIH|JUMPERSVISIBLE=TRUE +#$pads{34} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 30.5308 -41.4782) + (path /539EEC0F) + (attr smd) + (fp_text reference "C33" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1656 pos:342446(0x539AE) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2200FFFFFFFF00476805C3C07F020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1657 pos:342650(0x53A7A) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2200FFFFFFFF00476805DEBE79020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#35: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=4500mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C34|SOURCEUNIQUEID=\XONFBBEQ|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=KAJODKPQ|JUMPERSVISIBLE=TRUE +#$pads{35} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.9346 -49.784) + (path /539EEC0F) + (attr smd) + (fp_text reference "C34" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1654 pos:342038(0x53816) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2300FFFFFFFFD0EC1E064EA4AB020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1655 pos:342242(0x538E2) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2300FFFFFFFFD0EC1E0633A6B1020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#36: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9358.189mil|Y=3347.0866mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C35|SOURCEUNIQUEID=\NXQGNKDN|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=ADJBWSBF|JUMPERSVISIBLE=TRUE +#$pads{36} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 37.800001 -20.5) + (path /539EEC0F) + (attr smd) + (fp_text reference "C35" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:365 pos:76443(0x12A9B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF2400FFFFFFFF42F2930585BA01020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:366 pos:76647(0x12B67) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF2400FFFFFFFF42F29305A0B8FB010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#37: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10446mil|Y=3711mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C36|SOURCEUNIQUEID=\MXYDVOBH|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=APQTATHP|JUMPERSVISIBLE=TRUE +#$pads{37} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 65.4304 -29.7434) + (path /539EEC0F) + (attr smd) + (fp_text reference "C36" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1652 pos:341630(0x5367E) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2500FFFFFFFFE0EE3906FE3F33020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1653 pos:341834(0x5374A) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2500FFFFFFFFE0EE3906E34139020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#38: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9413.3071mil|Y=3339.2126mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=C37|SOURCEUNIQUEID=\GPLOOKVP|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=GNDNVXHP|JUMPERSVISIBLE=TRUE +#$pads{38} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 39.2 -20.3) + (path /539EEC0F) + (attr smd) + (fp_text reference "C37" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:363 pos:76035(0x12903) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF2600FFFFFFFF4F5B9C05F18600020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:364 pos:76239(0x129CF) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF2600FFFFFFFF4F5B9C050C85FA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#39: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9749mil|Y=3168mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=C38|SOURCEUNIQUEID=\ESGXQYJH|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=IXTOCIER|JUMPERSVISIBLE=TRUE +#$pads{39} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 47.7266 -15.9512) + (path /539EEC0F) + (attr smd) + (fp_text reference "C38" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1650 pos:341222(0x534E6) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2700FFFFFFFF5E93CC050066E3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1651 pos:341426(0x535B2) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2700FFFFFFFF4395D2050066E3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#40: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10023mil|Y=3168mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=C39|SOURCEUNIQUEID=\AXGJOSIH|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=AOUVMBTG|JUMPERSVISIBLE=TRUE +#$pads{40} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 54.6862 -15.9512) + (path /539EEC0F) + (attr smd) + (fp_text reference "C39" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1648 pos:340814(0x5334E) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2800FFFFFFFF6364FC050066E3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1649 pos:341018(0x5341A) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2800FFFFFFFF7E62F6050066E3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#41: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=4317mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=C40|SOURCEUNIQUEID=\VMRMCCYQ|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CQWIAUUB|JUMPERSVISIBLE=TRUE +#$pads{41} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 31.9278 -45.1358) + (path /539EEC0F) + (attr smd) + (fp_text reference "C40" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1646 pos:340406(0x531B6) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2900FFFFFFFF70AB7005C2B995020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1647 pos:340610(0x53282) type:2 net:5 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9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=C41|SOURCEUNIQUEID=\SDBDJCDV|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YKNWTUPX|JUMPERSVISIBLE=TRUE +#$pads{42} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 31.9278 -41.4782) + (path /539EEC0F) + (attr smd) + (fp_text reference "C41" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1644 pos:339998(0x5301E) type:2 net:5 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(xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#43: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10480mil|Y=3405mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=C42|SOURCEUNIQUEID=\LAMJESNK|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RCPJJDGU|JUMPERSVISIBLE=TRUE +#$pads{43} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 66.294 -21.971) + (path /539EEC0F) + (attr smd) + (fp_text reference "C42" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1642 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#44: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9414mil|Y=4483mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=22|SOURCEDESIGNATOR=C43|SOURCEUNIQUEID=\IVCSOSHJ|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MJRXYGQF|JUMPERSVISIBLE=TRUE +#$pads{44} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 39.2176 -49.3522) + (path /539EEC0F) + (attr smd) + (fp_text reference "C43" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1640 pos:339182(0x52CEE) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2C00FFFFFFFF53779F05300DAC020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1641 pos:339386(0x52DBA) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2C00FFFFFFFF6E759905300DAC020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#45: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9667mil|Y=4483mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=C44|SOURCEUNIQUEID=\HRXSFQUB|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CBORRSNQ|JUMPERSVISIBLE=TRUE +#$pads{45} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 45.6438 -49.3522) + (path /539EEC0F) + (attr smd) + (fp_text reference "C44" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1638 pos:338774(0x52B56) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2D00FFFFFFFF2212C605300DAC020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1639 pos:338978(0x52C22) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2D00FFFFFFFF3D10C005300DAC020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#46: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10446mil|Y=4139mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=C45|SOURCEUNIQUEID=\XNBLTOXB|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=IWDYTUVX|JUMPERSVISIBLE=TRUE +#$pads{46} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 65.4304 -40.6146) + (path /539EEC0F) + (attr smd) + (fp_text reference "C45" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1636 pos:338366(0x529BE) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2E00FFFFFFFFE0EE3906A3907A020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1637 pos:338570(0x52A8A) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2E00FFFFFFFFE0EE3906BE8E74020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#47: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=3795mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=25|SOURCEDESIGNATOR=C46|SOURCEUNIQUEID=\XDROBBVT|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PBPJFKUG|JUMPERSVISIBLE=TRUE +#$pads{47} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 31.9278 -31.877) + (path /539EEC0F) + (attr smd) + (fp_text reference "C46" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1634 pos:337958(0x52826) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF2F00FFFFFFFF70AB7005221346020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1635 pos:338162(0x528F2) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF2F00FFFFFFFF70AB70053D1140020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#48: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4060mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C47|SOURCEUNIQUEID=\VHYNRTHL|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=NNRNWKMU|JUMPERSVISIBLE=TRUE +#$pads{48} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.0562 -38.608) + (path /539EEC0F) + (attr smd) + (fp_text reference "C47" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:361 pos:75627(0x1276B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3000FFFFFFFF50E6E506CD8068020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:362 pos:75831(0x12837) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3000FFFFFFFF50E6E506B2826E020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#49: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10945mil|Y=4163.126mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C48|SOURCEUNIQUEID=\NBGNTSHR|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=QGCENLVV|JUMPERSVISIBLE=TRUE +#$pads{49} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 78.105 -41.2274) + (path /539EEC0F) + (attr smd) + (fp_text reference "C48" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:359 pos:75219(0x125D3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3100FFFFFFFF101386060E3F7E020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:360 pos:75423(0x1269F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3100FFFFFFFF10138606293D78020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#50: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4741mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C49|SOURCEUNIQUEID=\XEEYECSQ|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=DCKDWONV|JUMPERSVISIBLE=TRUE +#$pads{50} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.0562 -55.9054) + (path /539EEC0F) + (attr smd) + (fp_text reference "C49" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:357 pos:74811(0x1243B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3200FFFFFFFF50E6E5065D6AD0020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:358 pos:75015(0x12507) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3200FFFFFFFF50E6E506426CD6020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#51: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10945mil|Y=4839mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C50|SOURCEUNIQUEID=\GIMQNIWP|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=OPFESTEA|JUMPERSVISIBLE=TRUE +#$pads{51} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 78.105 -58.3946) + (path /539EEC0F) + (attr smd) + (fp_text reference "C50" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:355 pos:74403(0x122A3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3300FFFFFFFF101386067E5EDF020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:356 pos:74607(0x1236F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3300FFFFFFFF101386066360E5020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#52: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4348mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C51|SOURCEUNIQUEID=\KNMEKKGN|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=YSTSEIYE|JUMPERSVISIBLE=TRUE +#$pads{52} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.0562 -45.9232) + (path /539EEC0F) + (attr smd) + (fp_text reference "C51" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:353 pos:73995(0x1210B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3400FFFFFFFF50E6E506CD7294020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:354 pos:74199(0x121D7) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3400FFFFFFFF50E6E506B2749A020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#53: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10945mil|Y=4726mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C52|SOURCEUNIQUEID=\MTTHOQQB|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=NAJFXVLX|JUMPERSVISIBLE=TRUE +#$pads{53} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 78.105 -55.5244) + (path /539EEC0F) + (attr smd) + (fp_text reference "C52" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:351 pos:73587(0x11F73) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3500FFFFFFFF101386066E20CE020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:352 pos:73791(0x1203F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3500FFFFFFFF101386065322D4020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#54: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4941.3149mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C53|SOURCEUNIQUEID=\EDCAOFVK|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=SXDLQJCH|JUMPERSVISIBLE=TRUE +#$pads{54} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.0562 -60.993398) + (path /539EEC0F) + (attr smd) + (fp_text reference "C53" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:349 pos:73179(0x11DDB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3600FFFFFFFF50E6E50610FDF4020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:350 pos:73383(0x11EA7) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3600FFFFFFFF50E6E5062BFBEE020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#55: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4154mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C54|SOURCEUNIQUEID=\AURXGSDF|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=GBKOFXXF|JUMPERSVISIBLE=TRUE +#$pads{55} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.0562 -40.9956) + (path /539EEC0F) + (attr smd) + (fp_text reference "C54" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:347 pos:72771(0x11C43) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3700FFFFFFFF50E6E506AED876020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:348 pos:72975(0x11D0F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3700FFFFFFFF50E6E50693DA7C020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#56: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4858mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C55|SOURCEUNIQUEID=\XESIFIGW|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=KPWCLFSW|JUMPERSVISIBLE=TRUE +#$pads{56} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.0562 -58.8772) + (path /539EEC0F) + (attr smd) + (fp_text reference "C55" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:345 pos:72363(0x11AAB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3800FFFFFFFF50E6E506AD44E2020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:346 pos:72567(0x11B77) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3800FFFFFFFF50E6E5069246E8020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#57: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10945mil|Y=4326mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C56|SOURCEUNIQUEID=\BEXOVNOS|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=WKAMJYNF|JUMPERSVISIBLE=TRUE +#$pads{57} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 78.105 -45.3644) + (path /539EEC0F) + (attr smd) + (fp_text reference "C56" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:343 pos:71955(0x11913) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3900FFFFFFFF101386066E1791020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:344 pos:72159(0x119DF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3900FFFFFFFF10138606531997020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#58: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11573mil|Y=4623mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C57|SOURCEUNIQUEID=\ESCEXNSJ|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=KDBSBBTI|JUMPERSVISIBLE=TRUE +#$pads{58} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.0562 -52.9082) + (path /539EEC0F) + (attr smd) + (fp_text reference "C57" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:341 pos:71547(0x1177B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF3A00FFFFFFFF50E6E506FD68BE020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:342 pos:71751(0x11847) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF3A00FFFFFFFF50E6E506E26AC4020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#59: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10737.0157mil|Y=4149.937mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C58|SOURCEUNIQUEID=\QNIGODPS|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RTWQVRGU|JUMPERSVISIBLE=TRUE +#$pads{59} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 72.822199 -40.8924) + (path /539EEC0F) + (attr smd) + (fp_text reference "C58" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1632 pos:337550(0x5268E) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF3B00FFFFFFFFAD566606F83976020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1633 pos:337754(0x5275A) type:2 net:5 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2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C59|SOURCEUNIQUEID=\UDBPYBES|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ENFCSAFB|JUMPERSVISIBLE=TRUE +#$pads{60} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 72.8472 -38.6826) + (path /539EEC0F) + (attr smd) + (fp_text reference "C59" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1630 pos:337142(0x524F6) type:2 net:5 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(xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#61: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4939.874mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C60|SOURCEUNIQUEID=\SNQKUCWG|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BWGVKUNV|JUMPERSVISIBLE=TRUE +#$pads{61} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 72.8472 -60.9568) + (path /539EEC0F) + (attr smd) + (fp_text reference "C60" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1628 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#62: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11363mil|Y=4849.685mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C61|SOURCEUNIQUEID=\AEKMPMUW|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DIELQBTL|JUMPERSVISIBLE=TRUE +#$pads{62} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 88.7222 -58.665999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C61" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1626 pos:336326(0x521C6) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF3E00FFFFFFFF30DBC506C501E7020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1627 pos:336530(0x52292) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF3E00FFFFFFFF30DBC506E0FFE0020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#63: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4612mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C62|SOURCEUNIQUEID=\YFSBXYXP|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CRYOXXNU|JUMPERSVISIBLE=TRUE +#$pads{63} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 72.8472 -52.6288) + (path /539EEC0F) + (attr smd) + (fp_text reference "C62" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1624 pos:335918(0x5202E) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF3F00FFFFFFFF207D660632BDC2020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1625 pos:336122(0x520FA) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF3F00FFFFFFFF207D66064DBBBC020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#64: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11363mil|Y=4160mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=C63|SOURCEUNIQUEID=\BHIMBLHA|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JSBUODVE|JUMPERSVISIBLE=TRUE +#$pads{64} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 88.7222 -41.148) + (path /539EEC0F) + (attr smd) + (fp_text reference "C63" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1622 pos:335510(0x51E96) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4000FFFFFFFF30DBC5060DC377020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1623 pos:335714(0x51F62) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF4000FFFFFFFF30DBC506F2C47D020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#65: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4847mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=C64|SOURCEUNIQUEID=\CQFRBQUK|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PFAKLPKD|JUMPERSVISIBLE=TRUE +#$pads{65} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 72.8472 -58.5978) + (path /539EEC0F) + (attr smd) + (fp_text reference "C64" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1620 pos:335102(0x51CFE) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF4100FFFFFFFF207D6606E298E6020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1621 pos:335306(0x51DCA) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4100FFFFFFFF207D6606FD96E0020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#66: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11363mil|Y=4726.8425mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=C65|SOURCEUNIQUEID=\TYQTIQCH|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=QUQTOHES|JUMPERSVISIBLE=TRUE +#$pads{66} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 88.7222 -55.545799) + (path /539EEC0F) + (attr smd) + (fp_text reference "C65" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1618 pos:334694(0x51B66) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4200FFFFFFFF30DBC5063C43D4020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1619 pos:334898(0x51C32) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF4200FFFFFFFF30DBC5065741CE020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#67: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4333mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=C66|SOURCEUNIQUEID=\SRYPIEKB|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XXQURNRB|JUMPERSVISIBLE=TRUE +#$pads{67} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 72.8472 -45.5422) + (path /539EEC0F) + (attr smd) + (fp_text reference "C66" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1616 pos:334286(0x519CE) type:2 net:301 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(xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#68: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11363mil|Y=4330.8425mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=C67|SOURCEUNIQUEID=\OOOIRYHY|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XIUYBPVE|JUMPERSVISIBLE=TRUE +#$pads{68} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 88.7222 -45.487399) + (path /539EEC0F) + (attr smd) + (fp_text reference "C67" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1614 pos:333878(0x51836) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4400FFFFFFFF30DBC5067CD697020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1615 pos:334082(0x51902) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF4400FFFFFFFF30DBC50697D491020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#69: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10738mil|Y=4731mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=C68|SOURCEUNIQUEID=\VGKQQVHD|SOURCEHIERARCHICALPATH=rev02_6|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=NMVLCNLC|JUMPERSVISIBLE=TRUE +#$pads{69} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 72.8472 -55.6514) + (path /539EEC0F) + (attr smd) + (fp_text reference "C68" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1612 pos:333470(0x5169E) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF4500FFFFFFFF207D6606A2E5D4020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1613 pos:333674(0x5176A) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4500FFFFFFFF207D6606BDE3CE020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#70: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9409.3701mil|Y=4574.4487mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C69|SOURCEUNIQUEID=\FGGYWCQD|SOURCEHIERARCHICALPATH=rev02_7|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MWRQJJWN|JUMPERSVISIBLE=TRUE +#$pads{70} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 39.100001 -51.674997) + (path /539EEC0F) + (attr smd) + (fp_text reference "C69" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:339 pos:71139(0x115E3) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF4600FFFFFFFF78C29E056701BA020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:340 pos:71343(0x116AF) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF4600FFFFFFFF93C098056701BA020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#71: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8740.0787mil|Y=4424.8425mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C70|SOURCEUNIQUEID=\HUOKSUVW|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=BAMYLPWM|JUMPERSVISIBLE=TRUE +#$pads{71} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 22.099999 -47.874999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C70" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:337 pos:70731(0x1144B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF4700FFFFFFFF53A135055B2EA6020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:338 pos:70935(0x11517) type:2 net:227 +#010000000005000000047C267C300100000000AA000000010C00E300FFFF4700FFFFFFFF53A13505762CA0020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 229 "NetC70_2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#72: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8629.8425mil|Y=4150.2362mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C71|SOURCEUNIQUEID=\DTYANNNP|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MDBDTBKL|JUMPERSVISIBLE=TRUE +#$pads{72} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 19.299999 -40.899999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C71" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:335 pos:70323(0x112B3) type:2 net:228 +#010000000005000000047C267C300100000000AA000000010C00E400FFFF4800FFFFFFFF39CF24058D477C020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 230 "NetC71_2") + ) +#1309 counter:336 pos:70527(0x1137F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF4800FFFFFFFF39CF2405A84576020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#73: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8648.5773mil|Y=2774.7019mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 0.00000000000000E+0000|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C72|SOURCEUNIQUEID=\NHENNVFG|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XBVLVYJW|JUMPERSVISIBLE=TRUE +#$pads{73} + (module "C_0805" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 19.775863 -5.961428) + (path /539EEC0F) + (attr smd) + (fp_text reference "C72" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1696 pos:350606(0x5598E) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4900FFFFFFFFF2AC2D05CB62A701E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 1.00000 -0.00000) (size 1.0000005 1.2000001) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1697 pos:350810(0x55A5A) type:2 net:204 +#010000000005000000047C267C300100000000AA000000200C00CC00FFFF4900FFFFFFFF28A92105CB62A701E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -1.00000 -0.00000) (size 1.0000005 1.2000001) + (layers B.Cu B.Mask B.Paste) (net 206 "FT_VREGIN") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#74: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8357.0874mil|Y=2818.1899mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C73|SOURCEUNIQUEID=\YGXCSMKI|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XOQPDKVT|JUMPERSVISIBLE=TRUE +#$pads{74} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 12.37202 -7.066023) + (path /539EEC0F) + (attr smd) + (fp_text reference "C73" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1610 pos:333062(0x51506) type:2 net:204 +#010000000005000000047C267C300100000000AA000000200C00CC00FFFF4A00FFFFFFFFAC31FE048B05AE010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 206 "FT_VREGIN") + ) +#1309 counter:1611 pos:333266(0x515D2) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4A00FFFFFFFFC72FF8048B05AE010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#75: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8292.0394mil|Y=2665.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C74|SOURCEUNIQUEID=\GAAGDDWD|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=LSTWLFWW|JUMPERSVISIBLE=TRUE +#$pads{75} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 10.719801 -3.184398) + (path /539EEC0F) + (attr smd) + (fp_text reference "C74" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:333 pos:69915(0x1111B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF4B00FFFFFFFFCA43F10411B393010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:334 pos:70119(0x111E7) type:2 net:201 +#010000000005000000047C267C300100000000AA000000010C00C900FFFF4B00FFFFFFFFCA43F104F6B499010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 203 "FT_VCCORE") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#76: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8653.0394mil|Y=2731.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C75|SOURCEUNIQUEID=\HLLLMFEP|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=LWNLVPOY|JUMPERSVISIBLE=TRUE +#$pads{76} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 19.889201 -4.86079799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C75" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:331 pos:69507(0x10F83) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF4C00FFFFFFFF5A59280532C59D010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:332 pos:69711(0x1104F) type:2 net:229 +#010000000005000000047C267C300100000000AA000000010C00E500FFFF4C00FFFFFFFF5A59280517C7A3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 231 "NetC75_2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#77: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8236.0394mil|Y=2665.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C76|SOURCEUNIQUEID=\NPMMWQOC|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=GRXBGGGN|JUMPERSVISIBLE=TRUE +#$pads{77} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 9.29740100000001 -3.184398) + (path /539EEC0F) + (attr smd) + (fp_text reference "C76" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:329 pos:69099(0x10DEB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF4D00FFFFFFFF4AB8E80411B393010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:330 pos:69303(0x10EB7) type:2 net:199 +#010000000005000000047C267C300100000000AA000000010C00C700FFFF4D00FFFFFFFF4AB8E804F6B499010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 201 "FT_VCCA") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#78: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8886.0394mil|Y=2929.37mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C77|SOURCEUNIQUEID=\JFIHUCGU|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=BTEANFTU|JUMPERSVISIBLE=TRUE +#$pads{78} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 25.807401 -9.88999799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C77" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:441 pos:91947(0x1672B) type:2 net:202 +#010000000005000000047C267C300100000000AA000000010C00CA00FFFF4E00FFFFFFFFEAE64B0569FEC401E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 204 "FT_VPHY") + ) +#1309 counter:442 pos:92151(0x167F7) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF4E00FFFFFFFFEAE64B059FFAB801E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#79: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8653.0394mil|Y=2823.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C78|SOURCEUNIQUEID=\IAPESTKM|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=KGIQAMPA|JUMPERSVISIBLE=TRUE +#$pads{79} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 19.889201 -7.197598) + (path /539EEC0F) + (attr smd) + (fp_text reference "C78" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:327 pos:68691(0x10C53) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF4F00FFFFFFFF5A592805D6D0B1010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:328 pos:68895(0x10D1F) type:2 net:230 +#010000000005000000047C267C300100000000AA000000010C00E600FFFF4F00FFFFFFFF5A592805F1CEAB010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 232 "NetC78_2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#80: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8748.937mil|Y=2934.685mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C79|SOURCEUNIQUEID=\MUDTVRHY|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=AEBWXDGX|JUMPERSVISIBLE=TRUE +#$pads{80} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 22.325 -10.024999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C79" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:325 pos:68283(0x10ABB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5000FFFFFFFF5AFB360515CDC2010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:326 pos:68487(0x10B87) type:2 net:202 +#010000000005000000047C267C300100000000AA000000010C00CA00FFFF5000FFFFFFFF5AFB360530CBBC010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 204 "FT_VPHY") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#81: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8823.0394mil|Y=3165.37mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C80|SOURCEUNIQUEID=\CFNNLKLJ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=DMLEXVNA|JUMPERSVISIBLE=TRUE +#$pads{81} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 24.207201 -15.884398) + (path /539EEC0F) + (attr smd) + (fp_text reference "C80" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:439 pos:91539(0x16593) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5100FFFFFFFFFA4942052901E901E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 -1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:440 pos:91743(0x1665F) type:2 net:203 +#010000000005000000047C267C300100000000AA000000010C00CB00FFFF5100FFFFFFFFFA4942055FFDDC01E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 205 "FT_VPLL") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#82: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8653.0394mil|Y=2962.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C81|SOURCEUNIQUEID=\GBWNHRIH|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=QFVUQYHK|JUMPERSVISIBLE=TRUE +#$pads{82} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 19.889201 -10.728198) + (path /539EEC0F) + (attr smd) + (fp_text reference "C81" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:323 pos:67875(0x10923) type:2 net:203 +#010000000005000000047C267C300100000000AA000000010C00CB00FFFF5200FFFFFFFF5A592805A204C1010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 205 "FT_VPLL") + ) +#1309 counter:324 pos:68079(0x109EF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5200FFFFFFFF5A5928058706C7010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#83: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8176.0394mil|Y=3133.37mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C82|SOURCEUNIQUEID=\EENGKJOX|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=OCRKMTNO|JUMPERSVISIBLE=TRUE +#$pads{83} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 7.77340100000001 -15.071598) + (path /539EEC0F) + (attr smd) + (fp_text reference "C82" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:437 pos:91131(0x163FB) type:2 net:197 +#010000000005000000047C267C300100000000AA000000010C00C500FFFF5300FFFFFFFF8A90DF045F1BD801E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3") + ) +#1309 counter:438 pos:91335(0x164C7) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5300FFFFFFFF8A90DF04291FE401E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 -1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#84: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8364.0394mil|Y=2680.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C83|SOURCEUNIQUEID=\HHAKVJBB|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=DIQYDWHF|JUMPERSVISIBLE=TRUE +#$pads{84} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 12.548601 -3.56539799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C83" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:321 pos:67467(0x1078B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5400FFFFFFFF3D41FF04F4FD98010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:322 pos:67671(0x10857) type:2 net:197 +#010000000005000000047C267C300100000000AA000000010C00C500FFFF5400FFFFFFFF583FF904F4FD98010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#85: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8503.0394mil|Y=2681.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C84|SOURCEUNIQUEID=\LWGXDYUC|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=OTOXKJDI|JUMPERSVISIBLE=TRUE +#$pads{85} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 16.079201 -3.59079799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C84" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:319 pos:67059(0x105F3) type:2 net:197 +#010000000005000000047C267C300100000000AA000000010C00C500FFFF5500FFFFFFFF08750E05042599010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3") + ) +#1309 counter:320 pos:67263(0x106BF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5500FFFFFFFFED761405042599010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#86: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8653.0394mil|Y=3045.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C85|SOURCEUNIQUEID=\AELWEGKJ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=IJMSEQWV|JUMPERSVISIBLE=TRUE +#$pads{86} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 19.889201 -12.836398) + (path /539EEC0F) + (attr smd) + (fp_text reference "C85" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:317 pos:66651(0x1045B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5600FFFFFFFF5A592805D1AECD010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:318 pos:66855(0x10527) type:2 net:197 +#010000000005000000047C267C300100000000AA000000010C00C500FFFF5600FFFFFFFF5A592805B6B0D3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#87: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8324.0394mil|Y=3161.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C86|SOURCEUNIQUEID=\BVMIBMKV|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=RABQGJLH|JUMPERSVISIBLE=TRUE +#$pads{87} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 11.532601 -15.782798) + (path /539EEC0F) + (attr smd) + (fp_text reference "C86" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:315 pos:66243(0x102C3) type:2 net:197 +#010000000005000000047C267C300100000000AA000000010C00C500FFFF5700FFFFFFFFD824F3040463E2010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3") + ) +#1309 counter:316 pos:66447(0x1038F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5700FFFFFFFFBD26F9040463E2010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#88: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10956.7641mil|Y=3212.0848mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C87|SOURCEUNIQUEID=\AMRWSIKI|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=NOLBCUKY|JUMPERSVISIBLE=TRUE +#$pads{88} + (module "C_0805" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 78.403808 -17.070954) + (path /539EEC0F) + (attr smd) + (fp_text reference "C87" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1694 pos:350198(0x557F6) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF5800FFFFFFFF99DE8706F521F001E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1695 pos:350402(0x558C2) type:2 net:187 +#010000000005000000047C267C300100000000AA000000200C00BB00FFFF5800FFFFFFFF99DE87062B1EE401E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001) + (layers B.Cu B.Mask B.Paste) (net 189 "FT_MGMT_VREGIN") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#89: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11118.3614mil|Y=3261.8449mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C88|SOURCEUNIQUEID=\MOXIRHEO|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UIYOIJGI|JUMPERSVISIBLE=TRUE +#$pads{89} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 82.50838 -18.33486) + (path /539EEC0F) + (attr smd) + (fp_text reference "C88" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1608 pos:332654(0x5136E) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF5900FFFFFFFFFE86A006DEB6EE010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1609 pos:332858(0x5143A) type:2 net:187 +#010000000005000000047C267C300100000000AA000000200C00BB00FFFF5900FFFFFFFFFE86A006C3B8F4010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 189 "FT_MGMT_VREGIN") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#90: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11018mil|Y=3362.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C89|SOURCEUNIQUEID=\IDSVWPUG|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=JQDEGRBU|JUMPERSVISIBLE=TRUE +#$pads{90} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 79.9592 -20.897599) + (path /539EEC0F) + (attr smd) + (fp_text reference "C89" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:313 pos:65835(0x1012B) type:2 net:200 +#010000000005000000047C267C300100000000AA000000010C00C800FFFF5A00FFFFFFFF92379406091D01020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 202 "FT_VCCORE1") + ) +#1309 counter:314 pos:66039(0x101F7) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5A00FFFFFFFFAD358E06091D01020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#91: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11090.4724mil|Y=3005.5512mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C90|SOURCEUNIQUEID=\EHQFITJP|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=XEFBORNT|JUMPERSVISIBLE=TRUE +#$pads{91} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 81.799999 -11.825) + (path /539EEC0F) + (attr smd) + (fp_text reference "C90" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:311 pos:65427(0xFF93) type:2 net:231 +#010000000005000000047C267C300100000000AA000000010C00E700FFFF5B00FFFFFFFF87469F06589CCA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 233 "NetC90_2") + ) +#1309 counter:312 pos:65631(0x1005F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5B00FFFFFFFFA2449906589CCA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#92: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11016.6535mil|Y=3412.0472mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C91|SOURCEUNIQUEID=\INHRRVJA|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=QWTDBKGW|JUMPERSVISIBLE=TRUE +#$pads{92} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 79.924999 -22.149999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C91" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:309 pos:65019(0xFDFB) type:2 net:198 +#010000000005000000047C267C300100000000AA000000010C00C600FFFF5C00FFFFFFFFF902940618A308020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 200 "FT_VCCA1") + ) +#1309 counter:310 pos:65223(0xFEC7) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5C00FFFFFFFF14018E0618A308020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#93: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11272.3228mil|Y=2818.2205mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C92|SOURCEUNIQUEID=\HGTMHPIV|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=GEBQGPOW|JUMPERSVISIBLE=TRUE +#$pads{93} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 86.418999 -7.066801) + (path /539EEC0F) + (attr smd) + (fp_text reference "C92" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:435 pos:90723(0x16263) type:2 net:185 +#010000000005000000047C267C300100000000AA000000010C00B900FFFF5D00FFFFFFFF1C05B806A208B401E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 187 "FT_MGMT_VPHY") + ) +#1309 counter:436 pos:90927(0x1632F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5D00FFFFFFFF1C05B806D804A801E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#94: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11181mil|Y=3005.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C93|SOURCEUNIQUEID=\QMYJNCMB|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=YGTGOCAM|JUMPERSVISIBLE=TRUE +#$pads{94} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 84.0994 -11.829799) + (path /539EEC0F) + (attr smd) + (fp_text reference "C93" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:307 pos:64611(0xFC63) type:2 net:232 +#010000000005000000047C267C300100000000AA000000010C00E800FFFF5E00FFFFFFFFDD14A706B9A3CA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 234 "NetC93_2") + ) +#1309 counter:308 pos:64815(0xFD2F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5E00FFFFFFFFC216AD06B9A3CA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#95: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11261mil|Y=2989.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C94|SOURCEUNIQUEID=\KGBIXBWO|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=QAOLVGKP|JUMPERSVISIBLE=TRUE +#$pads{95} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 86.1314 -11.423399) + (path /539EEC0F) + (attr smd) + (fp_text reference "C94" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:305 pos:64203(0xFACB) type:2 net:185 +#010000000005000000047C267C300100000000AA000000010C00B900FFFF5F00FFFFFFFFD04AB606AB33CB010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 187 "FT_MGMT_VPHY") + ) +#1309 counter:306 pos:64407(0xFB97) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF5F00FFFFFFFFD04AB606C631C5010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#96: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11460mil|Y=2823.7401mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C95|SOURCEUNIQUEID=\WFOTXRRX|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=TFXWQTGD|JUMPERSVISIBLE=TRUE +#$pads{96} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 91.186 -7.206999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C95" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:433 pos:90315(0x160CB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6000FFFFFFFF40A8D40674DCA801E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:434 pos:90519(0x16197) type:2 net:186 +#010000000005000000047C267C300100000000AA000000010C00BA00FFFF6000FFFFFFFF40A8D4063EE0B401E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 188 "FT_MGMT_VPLL") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#97: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11326mil|Y=2989.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C96|SOURCEUNIQUEID=\PUARNBRY|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=SQVUVUDV|JUMPERSVISIBLE=TRUE +#$pads{97} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 87.7824 -11.423399) + (path /539EEC0F) + (attr smd) + (fp_text reference "C96" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:303 pos:63795(0xF933) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6100FFFFFFFFE035C006C631C5010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:304 pos:63999(0xF9FF) type:2 net:186 +#010000000005000000047C267C300100000000AA000000010C00BA00FFFF6100FFFFFFFFE035C006AB33CB010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 188 "FT_MGMT_VPLL") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#98: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11413.3071mil|Y=3524.252mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C97|SOURCEUNIQUEID=\EOFTDDJU|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=YESUINAL|JUMPERSVISIBLE=TRUE +#$pads{98} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 90 -25.000001) + (path /539EEC0F) + (attr smd) + (fp_text reference "C97" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:431 pos:89907(0x15F33) type:2 net:184 +#010000000005000000047C267C300100000000AA000000010C00B800FFFF6200FFFFFFFF348AD30618C21902E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3") + ) +#1309 counter:432 pos:90111(0x15FFF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6200FFFFFFFF6A86C70618C21902E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#99: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11035mil|Y=3173.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C98|SOURCEUNIQUEID=\YJXSPIJI|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MIHVNOBH|JUMPERSVISIBLE=TRUE +#$pads{99} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 80.391 -16.096999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C98" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:301 pos:63387(0xF79B) type:2 net:184 +#010000000005000000047C267C300100000000AA000000010C00B800FFFF6300FFFFFFFFB0CE93062B47E7010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3") + ) +#1309 counter:302 pos:63591(0xF867) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6300FFFFFFFFB0CE93064645E1010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#100: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11383mil|Y=2989.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C99|SOURCEUNIQUEID=\UOMCBXOT|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=WFOUCNWH|JUMPERSVISIBLE=TRUE +#$pads{100} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 89.2302 -11.423399) + (path /539EEC0F) + (attr smd) + (fp_text reference "C99" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:299 pos:62979(0xF603) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6400FFFFFFFF70E8C806C631C5010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:300 pos:63183(0xF6CF) type:2 net:184 +#010000000005000000047C267C300100000000AA000000010C00B800FFFF6400FFFFFFFF70E8C806AB33CB010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#101: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11500mil|Y=3339.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C100|SOURCEUNIQUEID=\XDQMGALF|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=FOAYUWIW|JUMPERSVISIBLE=TRUE +#$pads{101} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 92.202 -20.313399) + (path /539EEC0F) + (attr smd) + (fp_text reference "C100" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:297 pos:62571(0xF46B) type:2 net:184 +#010000000005000000047C267C300100000000AA000000010C00B800FFFF6500FFFFFFFFC0C2DA068B9B00020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3") + ) +#1309 counter:298 pos:62775(0xF537) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6500FFFFFFFFC0C2DA06A699FA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#102: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11035mil|Y=3292.7401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C101|SOURCEUNIQUEID=\CMSOCTWW|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=AHIIGDES|JUMPERSVISIBLE=TRUE +#$pads{102} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 80.391 -19.119599) + (path /539EEC0F) + (attr smd) + (fp_text reference "C101" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:295 pos:62163(0xF2D3) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6600FFFFFFFFB0CE9306B66DF3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:296 pos:62367(0xF39F) type:2 net:184 +#010000000005000000047C267C300100000000AA000000010C00B800FFFF6600FFFFFFFFB0CE93069B6FF9010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#103: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9962.622mil|Y=3726.9212mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C102|SOURCEUNIQUEID=\WYOSFXRW|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0805|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=HHBNYIVJ|JUMPERSVISIBLE=TRUE +#$pads{103} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 53.152599 -30.147798) + (path /539EEC0F) + (attr smd) + (fp_text reference "C102" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:429 pos:89499(0x15D9B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6700FFFFFFFFD12EF605DCAE3802E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 1.00000 -0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:430 pos:89703(0x15E67) type:2 net:2 +#010000000005000000047C267C300100000000AA000000010C000200FFFF6700FFFFFFFF072BEA05DCAE3802E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -1.00000 -0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#104: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10011.8897mil|Y=4309.7165mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C103|SOURCEUNIQUEID=\QFKVCEMG|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=UIJYCWJJ|JUMPERSVISIBLE=TRUE +#$pads{104} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 54.403998 -44.950799) + (path /539EEC0F) + (attr smd) + (fp_text reference "C103" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:293 pos:61755(0xF13B) type:2 net:2 +#010000000005000000047C267C300100000000AA000000010C000200FFFF6800FFFFFFFF63B2FA054D9C91020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT") + ) +#1309 counter:294 pos:61959(0xF207) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6800FFFFFFFF7EB0F4054D9C91020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#105: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9959.8897mil|Y=3816.7165mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C104|SOURCEUNIQUEID=\UBSPTQSV|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=YWTHRTYU|JUMPERSVISIBLE=TRUE +#$pads{105} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 53.083198 -32.428599) + (path /539EEC0F) + (attr smd) + (fp_text reference "C104" (at 0 0) (layer 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0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#106: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9110.1575mil|Y=2205.3543mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C105|SOURCEUNIQUEID=\QWPWWFBJ|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MGDBNRJX|JUMPERSVISIBLE=TRUE +#$pads{106} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 31.5 8.500001) + (path /539EEC0F) + (attr smd) + (fp_text reference "C105" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:873 pos:180295(0x2C047) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF6A00FFFFFFFF87196E05998353010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:874 pos:180499(0x2C113) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF6A00FFFFFFFF87196E05B4814D010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#107: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10441.8504mil|Y=3903.189mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C106|SOURCEUNIQUEID=\MEYYVMVX|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=GGFYPHNG|JUMPERSVISIBLE=TRUE +#$pads{107} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 65.325 -34.625001) + (path /539EEC0F) + (attr smd) + (fp_text reference "C106" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:289 pos:60939(0xEE0B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF6B00FFFFFFFFC84C3906459556020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:290 pos:61143(0xEED7) type:2 net:2 +#010000000005000000047C267C300100000000AA000000010C000200FFFF6B00FFFFFFFFC84C3906609350020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#108: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10889mil|Y=3641.37mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C107|SOURCEUNIQUEID=\PAWKAJCY|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=AAEFXSWW|JUMPERSVISIBLE=TRUE +#$pads{108} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 76.6826 -27.974798) + (path /539EEC0F) + (attr smd) + (fp_text reference "C107" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1606 pos:332246(0x511D6) type:2 net:2 +#010000000005000000047C267C300100000000AA000000200C000200FFFF6C00FFFFFFFF90877D0612A028020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT") + ) +#1309 counter:1607 pos:332450(0x512A2) type:2 net:5 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2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C108|SOURCEUNIQUEID=\VHOQJSCE|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PYEAGLIG|JUMPERSVISIBLE=TRUE +#$pads{109} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 31.484199 1.000001) + (path /539EEC0F) + (attr smd) + (fp_text reference "C108" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1604 pos:331838(0x5103E) type:2 net:5 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(xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#110: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10073mil|Y=5213mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C109|SOURCEUNIQUEID=\NLDTESMB|SOURCEHIERARCHICALPATH=rev02_14|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=QPTWYOOY|JUMPERSVISIBLE=TRUE +#$pads{110} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 55.9562 -67.8942) + (path /539EEC0F) + (attr smd) + (fp_text reference "C109" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:287 pos:60531(0xEC73) type:2 net:173 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0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#111: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9222.4487mil|Y=3726.937mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C110|SOURCEUNIQUEID=\UPMERWCR|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VCTVWFHJ|JUMPERSVISIBLE=TRUE +#$pads{111} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 34.352197 -30.1482) + (path /539EEC0F) + (attr smd) + (fp_text reference "C110" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:285 pos:60123(0xEADB) type:2 net:5 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(xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#112: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10476.315mil|Y=6022mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C111|SOURCEUNIQUEID=\DUNKGNEL|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=WJXAJJNT|JUMPERSVISIBLE=TRUE +#$pads{112} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 66.200401 -88.4428) + (path /539EEC0F) + (attr smd) + (fp_text reference "C111" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1602 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#113: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9781.4173mil|Y=3700.4331mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 0.00000000000000E+0000|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C112|SOURCEUNIQUEID=\HLIPXGCY|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=WNRREBYU|JUMPERSVISIBLE=TRUE +#$pads{113} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 48.549999 -29.475001) + (path /539EEC0F) + (attr smd) + (fp_text reference "C112" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:283 pos:59715(0xE943) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF7100FFFFFFFF9087D7052BA434020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:284 pos:59919(0xEA0F) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF7100FFFFFFFFAB85D1052BA434020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#114: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9447mil|Y=5399mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C113|SOURCEUNIQUEID=\QTTUGYEO|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JRBMTRMH|JUMPERSVISIBLE=TRUE +#$pads{114} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 40.0558 -72.6186) + (path /539EEC0F) + (attr smd) + (fp_text reference "C113" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1722 pos:355910(0x56E46) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF7200FFFFFFFF707FA10547D54003A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000008056400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1723 pos:356114(0x56F12) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFF7200FFFFFFFF707FA10599CF2E03A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000008056400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 1.50000 90) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#115: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8122mil|Y=4309mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C114|SOURCEUNIQUEID=\PWEUUEUQ|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RVKYFYQA|JUMPERSVISIBLE=TRUE +#$pads{115} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 6.4008 -44.9326) + (path /539EEC0F) + (attr smd) + (fp_text reference "C114" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1720 pos:355502(0x56CAE) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFF7300FFFFFFFFA051D70427839A02A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1309 counter:1721 pos:355706(0x56D7A) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF7300FFFFFFFFA051D704797D8802A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#116: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9137mil|Y=5526mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C115|SOURCEUNIQUEID=\OLWAEWGX|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MKUQPUFL|JUMPERSVISIBLE=TRUE +#$pads{116} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 32.1818 -75.8444) + (path /539EEC0F) + (attr smd) + (fp_text reference "C115" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1600 pos:331022(0x50D0E) type:2 net:233 +#010000000005000000047C267C300100000000AA000000200C00E900FFFF7400FFFFFFFF103272056E3248030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 235 "NetC115_1") + ) +#1309 counter:1601 pos:331226(0x50DDA) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF7400FFFFFFFF1032720553344E030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#117: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8419.2126mil|Y=4178.7795mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C116|SOURCEUNIQUEID=\FYUTDSDO|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=XOPAERVC|JUMPERSVISIBLE=TRUE +#$pads{117} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 13.95 -41.624999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C116" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1598 pos:330614(0x50B76) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF7500FFFFFFFF7EAB0405A0A07A020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1599 pos:330818(0x50C42) type:2 net:234 +#010000000005000000047C267C300100000000AA000000200C00EA00FFFF7500FFFFFFFF7EAB040585A280020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 236 "NetC116_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#118: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9137mil|Y=5705mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C117|SOURCEUNIQUEID=\YFILBMRJ|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JPWDSOTS|JUMPERSVISIBLE=TRUE +#$pads{118} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 32.1818 -80.391) + (path /539EEC0F) + (attr smd) + (fp_text reference "C117" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1596 pos:330206(0x509DE) type:2 net:235 +#010000000005000000047C267C300100000000AA000000200C00EB00FFFF7600FFFFFFFF10327205828469030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1") + ) +#1309 counter:1597 pos:330410(0x50AAA) type:2 net:236 +#010000000005000000047C267C300100000000AA000000200C00EC00FFFF7600FFFFFFFF103272059D8263030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 238 "NetC117_2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#119: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8420.1969mil|Y=4010.4724mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C118|SOURCEUNIQUEID=\CPFDPYEB|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UYKLCONM|JUMPERSVISIBLE=TRUE +#$pads{119} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 13.975001 -37.349999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C118" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1594 pos:329798(0x50846) type:2 net:238 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+ (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#120: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9447mil|Y=5666mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C119|SOURCEUNIQUEID=\APYGNXOL|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PXBBLPVS|JUMPERSVISIBLE=TRUE +#$pads{120} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 40.0558 -79.4004) + (path /539EEC0F) + (attr smd) + (fp_text reference "C119" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1718 pos:355094(0x56B16) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF7800FFFFFFFF707FA105498D5703A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1719 pos:355298(0x56BE2) type:2 net:235 +#010000000005000000047C267C300100000000AA000000200C00EB00FFFF7800FFFFFFFF707FA105F7926903A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 237 "NetC117_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#121: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8122mil|Y=4059mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C120|SOURCEUNIQUEID=\RVLXWYJA|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BKTXXRKO|JUMPERSVISIBLE=TRUE +#$pads{121} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 6.4008 -38.5826) + (path /539EEC0F) + (attr smd) + (fp_text reference "C120" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1716 pos:354686(0x5697E) type:2 net:237 +#010000000005000000047C267C300100000000AA000000200C00ED00FFFF7900FFFFFFFFA051D704D9576202A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000008056400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 1.50000 90) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1") + ) +#1309 counter:1717 pos:354890(0x56A4A) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF7900FFFFFFFFA051D704875D7402A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000008056400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#122: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10668.2283mil|Y=6386.4567mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C121|SOURCEUNIQUEID=\ICNOAPWR|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CKKWEHYQ|JUMPERSVISIBLE=TRUE +#$pads{122} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 71.074999 -97.7) + (path /539EEC0F) + (attr smd) + (fp_text reference "C121" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1592 pos:329390(0x506AE) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF7A00FFFFFFFFABD75B06057ECB030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1593 pos:329594(0x5077A) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF7A00FFFFFFFFABD75B06EA7FD1030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#123: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9523.5433mil|Y=6221.1024mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C122|SOURCEUNIQUEID=\FFYTTMBO|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=KGSOAAHC|JUMPERSVISIBLE=TRUE +#$pads{123} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 42 -93.500001) + (path /539EEC0F) + (attr smd) + (fp_text reference "C122" (at 0 0) (layer F.SilkS) hide + (effects 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(layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#124: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11008mil|Y=5355mil|PATTERN=C_D|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C123|SOURCEUNIQUEID=\JXXIWEOF|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CP_E-035X080|SOURCEDESCRIPTION=Kemet Tantalum Capacitor|UNIQUEID=WQAVGVCY|JUMPERSVISIBLE=TRUE +#$pads{124} + (module "C_D" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 79.7052 -71.501) + (path /539EEC0F) + (attr smd) + (fp_text reference "C123" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:467 pos:97251(0x17BE3) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF7C00FFFFFFFF00B08F0689951D03F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008056400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 3.25000 90) (size 2.4000003 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:468 pos:97455(0x17CAF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF7C00FFFFFFFF00B08F06D8A14403F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008056400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -3.25000 90) (size 2.4000003 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#125: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5291mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C124|SOURCEUNIQUEID=\CADCJONU|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VUROFJJU|JUMPERSVISIBLE=TRUE +#$pads{125} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.9346 -69.8754) + (path /539EEC0F) + (attr smd) + (fp_text reference "C124" (at 0 0) (layer F.SilkS) hide + (effects (font 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0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#126: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10151mil|Y=5410mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C125|SOURCEUNIQUEID=\JEGDCVHC|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VWVMVLNV|JUMPERSVISIBLE=TRUE +#$pads{126} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 57.9374 -72.898) + (path /539EEC0F) + (attr smd) + (fp_text reference "C125" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:277 pos:58491(0xE47B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF7E00FFFFFFFF7DEA0906208039030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:278 pos:58695(0xE547) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF7E00FFFFFFFF62EC0F06208039030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#127: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9757mil|Y=5869mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C126|SOURCEUNIQUEID=\SSOLGDTG|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=ARVTLLPA|JUMPERSVISIBLE=TRUE +#$pads{127} + (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 47.9298 -84.5566) + (path /539EEC0F) + (attr smd) + (fp_text reference "C126" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:463 pos:96435(0x178B3) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF7F00FFFFFFFFD0CCD005A78C8803A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000008056400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -1.50000 90) (size 1.5999993 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:464 pos:96639(0x1797F) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFF7F00FFFFFFFFD0CCD005F9867603A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000008056400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 1.50000 90) (size 1.5999993 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#128: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10030.4489mil|Y=6122.5591mil|PATTERN=C_D|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C127|SOURCEUNIQUEID=\RMLSTVRA|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=rev02_1.SCHLIB|SOURCELIBREFERENCE=CP_E-035X080|SOURCEDESCRIPTION=Kemet Tantalum Capacitor|UNIQUEID=RAHJTGPV|JUMPERSVISIBLE=TRUE +#$pads{128} + (module "C_D" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 54.875402 -90.997001) + (path /539EEC0F) + (attr smd) + (fp_text reference "C127" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:465 pos:96843(0x17A4B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8000FFFFFFFF4100E705773AA603F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "2" smd rect (at -3.25000 -0.00000 180) (size 2.4000003 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:466 pos:97047(0x17B17) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8000FFFFFFFF900C0E06773AA603F26A0E00869E0F00F26A0E00869E0F00F26A0E00869E0F000000000002020200000000008066400100000000000000F200030004007980010079800100798001007447FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "1" smd rect (at 3.25000 -0.00000 180) (size 2.4000003 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#129: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5332mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C128|SOURCEUNIQUEID=\KTAOJGJL|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=FRMFTCXF|JUMPERSVISIBLE=TRUE +#$pads{129} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.9346 -70.9168) + (path /539EEC0F) + (attr smd) + (fp_text reference "C128" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:275 pos:58083(0xE2E3) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8100FFFFFFFFDEEB1B0640992D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:276 pos:58287(0xE3AF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8100FFFFFFFFC3ED210640992D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#130: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10270mil|Y=5054mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=C129|SOURCEUNIQUEID=\BTQWICWO|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=PRMKDJTM|JUMPERSVISIBLE=TRUE +#$pads{130} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.96 -63.8556) + (path /539EEC0F) + (attr smd) + (fp_text reference "C129" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:273 pos:57675(0xE14B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8200FFFFFFFFD3142206E02D03030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:274 pos:57879(0xE217) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8200FFFFFFFFEE121C06E02D03030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#131: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10151mil|Y=5371mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=C130|SOURCEUNIQUEID=\JVNTRNEV|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=HUCSXCPK|JUMPERSVISIBLE=TRUE +#$pads{131} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 57.9374 -71.9074) + (path /539EEC0F) + (attr smd) + (fp_text reference "C130" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:271 pos:57267(0xDFB3) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8300FFFFFFFF7EEA0906B08C33030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:272 pos:57471(0xE07F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8300FFFFFFFF63EC0F06B08C33030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#132: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10152mil|Y=5174mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C131|SOURCEUNIQUEID=\WBWUMPIJ|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=EJOQICXQ|JUMPERSVISIBLE=TRUE +#$pads{132} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 57.9628 -66.9036) + (path /539EEC0F) + (attr smd) + (fp_text reference "C131" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:269 pos:56859(0xDE1B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8400FFFFFFFF73131006607D15030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:270 pos:57063(0xDEE7) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8400FFFFFFFF8E110A06607D15030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#133: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9920mil|Y=5808mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C132|SOURCEUNIQUEID=\VYKBGTVA|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=HLXKKJPC|JUMPERSVISIBLE=TRUE +#$pads{133} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 52.07 -83.0072) + (path /539EEC0F) + (attr smd) + (fp_text reference "C132" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:427 pos:89091(0x15C03) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFF8500FFFFFFFF1BAAE305003B7603E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1309 counter:428 pos:89295(0x15CCF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8500FFFFFFFFE5ADEF05003B7603E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#134: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9557mil|Y=4748.3209mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C133|SOURCEUNIQUEID=\REPDVHOU|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=DHXSUUVI|JUMPERSVISIBLE=TRUE +#$pads{134} + (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 42.8498 -56.091351) + (path /539EEC0F) + (attr smd) + (fp_text reference "C133" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:461 pos:96027(0x1771B) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8600FFFFFFFF5048B205208CDD02A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:462 pos:96231(0x177E7) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8600FFFFFFFF5048B2057286CB02A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#135: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10132mil|Y=5312mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C134|SOURCEUNIQUEID=\KAWSLHEU|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=JIFIADUK|JUMPERSVISIBLE=TRUE +#$pads{135} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 57.4548 -70.4088) + (path /539EEC0F) + (attr smd) + (fp_text reference "C134" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:267 pos:56451(0xDC83) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8700FFFFFFFF40050A060E8B27030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:268 pos:56655(0xDD4F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8700FFFFFFFF40050A06F38C2D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#136: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10270mil|Y=5213mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C135|SOURCEUNIQUEID=\KKOUMAMA|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=GTQLUGLB|JUMPERSVISIBLE=TRUE +#$pads{136} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.96 -67.8942) + (path /539EEC0F) + (attr smd) + (fp_text reference "C135" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:265 pos:56043(0xDAEB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8800FFFFFFFFD3142206D0701B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:266 pos:56247(0xDBB7) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8800FFFFFFFFEE121C06D0701B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#137: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9602mil|Y=5362mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C136|SOURCEUNIQUEID=\GJCWIVDT|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=MRLXWTKW|JUMPERSVISIBLE=TRUE +#$pads{137} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 43.9928 -71.6788) + (path /539EEC0F) + (attr smd) + (fp_text reference "C136" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:425 pos:88683(0x15A6B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8900FFFFFFFF2026B9053B2B2C03E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:426 pos:88887(0x15B37) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFF8900FFFFFFFF2026B905052F3803E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#138: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10804mil|Y=5131mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C137|SOURCEUNIQUEID=\VFFGYKSA|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|UNIQUEID=YASIHFYM|JUMPERSVISIBLE=TRUE +#$pads{138} + (module "C_1210" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 74.5236 -65.8114) + (path /539EEC0F) + (attr smd) + (fp_text reference "C137" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:459 pos:95619(0x17583) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8A00FFFFFFFF408F7006D9EA0503A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:460 pos:95823(0x1764F) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8A00FFFFFFFF408F700687F01703A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#139: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10309mil|Y=5173mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C138|SOURCEUNIQUEID=\YWNAQUNK|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MGSREACB|JUMPERSVISIBLE=TRUE +#$pads{139} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 61.9506 -66.8782) + (path /539EEC0F) + (attr smd) + (fp_text reference "C138" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:263 pos:55635(0xD953) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8B00FFFFFFFF5E062206505615030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:264 pos:55839(0xDA1F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8B00FFFFFFFF43082806505615030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#140: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9920mil|Y=5915mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=C139|SOURCEUNIQUEID=\JLPOIAJS|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=NHMEPCLC|JUMPERSVISIBLE=TRUE +#$pads{140} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 52.07 -85.725) + (path /539EEC0F) + (attr smd) + (fp_text reference "C139" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:423 pos:88275(0x158D3) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFF8C00FFFFFFFF1BAAE305B08E8603E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1309 counter:424 pos:88479(0x1599F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8C00FFFFFFFFE5ADEF05B08E8603E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model 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(effects (font (thickness 0.05))) + ) + + #1309 counter:421 pos:87867(0x1573B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8D00FFFFFFFFF56C2A0670886D03E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:422 pos:88071(0x15807) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8D00FFFFFFFF2B691E0670886D03E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#142: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10237mil|Y=4710mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=C141|SOURCEUNIQUEID=\DKSBIRNJ|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=KYSSKNAN|JUMPERSVISIBLE=TRUE +#$pads{142} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.1218 -55.118) + (path /539EEC0F) + (attr smd) + (fp_text reference "C141" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:419 pos:87459(0x155A3) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8E00FFFFFFFFD00A1A0645B2D402E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:420 pos:87663(0x1566F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8E00FFFFFFFFD00A1A067BAEC802E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#143: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5134mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=C142|SOURCEUNIQUEID=\BHBGUDON|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=EBUBBCRJ|JUMPERSVISIBLE=TRUE +#$pads{143} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.9346 -65.8876) + (path /539EEC0F) + (attr smd) + (fp_text reference "C142" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:261 pos:55227(0xD7BB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF8F00FFFFFFFFC3ED2106E0620F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:262 pos:55431(0xD887) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF8F00FFFFFFFFDEEB1B06E0620F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#144: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10054mil|Y=5351mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=C143|SOURCEUNIQUEID=\EETDNOWB|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MQFBMSDJ|JUMPERSVISIBLE=TRUE +#$pads{144} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 55.4736 -71.3994) + (path /539EEC0F) + (attr smd) + (fp_text reference "C143" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:259 pos:54819(0xD623) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFF9000FFFFFFFF601EFE057E7E2D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1309 counter:260 pos:55023(0xD6EF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9000FFFFFFFF601EFE05638033030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#145: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10692mil|Y=5336mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=C144|SOURCEUNIQUEID=\SOMXTCQD|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=FXQTOOWG|JUMPERSVISIBLE=TRUE +#$pads{145} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 71.6788 -71.0184) + (path /539EEC0F) + (attr smd) + (fp_text reference "C144" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:417 pos:87051(0x1540B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9100FFFFFFFF40785F0665373403E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:418 pos:87255(0x154D7) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9100FFFFFFFF40785F069B332803E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#146: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9599mil|Y=5182mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=22|SOURCEDESIGNATOR=C145|SOURCEUNIQUEID=\KFFQQSJA|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=NDVFOIYO|JUMPERSVISIBLE=TRUE +#$pads{146} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 43.9166 -67.1068) + (path /539EEC0F) + (attr smd) + (fp_text reference "C145" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:415 pos:86643(0x15273) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9200FFFFFFFFF0B0B805C5B71C03E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:416 pos:86847(0x1533F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9200FFFFFFFFF0B0B805FBB31003E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#147: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10192mil|Y=5134mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=C146|SOURCEUNIQUEID=\RDPAFULY|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=HLFXEXII|JUMPERSVISIBLE=TRUE +#$pads{147} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 58.9788 -65.8876) + (path /539EEC0F) + (attr smd) + (fp_text reference "C146" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:257 pos:54411(0xD48B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9300FFFFFFFFF32D1606E0620F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:258 pos:54615(0xD557) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9300FFFFFFFF0E2C1006E0620F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model 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(effects (font (thickness 0.05))) + ) + + #1309 counter:255 pos:54003(0xD2F3) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFF9400FFFFFFFF601EFE056E8C39030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1309 counter:256 pos:54207(0xD3BF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9400FFFFFFFF601EFE05538E3F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model 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(effects (font (thickness 0.05))) + ) + + #1309 counter:411 pos:85827(0x14F43) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9600FFFFFFFF50F950067BE52703E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:412 pos:86031(0x1500F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9600FFFFFFFF50F9500645E93303E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model 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(effects (font (thickness 0.05))) + ) + + #1309 counter:253 pos:53595(0xD15B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9700FFFFFFFFFD041006502109030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:254 pos:53799(0xD227) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9700FFFFFFFFE2061606502109030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model 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(effects (font (thickness 0.05))) + ) + + #1309 counter:251 pos:53187(0xCFC3) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFF9800FFFFFFFFFE04100630722D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1309 counter:252 pos:53391(0xD08F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9800FFFFFFFFE306160630722D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model 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(effects (font (thickness 0.05))) + ) + + #1309 counter:407 pos:85011(0x14C13) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9A00FFFFFFFF504C5806A5F81903E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:408 pos:85215(0x14CDF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9A00FFFFFFFF504C5806DBF40D03E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model 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(effects (font (thickness 0.05))) + ) + + #1309 counter:247 pos:52371(0xCC93) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFF9C00FFFFFFFF40050A06AE5409030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1309 counter:248 pos:52575(0xCD5F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9C00FFFFFFFF40050A0693560F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#157: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10104mil|Y=4658mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=33|SOURCEDESIGNATOR=C156|SOURCEUNIQUEID=\FQVNOWBG|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=DKXSNRTQ|JUMPERSVISIBLE=TRUE +#$pads{157} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 56.7436 -53.7972) + (path /539EEC0F) + (attr smd) + (fp_text reference "C156" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:405 pos:84603(0x14A7B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9D00FFFFFFFF9BBDFF0520C1C602E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:406 pos:84807(0x14B47) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9D00FFFFFFFF65C10B0620C1C602E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#158: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10126mil|Y=5751mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=34|SOURCEDESIGNATOR=C157|SOURCEUNIQUEID=\YFQYDSSK|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=CVEFTQDP|JUMPERSVISIBLE=TRUE +#$pads{158} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 57.3024 -81.5594) + (path /539EEC0F) + (attr smd) + (fp_text reference "C157" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:403 pos:84195(0x148E3) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9E00FFFFFFFFC51C0F0670886D03E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:404 pos:84399(0x149AF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9E00FFFFFFFFFB18030670886D03E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#159: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10151mil|Y=5055mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=35|SOURCEDESIGNATOR=C158|SOURCEUNIQUEID=\QVQXPMMW|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=KIQPBDXE|JUMPERSVISIBLE=TRUE +#$pads{159} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 57.9374 -63.881) + (path /539EEC0F) + (attr smd) + (fp_text reference "C158" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:245 pos:51963(0xCAFB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF9F00FFFFFFFF7DEA0906F05403030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:246 pos:52167(0xCBC7) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFF9F00FFFFFFFF62EC0F06F05403030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#160: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10052mil|Y=5114mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=36|SOURCEDESIGNATOR=C159|SOURCEUNIQUEID=\NYFULQXY|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MSXFGCSJ|JUMPERSVISIBLE=TRUE +#$pads{160} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 55.4228 -65.3796) + (path /539EEC0F) + (attr smd) + (fp_text reference "C159" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:243 pos:51555(0xC963) type:2 net:173 +#010000000005000000047C267C300100000000AA000000010C00AD00FFFFA000FFFFFFFF40D0FD0592560F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 175 "FPGA_VCCAUX_1V8") + ) +#1309 counter:244 pos:51759(0xCA2F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFA000FFFFFFFF40D0FD05AD5409030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#161: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9500mil|Y=5362mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=37|SOURCEDESIGNATOR=C160|SOURCEUNIQUEID=\GOKWKMFS|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=LWRSMYRG|JUMPERSVISIBLE=TRUE +#$pads{161} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 41.402 -71.6788) + (path /539EEC0F) + (attr smd) + (fp_text reference "C160" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:401 pos:83787(0x1474B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFA100FFFFFFFFC095A905052F3803E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:402 pos:83991(0x14817) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFFA100FFFFFFFFC095A9053B2B2C03E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#162: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10105mil|Y=4752mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=38|SOURCEDESIGNATOR=C161|SOURCEUNIQUEID=\DJHIEKAD|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=WYTOGKEY|JUMPERSVISIBLE=TRUE +#$pads{162} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 56.769 -56.1848) + (path /539EEC0F) + (attr smd) + (fp_text reference "C161" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:399 pos:83379(0x145B3) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFFA200FFFFFFFF75E80B060019D502E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1309 counter:400 pos:83583(0x1467F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFA200FFFFFFFFABE4FF050019D502E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#163: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10269mil|Y=5371mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=39|SOURCEDESIGNATOR=C162|SOURCEUNIQUEID=\LDLOOKIM|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=TXVNGPEM|JUMPERSVISIBLE=TRUE +#$pads{163} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.9346 -71.9074) + (path /539EEC0F) + (attr smd) + (fp_text reference "C162" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:241 pos:51147(0xC7CB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFA300FFFFFFFFDDEB1B06B08C33030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:242 pos:51351(0xC897) type:2 net:174 +#010000000005000000047C267C300100000000AA000000010C00AE00FFFFA300FFFFFFFFC2ED2106B08C33030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 176 "FPGA_VCCINT_1V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#164: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10210mil|Y=5390mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=40|SOURCEDESIGNATOR=C163|SOURCEUNIQUEID=\YAHPSBMQ|SOURCEHIERARCHICALPATH=rev02_22|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=DINMDVVI|JUMPERSVISIBLE=TRUE +#$pads{164} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 59.436 -72.39) + (path /539EEC0F) + (attr smd) + (fp_text reference "C163" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#174: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9547mil|Y=5022mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=C173|SOURCEUNIQUEID=\PDKYTIFQ|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=RKWOEQYN|JUMPERSVISIBLE=TRUE +#$pads{174} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 42.5958 -63.0428) + (path /539EEC0F) + (attr smd) + (fp_text reference "C173" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:389 pos:81339(0x13DBB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFAE00FFFFFFFFB0C1B005FB49F802E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:390 pos:81543(0x13E87) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFAE00FFFFFFFFB0C1B005C54D0403E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#175: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9929mil|Y=4702mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=C174|SOURCEUNIQUEID=\NPJRLWXU|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=TTHIVSQD|JUMPERSVISIBLE=TRUE +#$pads{175} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 52.2986 -54.9148) + (path /539EEC0F) + (attr smd) + (fp_text reference "C174" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:387 pos:80931(0x13C23) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFAF00FFFFFFFF750DF105E077CD02E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:388 pos:81135(0x13CEF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFAF00FFFFFFFFAB09E505E077CD02E501060079350700E501060079350700E5010600793507000000000002020200000000008066400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -1.00000 0.00000 180) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#176: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10597mil|Y=5648mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=C175|SOURCEUNIQUEID=\CVNRVQUN|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=CQQARSXU|JUMPERSVISIBLE=TRUE +#$pads{176} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 69.2658 -78.9432) + (path /539EEC0F) + (attr smd) + (fp_text reference "C175" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:385 pos:80523(0x13A8B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB000FFFFFFFF50F95006E5D26303E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:386 pos:80727(0x13B57) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB000FFFFFFFF50F950061BCF5703E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#177: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10447mil|Y=4710mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=C176|SOURCEUNIQUEID=\KQWQJHJL|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=KHDMLYEK|JUMPERSVISIBLE=TRUE +#$pads{177} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 65.4558 -55.118) + (path /539EEC0F) + (attr smd) + (fp_text reference "C176" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:383 pos:80115(0x138F3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB100FFFFFFFFF0153A0645B2D402E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:384 pos:80319(0x139BF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB100FFFFFFFFF0153A067BAEC802E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#178: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10473mil|Y=5751mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=C177|SOURCEUNIQUEID=\AHICTQWD|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=NDBCIKMG|JUMPERSVISIBLE=TRUE +#$pads{178} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 66.1162 -81.5594) + (path /539EEC0F) + (attr smd) + (fp_text reference "C177" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:381 pos:79707(0x1375B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB200FFFFFFFF750F440670886D03E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:382 pos:79911(0x13827) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB200FFFFFFFFAB0B380670886D03E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#179: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9548mil|Y=5529mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=C178|SOURCEUNIQUEID=\BQIQWSAS|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=RLWJQEKQ|JUMPERSVISIBLE=TRUE +#$pads{179} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 42.6212 -75.9206) + (path /539EEC0F) + (attr smd) + (fp_text reference "C178" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:379 pos:79299(0x135C3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB300FFFFFFFFC0E8B005ABA64503E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:380 pos:79503(0x1368F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB300FFFFFFFFC0E8B00575AA5103E501060079350700E501060079350700E5010600793507000000000002020200000000008056400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -1.00000 90) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#180: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10597mil|Y=5486mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=C179|SOURCEUNIQUEID=\IXONPSQS|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=YHFQMAGU|JUMPERSVISIBLE=TRUE +#$pads{180} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 69.2658 -74.8284) + (path /539EEC0F) + (attr smd) + (fp_text reference "C179" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:377 pos:78891(0x1342B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB400FFFFFFFF50F95006FB163F03E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:378 pos:79095(0x134F7) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB400FFFFFFFF50F95006C51A4B03E501060079350700E501060079350700E501060079350700000000000202020000000000E070400100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -1.00000 270) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#181: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9738mil|Y=4748mil|PATTERN=C_0805|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C180|SOURCEUNIQUEID=\VWDPFPIU|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0603|SOURCEDESCRIPTION=0805 CAPACITOR|UNIQUEID=SKPQQESW|JUMPERSVISIBLE=TRUE +#$pads{181} + (module "C_0805" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 47.4472 -56.0832) + (path /539EEC0F) + (attr smd) + (fp_text reference "C180" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:375 pos:78483(0x13293) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB500FFFFFFFFBBE4C705C07CD402E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:376 pos:78687(0x1335F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB500FFFFFFFF85E8D305C07CD402E501060079350700E501060079350700E5010600793507000000000002020200000000000000000100000000000000F200030004007980010079800100798001001BB3FFFF409C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 1.00000 0.00000) (size 1.0000005 1.2000001) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#182: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9777mil|Y=4996mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=C181|SOURCEUNIQUEID=\EBHSJXUT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=BXYPEPYT|JUMPERSVISIBLE=TRUE +#$pads{182} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 48.4378 -62.3824) + (path /539EEC0F) + (attr smd) + (fp_text reference "C181" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:235 pos:49923(0xC303) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB600FFFFFFFF10DAD3053255FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:236 pos:50127(0xC3CF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB600FFFFFFFF10DAD3054D53F7020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#183: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9758mil|Y=4897mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=C182|SOURCEUNIQUEID=\YBSKKCWN|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=JCPLPMUM|JUMPERSVISIBLE=TRUE +#$pads{183} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 47.9552 -59.8678) + (path /539EEC0F) + (attr smd) + (fp_text reference "C182" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:233 pos:49515(0xC16B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB700FFFFFFFFD3F4D3051039EB020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:234 pos:49719(0xC237) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB700FFFFFFFFEEF2CD051039EB020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#184: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9975mil|Y=5667mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=C183|SOURCEUNIQUEID=\UOHMCBNI|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=XHKPPYCQ|JUMPERSVISIBLE=TRUE +#$pads{184} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 53.467 -79.4258) + (path /539EEC0F) + (attr smd) + (fp_text reference "C183" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:231 pos:49107(0xBFD3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB800FFFFFFFF7010F2053EB65D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:232 pos:49311(0xC09F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB800FFFFFFFF7010F20523B863030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#185: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10309mil|Y=4977.9686mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=C184|SOURCEUNIQUEID=\LQFTMAFO|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=TNFSJJFR|JUMPERSVISIBLE=TRUE +#$pads{185} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 61.9506 -61.924402) + (path /539EEC0F) + (attr smd) + (fp_text reference "C184" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:229 pos:48699(0xBE3B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFB900FFFFFFFF5D062206E693F7020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 -0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:230 pos:48903(0xBF07) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFB900FFFFFFFF42082806E693F7020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 -0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#186: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9836mil|Y=5291mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=20|SOURCEDESIGNATOR=C185|SOURCEUNIQUEID=\DIGJUALN|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=BCAKHPCP|JUMPERSVISIBLE=TRUE +#$pads{186} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 49.9364 -69.8754) + (path /539EEC0F) + (attr smd) + (fp_text reference "C185" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:227 pos:48291(0xBCA3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFBA00FFFFFFFFB2DBDF05B05727030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:228 pos:48495(0xBD6F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFBA00FFFFFFFFCDD9D905B05727030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#187: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10054mil|Y=5509mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=C186|SOURCEUNIQUEID=\VJPQUPBQ|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=HQPCLXKD|JUMPERSVISIBLE=TRUE +#$pads{187} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 55.4736 -75.4126) + (path /539EEC0F) + (attr smd) + (fp_text reference "C186" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:225 pos:47883(0xBB0B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFBB00FFFFFFFF601EFE05439C4B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:226 pos:48087(0xBBD7) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFBB00FFFFFFFF601EFE055E9A45030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#188: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9629mil|Y=5036mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=22|SOURCEDESIGNATOR=C187|SOURCEUNIQUEID=\SHWJNLFP|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=XOYROXNY|JUMPERSVISIBLE=TRUE +#$pads{188} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 44.6786 -63.3984) + (path /539EEC0F) + (attr smd) + (fp_text reference "C187" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:223 pos:47475(0xB973) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFBC00FFFFFFFFD044BD05B26F03030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:224 pos:47679(0xBA3F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFBC00FFFFFFFFD044BD05CD6DFD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#189: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9957mil|Y=4784mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=C188|SOURCEUNIQUEID=\KCPQYFTT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=JOQDPDNN|JUMPERSVISIBLE=TRUE +#$pads{189} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 53.0098 -56.9976) + (path /539EEC0F) + (attr smd) + (fp_text reference "C188" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:221 pos:47067(0xB7DB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFBD00FFFFFFFF5D50EC0500FBD9020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:222 pos:47271(0xB8A7) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFBD00FFFFFFFF4252F20500FBD9020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#190: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9935mil|Y=5508mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=C189|SOURCEUNIQUEID=\XTYNWOFN|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=AQPLRHPV|JUMPERSVISIBLE=TRUE +#$pads{190} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 52.451 -75.3872) + (path /539EEC0F) + (attr smd) + (fp_text reference "C189" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:219 pos:46659(0xB643) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFBE00FFFFFFFFF0F5EB0532754B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:220 pos:46863(0xB70F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFBE00FFFFFFFFF0F5EB054D7345030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#191: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10540mil|Y=5089mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=25|SOURCEDESIGNATOR=C190|SOURCEUNIQUEID=\WOAUHVJP|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=FMSCWVFB|JUMPERSVISIBLE=TRUE +#$pads{191} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 67.818 -64.7446) + (path /539EEC0F) + (attr smd) + (fp_text reference "C190" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:217 pos:46251(0xB4AB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFBF00FFFFFFFFB3474B06108508030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:218 pos:46455(0xB577) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFBF00FFFFFFFFCE454506108508030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#192: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9955mil|Y=5214mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=26|SOURCEDESIGNATOR=C191|SOURCEUNIQUEID=\WCUBAQWJ|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MVPOKXJS|JUMPERSVISIBLE=TRUE +#$pads{192} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 52.959 -67.9196) + (path /539EEC0F) + (attr smd) + (fp_text reference "C191" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:215 pos:45843(0xB313) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC000FFFFFFFF2204F205E0971B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:216 pos:46047(0xB3DF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC000FFFFFFFF3D02EC05E0971B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#193: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9698mil|Y=5627mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=27|SOURCEDESIGNATOR=C192|SOURCEUNIQUEID=\RJIQRQBO|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=RUJKICEB|JUMPERSVISIBLE=TRUE +#$pads{193} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 46.4312 -78.4098) + (path /539EEC0F) + (attr smd) + (fp_text reference "C192" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:213 pos:45435(0xB17B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC100FFFFFFFF20CCC705A39D5D030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:214 pos:45639(0xB247) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC100FFFFFFFF20CCC705BE9B57030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#194: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9817mil|Y=5154mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=28|SOURCEDESIGNATOR=C193|SOURCEUNIQUEID=\NIXILDTT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=DNJLYEBX|JUMPERSVISIBLE=TRUE +#$pads{194} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 49.4538 -66.3956) + (path /539EEC0F) + (attr smd) + (fp_text reference "C193" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:211 pos:45027(0xAFE3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC200FFFFFFFF90F4D9052E6F0F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:212 pos:45231(0xB0AF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC200FFFFFFFF90F4D905137115030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#195: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9836mil|Y=4859mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=29|SOURCEDESIGNATOR=C194|SOURCEUNIQUEID=\WHSTJRJK|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=DGJITSMO|JUMPERSVISIBLE=TRUE +#$pads{195} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 49.9364 -58.9026) + (path /539EEC0F) + (attr smd) + (fp_text reference "C194" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:209 pos:44619(0xAE4B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC300FFFFFFFFCDD9D905B06CE5020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:210 pos:44823(0xAF17) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC300FFFFFFFFB2DBDF05B06CE5020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#196: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9797mil|Y=5568mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=30|SOURCEDESIGNATOR=C195|SOURCEUNIQUEID=\BKMYTVCA|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=BSHMTKKJ|JUMPERSVISIBLE=TRUE +#$pads{196} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 48.9458 -76.9112) + (path /539EEC0F) + (attr smd) + (fp_text reference "C195" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:207 pos:44211(0xACB3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC400FFFFFFFF42E8D905009C51030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:208 pos:44415(0xAD7F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC400FFFFFFFF5DE6D305009C51030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#197: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10250mil|Y=4997mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=31|SOURCEDESIGNATOR=C196|SOURCEUNIQUEID=\VAKQCYSR|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=CUIIPYWX|JUMPERSVISIBLE=TRUE +#$pads{197} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 60.452 -62.4078) + (path /539EEC0F) + (attr smd) + (fp_text reference "C196" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:205 pos:43803(0xAB1B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC500FFFFFFFFA0061C065D7AF7020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:206 pos:44007(0xABE7) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC500FFFFFFFFA0061C06427CFD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#198: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9758mil|Y=5213mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=32|SOURCEDESIGNATOR=C197|SOURCEUNIQUEID=\PFHTBAEO|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=MLCSFHXV|JUMPERSVISIBLE=TRUE +#$pads{198} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 47.9552 -67.8942) + (path /539EEC0F) + (attr smd) + (fp_text reference "C197" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:203 pos:43395(0xA983) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC600FFFFFFFFEEF2CD05D0701B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:204 pos:43599(0xAA4F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC600FFFFFFFFD3F4D305D0701B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#199: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9875mil|Y=5721mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=33|SOURCEDESIGNATOR=C198|SOURCEUNIQUEID=\HCFPRRPT|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=HXRWUCBE|JUMPERSVISIBLE=TRUE +#$pads{199} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 50.927 -80.7974) + (path /539EEC0F) + (attr smd) + (fp_text reference "C198" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:201 pos:42987(0xA7EB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC700FFFFFFFF23CFE50590F468030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:202 pos:43191(0xA8B7) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC700FFFFFFFF3ECDDF0590F468030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#200: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10387mil|Y=5213mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=34|SOURCEDESIGNATOR=C199|SOURCEUNIQUEID=\NMQGBMIF|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=TOCLQNHU|JUMPERSVISIBLE=TRUE +#$pads{200} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 63.9318 -67.8942) + (path /539EEC0F) + (attr smd) + (fp_text reference "C199" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:199 pos:42579(0xA653) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC800FFFFFFFF22EF3306D0701B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:200 pos:42783(0xA71F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC800FFFFFFFF3DED2D06D0701B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#201: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9876mil|Y=4977mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=35|SOURCEDESIGNATOR=C200|SOURCEUNIQUEID=\KPMJDSCF|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=GMHWLPXT|JUMPERSVISIBLE=TRUE +#$pads{201} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 50.9524 -61.8998) + (path /539EEC0F) + (attr smd) + (fp_text reference "C200" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:197 pos:42171(0xA4BB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFC900FFFFFFFF4DF4DF05106EF7020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:198 pos:42375(0xA587) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFC900FFFFFFFF32F6E505106EF7020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#202: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9896mil|Y=5390mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=36|SOURCEDESIGNATOR=C201|SOURCEUNIQUEID=\QXAMUAIX|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=VYQMBHNX|JUMPERSVISIBLE=TRUE +#$pads{202} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 51.4604 -72.39) + (path /539EEC0F) + (attr smd) + (fp_text reference "C201" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:195 pos:41763(0xA323) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFCA00FFFFFFFF8002E605D27339030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:196 pos:41967(0xA3EF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFCA00FFFFFFFF8002E605ED7133030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#203: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10526mil|Y=5193mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=37|SOURCEDESIGNATOR=C202|SOURCEUNIQUEID=\PQACHMAS|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=HWLFUMAC|JUMPERSVISIBLE=TRUE +#$pads{203} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 67.4624 -67.3862) + (path /539EEC0F) + (attr smd) + (fp_text reference "C202" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:193 pos:41355(0xA18B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFCB00FFFFFFFFE023460683641B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:194 pos:41559(0xA257) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFCB00FFFFFFFFE02346069E6215030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#204: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9679mil|Y=5173mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=38|SOURCEDESIGNATOR=C203|SOURCEUNIQUEID=\SHFJOOVK|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=NPGDTYOL|JUMPERSVISIBLE=TRUE +#$pads{204} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 45.9486 -66.8782) + (path /539EEC0F) + (attr smd) + (fp_text reference "C203" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:191 pos:40947(0x9FF3) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFCC00FFFFFFFFE2E6C705505615030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:192 pos:41151(0xA0BF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFCC00FFFFFFFFFDE4C105505615030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#205: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9625.7268mil|Y=5503.4624mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=39|SOURCEDESIGNATOR=C204|SOURCEUNIQUEID=\OVKILSFG|SOURCEHIERARCHICALPATH=rev02_23|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=CCMHXXUC|JUMPERSVISIBLE=TRUE +#$pads{205} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 44.595461 -75.271945) + (path /539EEC0F) + (attr smd) + (fp_text reference "C204" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:189 pos:40539(0x9E5B) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFCD00FFFFFFFFF4C4BC05F3C34A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1309 counter:190 pos:40743(0x9F27) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFFCD00FFFFFFFFF4C4BC050EC244030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#206: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8738mil|Y=4534mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C205|SOURCEUNIQUEID=\QIBADEYD|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UMBMNKEB|JUMPERSVISIBLE=TRUE +#$pads{206} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 22.0472 -50.6476) + (path /539EEC0F) + (attr smd) + (fp_text reference "C205" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1714 pos:354278(0x567E6) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFFCE00FFFFFFFF494D2C0560D5B302A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1309 counter:1715 pos:354482(0x568B2) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFFCE00FFFFFFFFF7523E0560D5B302A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#207: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8738mil|Y=4362mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C206|SOURCEUNIQUEID=\RSYPXHWM|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VSXSPQXQ|JUMPERSVISIBLE=TRUE +#$pads{207} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 22.0472 -46.2788) + (path /539EEC0F) + (attr smd) + (fp_text reference "C206" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1712 pos:353870(0x5664E) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFFCF00FFFFFFFFF7523E05A0969902A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1713 pos:354074(0x5671A) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFFCF00FFFFFFFF494D2C05A0969902A19C0900869E0F00A19C0900869E0F00A19C0900869E0F000000000002020200000000000000000100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at -1.50000 0.00000) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#208: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8834mil|Y=5016mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C207|SOURCEUNIQUEID=\FPWGEFOJ|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=AVBAEYQC|JUMPERSVISIBLE=TRUE +#$pads{208} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 24.4856 -62.8904) + (path /539EEC0F) + (attr smd) + (fp_text reference "C207" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1590 pos:328982(0x50516) type:2 net:239 +#010000000005000000047C267C300100000000AA000000200C00EF00FFFFD000FFFFFFFF12F746058061FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 241 "NetC207_1") + ) +#1309 counter:1591 pos:329186(0x505E2) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFFD000FFFFFFFF2DF540058061FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#209: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8930mil|Y=5016mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=C208|SOURCEUNIQUEID=\VMNULFUV|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UEWWCVOJ|JUMPERSVISIBLE=TRUE +#$pads{209} + (module "C_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 26.924 -62.8904) + (path /539EEC0F) + (attr smd) + (fp_text reference "C208" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1588 pos:328574(0x5037E) type:2 net:241 +#010000000005000000047C267C300100000000AA000000200C00F100FFFFD100FFFFFFFF2D9B4F058061FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 243 "NetC208_2") + ) +#1309 counter:1589 pos:328778(0x5044A) type:2 net:240 +#010000000005000000047C267C300100000000AA000000200C00F000FFFFD100FFFFFFFF129D55058061FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#210: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9236mil|Y=4719mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=C209|SOURCEUNIQUEID=\QBVCBBBK|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=OEMEJMXM|JUMPERSVISIBLE=TRUE +#$pads{210} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 34.6964 -55.3466) + (path /539EEC0F) + (attr smd) + (fp_text reference "C209" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1710 pos:353462(0x564B6) type:2 net:240 +#010000000005000000047C267C300100000000AA000000200C00F000FFFFD200FFFFFFFF404D8105C712D902A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -1.50000 270) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1") + ) +#1309 counter:1711 pos:353666(0x56582) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFFD200FFFFFFFF404D8105190DC702A19C0900869E0F00A19C0900869E0F00A19C0900869E0F00000000000202020000000000E070400100000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102010100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 1.50000 270) (size 1.5999993 2.5999999) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#211: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9238mil|Y=4997mil|PATTERN=C_1210|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=C210|SOURCEUNIQUEID=\XSETEXNR|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC1210|SOURCEDESCRIPTION=1210 CAPACITOR X5R 6.3V|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DLGHAIRB|JUMPERSVISIBLE=TRUE +#$pads{211} + (module "C_1210" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 34.7472 -62.4078) + (path /539EEC0F) + (attr smd) + (fp_text reference "C210" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1708 pos:353054(0x5631E) type:2 net:5 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(xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#212: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8815mil|Y=5024mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=C211|SOURCEUNIQUEID=\XSTFNHBJ|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=SFBCNKXA|JUMPERSVISIBLE=TRUE +#$pads{212} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 24.003 -63.0936) + (path /539EEC0F) + (attr smd) + (fp_text reference "C211" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:187 pos:40131(0x9CC3) type:2 net:284 +#010000000005000000047C267C300100000000AA000000010C001C01FFFFD400FFFFFFFFF00F41050E99FB020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 286 "PWR_ENA_VCCINT") + ) +#1309 counter:188 pos:40335(0x9D8F) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFFD400FFFFFFFFF00F4105F39A01030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#213: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8454mil|Y=4401mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=C212|SOURCEUNIQUEID=\PWJUPSML|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=UPDHBLND|JUMPERSVISIBLE=TRUE +#$pads{213} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 14.8336 -47.2694) + (path /539EEC0F) + (attr smd) + (fp_text reference "C212" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:185 pos:39723(0x9B2B) type:2 net:5 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(xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#214: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9087mil|Y=5545mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=C213|SOURCEUNIQUEID=\TCKLRTOF|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=ICHVQVVB|JUMPERSVISIBLE=TRUE +#$pads{214} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 30.9118 -76.327) + (path /539EEC0F) + (attr smd) + (fp_text reference "C213" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:183 pos:39315(0x9993) type:2 net:283 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(xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#215: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9287.3228mil|Y=3110.8661mil|PATTERN=C_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=C214|SOURCEUNIQUEID=\DKAAIRPP|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=C-EUC0402|SOURCEDESCRIPTION=0402 CAPACITOR|UNIQUEID=KJBSVIQK|JUMPERSVISIBLE=TRUE +#$pads{215} + (module "C_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 35.999999 -14.499999) + (path /539EEC0F) + (attr smd) + (fp_text reference "C214" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:181 pos:38907(0x97FB) type:2 net:5 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(fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:130 pos:28484(0x6F44) type:2 net:279 +#010000000005000000047C267C300100000000AA000000011C001701FFFFDD00FFFFFFFFC1FDEF04108A9F027935070051CE04007935070051CE04007935070051CE04000000000002020200000000008066400000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "3" smd rect (at -1.10000 0.00000 180) (size 1.2000001 0.8000009) + (layers F.Cu F.Mask F.Paste) (net 281 "POK_VCCAUX") + ) +#1309 counter:131 pos:28688(0x7010) type:2 net:-1 +#010000000005000000047C267C300100000000AA000000011C00FFFFFFFFDD00FFFFFFFF1F35FD04103FA5027935070051CE04007935070051CE04007935070051CE04000000000002020200000000008066400000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 1.10000 -0.95000 180) (size 1.2000001 0.8000009) + (layers F.Cu F.Mask F.Paste) + ) +#1309 counter:132 pos:28892(0x70DC) type:2 net:285 +#010000000005000000047C267C300100000000AA000000011C001D01FFFFDD00FFFFFFFF1F35FD0410D599027935070051CE04007935070051CE04007935070051CE04000000000002020200000000008066400000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 1.10000 0.95000 180) (size 1.2000001 0.8000009) + (layers F.Cu F.Mask F.Paste) (net 287 "PWR_ENA_VCCO") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#222: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9162mil|Y=5411mil|PATTERN=SOT-23|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=D4|SOURCEUNIQUEID=\UPJFRMBE|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=CHIPS.PcbLib|SOURCECOMPONENTLIBRARY=diode.IntLib|SOURCELIBREFERENCE=BAT54|SOURCEDESCRIPTION=OnSemi Schottky Diode|UNIQUEID=LHRVRNPE|JUMPERSVISIBLE=TRUE +#$pads{222} + (module "SOT-23" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 32.8168 -72.9234) + (path /539EEC0F) + (attr smd) + (fp_text reference "D4" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:127 pos:27872(0x6CE0) type:2 net:283 +#010000000005000000047C267C300100000000AA000000011C001B01FFFFDE00FFFFFFFFF1666F05305C3F037935070051CE04007935070051CE04007935070051CE04000000000002020200000000000000000000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -1.10000 -0.95000) (size 1.2000001 0.8000009) + (layers F.Cu F.Mask F.Paste) (net 285 "PWR_ENA_VCCAUX") + ) +#1309 counter:128 pos:28076(0x6DAC) type:2 net:-1 +#010000000005000000047C267C300100000000AA000000011C00FFFFFFFFDE00FFFFFFFFF1666F0530F233037935070051CE04007935070051CE04007935070051CE04000000000002020200000000000000000000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -1.10000 0.95000) (size 1.2000001 0.8000009) + (layers F.Cu F.Mask F.Paste) + ) +#1309 counter:129 pos:28280(0x6E78) type:2 net:280 +#010000000005000000047C267C300100000000AA000000011C001801FFFFDE00FFFFFFFF4F9E7C0530A739037935070051CE04007935070051CE04007935070051CE04000000000002020200000000000000000000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "3" smd rect (at 1.10000 0.00000) (size 1.2000001 0.8000009) + (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#223: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8946.8188mil|Y=3158.9999mil|PATTERN=L_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=FB1|SOURCEUNIQUEID=\NLUTYYJE|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=microbuilder.IntLib|SOURCELIBREFERENCE=FERRITE_0603MP|SOURCEDESCRIPTION=Ferrite Bead 600 Ohm 500mA|UNIQUEID=IDQGAPLY|JUMPERSVISIBLE=TRUE +#$pads{223} + (module "L_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 27.351198 -15.722597) + (path /539EEC0F) + (attr smd) + (fp_text reference "FB1" (at 0 0) (layer F.SilkS) hide + (effects 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0.9000007) + (layers F.Cu F.Mask F.Paste) (net 204 "FT_VPHY") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#224: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8687.0394mil|Y=3127.37mil|PATTERN=L_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=FB2|SOURCEUNIQUEID=\VHIYSXKA|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=microbuilder.IntLib|SOURCELIBREFERENCE=FERRITE_0603MP|SOURCEDESCRIPTION=Ferrite Bead 600 Ohm 500mA|UNIQUEID=IVHXISSB|JUMPERSVISIBLE=TRUE +#$pads{224} + (module "L_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 20.752801 -14.919198) + (path /539EEC0F) + (attr smd) + (fp_text reference "FB2" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:709 pos:146728(0x23D28) type:2 net:203 +#010000000005000000047C267C300100000000AA000000011C00CB00FFFFE000FFFFFFFFB0A43205E432DD01E50106001B680500E50106001B680500E50106001B6805000000000002020200000000008056400000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.85000 0.00000 90) (size 1.0000005 0.9000007) + (layers F.Cu F.Mask F.Paste) (net 205 "FT_VPLL") + ) +#1309 counter:710 pos:146932(0x23DF4) type:2 net:197 +#010000000005000000047C267C300100000000AA000000011C00C500FFFFE000FFFFFFFF446E2805E432DD01E50106001B680500E50106001B680500E50106001B6805000000000002020200000000008056400000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.85000 0.00000 90) (size 1.0000005 0.9000007) + (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#225: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11540mil|Y=2971.7401mil|PATTERN=L_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=FB3|SOURCEUNIQUEID=\YLWBIKPN|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=microbuilder.IntLib|SOURCELIBREFERENCE=FERRITE_0603MP|SOURCEDESCRIPTION=Ferrite Bead 600 Ohm 500mA|UNIQUEID=XUPWRGMK|JUMPERSVISIBLE=TRUE +#$pads{225} + (module "L_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 93.218 -10.966199) + (path /539EEC0F) + (attr smd) + (fp_text reference "FB3" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:707 pos:146320(0x23B90) type:2 net:184 +#010000000005000000047C267C300100000000AA000000011C00B800FFFFE100FFFFFFFF40DDE006CF8ECA01E50106001B680500E50106001B680500E50106001B6805000000000002020200000000000000000000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.00000 -0.85000) (size 1.0000005 0.9000007) + (layers F.Cu F.Mask F.Paste) (net 186 "FT_MGMT_VCC3V3") + ) +#1309 counter:708 pos:146524(0x23C5C) type:2 net:185 +#010000000005000000047C267C300100000000AA000000011C00B900FFFFE100FFFFFFFF40DDE0066358C001E50106001B680500E50106001B680500E50106001B6805000000000002020200000000000000000000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.85000) (size 1.0000005 0.9000007) + (layers F.Cu F.Mask F.Paste) (net 187 "FT_MGMT_VPHY") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#226: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11460mil|Y=2971.7401mil|PATTERN=L_0603|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=FB4|SOURCEUNIQUEID=\SCPPJPAA|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=microbuilder.IntLib|SOURCELIBREFERENCE=FERRITE_0603MP|SOURCEDESCRIPTION=Ferrite Bead 600 Ohm 500mA|UNIQUEID=VWXHWWTP|JUMPERSVISIBLE=TRUE +#$pads{226} + (module "L_0603" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 91.186 -10.966199) + (path /539EEC0F) + (attr smd) + (fp_text reference "FB4" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:705 pos:145912(0x239F8) type:2 net:186 +#010000000005000000047C267C300100000000AA000000011C00BA00FFFFE200FFFFFFFF40A8D4066358C001E50106001B680500E50106001B680500E50106001B6805000000000002020200000000000000000000000000000000F20003000400798001007980010079800100F884FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.00000 0.85000) (size 1.0000005 0.9000007) + (layers F.Cu F.Mask F.Paste) (net 188 "FT_MGMT_VPLL") + ) +#1309 counter:706 pos:146116(0x23AC4) type:2 net:184 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1.80000000000000E+0002|NAMEAUTOPOSITION=1|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=FB5|SOURCEUNIQUEID=\LCYSIBXW|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=UsedComponents.IntLib|SOURCELIBREFERENCE=BLM31PG330SN1_1206|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=SRXFJEFS|JUMPERSVISIBLE=TRUE +#$pads{227} + (module "L_1206" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 41.4528 -84.2772) + (path /539EEC0F) + (attr smd) + (fp_text reference "FB5" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1706 pos:352646(0x56186) type:2 net:173 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#228: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8177mil|Y=3845mil|PATTERN=L_1206|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=FB6|SOURCEUNIQUEID=\SLFVGQAP|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=UsedComponents.IntLib|SOURCELIBREFERENCE=BLM31PG330SN1_1206|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YBFLOGKY|JUMPERSVISIBLE=TRUE +#$pads{228} + (module "L_1206" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 7.7978 -33.147) + (path /539EEC0F) + (attr smd) + (fp_text reference "FB6" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1704 pos:352238(0x55FEE) type:2 net:237 +#010000000005000000047C267C300100000000AA000000201C00ED00FFFFE400FFFFFFFF034DD70450B34A0235D00A000D69080035D00A000D69080035D00A000D690800000000000202020000000000E070400000000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -1.40000 0.00000 270) (size 1.7999989 1.3999997) + (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1") + ) +#1309 counter:1705 pos:352442(0x560BA) type:2 net:301 +#010000000005000000047C267C300100000000AA000000201C002D01FFFFE400FFFFFFFF1D1FE80450B34A0235D00A000D69080035D00A000D69080035D00A000D690800000000000202020000000000E070400000000000000000F200030004007980010079800100798001003666FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 1.40000 0.00000 270) (size 1.7999989 1.3999997) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + 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Common on Arduino. This footprint will take up less PCB space and can be used with a 10-pin to 6-pin adapter such as SKU: BOB-08508. *Special note about "TEST_POINT" package. The stop mask is on the top side, so if you want your programming test points to be on the bottom of your board, make sure to place this package on the bottom side of the board. This also ensure that the orientation to program from the bottom side will be correct.|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=HBBIJFEX|JUMPERSVISIBLE=TRUE +#$pads{241} + (module "PLD-6" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 89.117 -31.1658) + (path /539EEC0F) + (attr smd) + (fp_text reference "JP3" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:15 pos:3061(0xBF5) type:2 net:210 +#010000000005000000047C267C300100000000AA0000004A0C00D200FFFFF100FFFFFFFF3999C006B00E4E02D7020900D7020900D7020900D7020900D7020900D7020900E50106000202020000000000E070400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000 + (pad "1" thru_hole rect (at -1.27000 -2.54000 270) (size 1.4999995 1.4999995) (drill 1.0000005) + (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 212 "MKM_AVR_MISO") + ) +#1309 counter:16 pos:3265(0xCC1) type:1 net:2 +#010000000005000000047C267C300100000000AA0000004A0C000200FFFFF100FFFFFFFF79DBCF06B00E4E02D7020900D7020900D7020900D7020900D7020900D7020900E50106000101010000000000E070400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000002000101010101010101010000000000000000000F0003010000 + (pad "2" thru_hole circle (at 1.27000 -2.54000 270) (size 1.4999995 1.4999995) (drill 1.0000005) + (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 4 "3V3_BATT") + ) +#1309 counter:17 pos:3469(0xD8D) type:1 net:212 +#010000000005000000047C267C300100000000AA0000004A0C00D400FFFFF100FFFFFFFF3999C00670CC3E02D7020900D7020900D7020900D7020900D7020900D7020900E50106000101010000000000E070400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000 + (pad "3" thru_hole circle (at -1.27000 0.00000 270) (size 1.4999995 1.4999995) (drill 1.0000005) + (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 214 "MKM_AVR_SCK") + ) +#1309 counter:18 pos:3673(0xE59) type:1 net:211 +#010000000005000000047C267C300100000000AA0000004A0C00D300FFFFF100FFFFFFFF79DBCF0670CC3E02D7020900D7020900D7020900D7020900D7020900D7020900E50106000101010000000000E070400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000 + (pad "4" thru_hole circle (at 1.27000 0.00000 270) (size 1.4999995 1.4999995) (drill 1.0000005) + (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 213 "MKM_AVR_MOSI") + ) +#1309 counter:19 pos:3877(0xF25) type:1 net:37 +#010000000005000000047C267C300100000000AA0000004A0C002500FFFFF100FFFFFFFF3999C006308A2F02D7020900D7020900D7020900D7020900D7020900D7020900E50106000101010000000000E070400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000000000101010101010101010000000000000000000F0003010000 + (pad "5" thru_hole circle (at -1.27000 2.54000 270) (size 1.4999995 1.4999995) (drill 1.0000005) + (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 39 "AVR_RESET") + ) +#1309 counter:20 pos:4081(0xFF1) type:1 net:5 +#010000000005000000047C267C300100000000AA0000004A0C000500FFFFF100FFFFFFFF79DBCF06308A2F02D7020900D7020900D7020900D7020900D7020900D7020900E50106000101010000000000E070400100000000000001F200030004007980010079800100798001001BB3FFFFE54C000005000101010101010101010000000000000000000F0003010000 + (pad "6" thru_hole circle (at 1.27000 2.54000 270) (size 1.4999995 1.4999995) (drill 1.0000005) + (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#242: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11361.3121mil|Y=2480.9449mil|PATTERN=PLS-3|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=JP4|SOURCEUNIQUEID=\RUSALGIN|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Connectors.PcbLib|SOURCECOMPONENTLIBRARY=SparkFun-Connectors.IntLib|SOURCELIBREFERENCE=M03LOCK|SOURCEDESCRIPTION=Standard 3-pin 0.1" header. Use with straight break away headers (SKU : PRT-00116), right angle break away headers (PRT-00553), swiss pins (PRT-00743), machine pins (PRT-00117), and female headers (PRT-00115). Molex polarized connector foot print use with SKU : PRT-08232 with associated crimp pins and housings.|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=DEYDMPVE|JUMPERSVISIBLE=TRUE +#$pads{242} + (module "PLS-3" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 88.679327 1.50000000000001) + (path /539EEC0F) + (attr smd) + (fp_text reference "JP4" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:12 pos:2449(0x991) type:1 net:5 +#010000000005000000047C267C300100000000AA0000004A0C000500FFFFF200FFFFFFFF81DBD406E98F7A01D7020900D7020900D7020900D7020900D7020900D7020900E501060001010100000000000000000100000000000001F200030004007980010079800100798001001BB3FFFFE54C000005000101010101010101010000000000000000000F0003010000 + (pad "3" thru_hole circle (at 2.54000 -0.00000) (size 1.4999995 1.4999995) (drill 1.0000005) + (layers F.Cu B.Cu F.Mask F.Paste B.Mask B.Paste) (net 7 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9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=21|SOURCEDESIGNATOR=R7|SOURCEUNIQUEID=\MGSMWTQM|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RQPWUPMP|JUMPERSVISIBLE=TRUE +#$pads{270} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 71 -89.499999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R7" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1997 pos:508495(0x7C24F) type:2 net:3 +#010000000005000000047C267C300100000000AA000000200C000300FFFF0E01FFFFFFFF54645B062F3DA0030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 5 "15V_LDO_ENABLE") + ) +#1309 counter:1998 pos:508699(0x7C31B) type:2 net:282 +#010000000005000000047C267C300100000000AA000000200C001A01FFFF0E01FFFFFFFF54645B064A3B9A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 284 "PWR_18V") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#271: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8877.0001mil|Y=5421mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=22|SOURCEDESIGNATOR=R8|SOURCEUNIQUEID=\SOCXQOQW|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DCPXKSIX|JUMPERSVISIBLE=TRUE +#$pads{271} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 25.577803 -73.1774) + (path /539EEC0F) + (attr smd) + (fp_text reference "R8" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1995 pos:508087(0x7C0B7) type:2 net:264 +#010000000005000000047C267C300100000000AA000000200C000801FFFF0F01FFFFFFFFC3864D05D02D3B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 266 "NetR8_1") + ) +#1309 counter:1996 pos:508291(0x7C183) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFF0F01FFFFFFFFDE844705D02D3B030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#272: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8980mil|Y=5399mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=R9|SOURCEUNIQUEID=\LCXAWMSR|SOURCEHIERARCHICALPATH=rev02_1|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UXSURNSG|JUMPERSVISIBLE=TRUE +#$pads{272} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 28.194 -72.6186) + (path /539EEC0F) + (attr smd) + (fp_text reference "R9" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1993 pos:507679(0x7BF1F) type:2 net:264 +#010000000005000000047C267C300100000000AA000000200C000801FFFF1001FFFFFFFF403D5A0563D33A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 266 "NetR8_1") + ) +#1309 counter:1994 pos:507883(0x7BFEB) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF1001FFFFFFFF403D5A057ED134030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#273: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11299mil|Y=6211mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=5|SOURCEDESIGNATOR=R10|SOURCEUNIQUEID=\PRNPSLKC|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=CQWSIRQL|JUMPERSVISIBLE=TRUE +#$pads{273} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 87.0966 -93.2434) + (path /539EEC0F) + (attr smd) + (fp_text reference "R10" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1991 pos:507271(0x7BD87) type:2 net:286 +#010000000005000000047C267C300100000000AA000000200C001E01FFFF1101FFFFFFFF3017BC063EB8B0030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 288 "RAW_NOISE") + ) +#1309 counter:1992 pos:507475(0x7BE53) type:2 net:274 +#010000000005000000047C267C300100000000AA000000200C001201FFFF1101FFFFFFFF3017BC0623BAB6030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 276 "NOISE_IN") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#274: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11452mil|Y=5872mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=R11|SOURCEUNIQUEID=\PXWBTCLP|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VVOQTWWQ|JUMPERSVISIBLE=TRUE +#$pads{274} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 90.9828 -84.6328) + (path /539EEC0F) + (attr smd) + (fp_text reference "R11" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1989 pos:506863(0x7BBEF) type:2 net:286 +#010000000005000000047C267C300100000000AA000000200C001E01FFFF1201FFFFFFFFCD6ED00600FF7F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 288 "RAW_NOISE") + ) +#1309 counter:1990 pos:507067(0x7BCBB) type:2 net:4 +#010000000005000000047C267C300100000000AA000000200C000400FFFF1201FFFFFFFFB270D60600FF7F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 6 "15V_STABLE") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#275: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11203mil|Y=5930mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=R12|SOURCEUNIQUEID=\IRLNVDEM|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MEUEJNBV|JUMPERSVISIBLE=TRUE +#$pads{275} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 84.6582 -86.106) + (path /539EEC0F) + (attr smd) + (fp_text reference "R12" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1987 pos:506455(0x7BA57) type:2 net:6 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(at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#276: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11047mil|Y=5764mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R13|SOURCEUNIQUEID=\PIIMXANL|SOURCEHIERARCHICALPATH=rev02_2|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=BCJRCCDE|JUMPERSVISIBLE=TRUE +#$pads{276} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 80.6958 -81.8896) + (path /539EEC0F) + (attr smd) + (fp_text reference "R13" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1985 pos:506047(0x7B8BF) type:2 net:301 +#010000000005000000047C267C300100000000AA000000200C002D01FFFF1401FFFFFFFF70A395064D836C030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:1986 pos:506251(0x7B98B) type:2 net:7 +#010000000005000000047C267C300100000000AA000000200C000700FFFF1401FFFFFFFF70A39506328572030DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 9 "AMPLIFIED") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#277: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9127mil|Y=3905mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R14|SOURCEUNIQUEID=\AXVMENUF|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ISJTUUOB|JUMPERSVISIBLE=TRUE +#$pads{277} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 31.9278 -34.671) + (path /539EEC0F) + (attr smd) + (fp_text reference "R14" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1983 pos:505639(0x7B727) type:2 net:277 +#010000000005000000047C267C300100000000AA000000200C001501FFFF1501FFFFFFFF70AB700502DC56020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 279 "OSC_IN") + ) +#1309 counter:1984 pos:505843(0x7B7F3) type:2 net:226 +#010000000005000000047C267C300100000000AA000000200C00E200FFFF1501FFFFFFFF70AB70051DDA50020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 228 "NetC17_2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#278: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9483mil|Y=3329mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R15|SOURCEUNIQUEID=\QHRQYGCP|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JGGAGRDG|JUMPERSVISIBLE=TRUE +#$pads{278} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 40.9702 -20.0406) + (path /539EEC0F) + (attr smd) + (fp_text reference "R15" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:577 pos:119691(0x1D38B) type:2 net:38 +#010000000005000000047C267C300100000000AA000000010C002600FFFF1601FFFFFFFFA3FEA90510F7FB010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 40 "BOOT0") + ) +#1309 counter:578 pos:119895(0x1D457) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF1601FFFFFFFFBEFCA30510F7FB010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#279: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9641.6535mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R16|SOURCEUNIQUEID=\TVDBRPPW|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JBJBDMVT|JUMPERSVISIBLE=TRUE +#$pads{279} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 44.999999 -7.49999799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R16" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1981 pos:505231(0x7B58F) type:2 net:247 +#010000000005000000047C267C300100000000AA000000200C00F700FFFF1701FFFFFFFF1733BF0501A0AD010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 249 "NetLED4_1") + ) +#1309 counter:1982 pos:505435(0x7B65B) type:2 net:14 +#010000000005000000047C267C300100000000AA000000200C000E00FFFF1701FFFFFFFF1733BF05E6A1B3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 16 "ARM_LED3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#280: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8950.3229mil|Y=4523.9763mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=R17|SOURCEUNIQUEID=\UHUVSCDK|SOURCEHIERARCHICALPATH=rev02_7|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=LBNAKQHE|JUMPERSVISIBLE=TRUE +#$pads{280} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 27.440202 -50.392998) + (path /539EEC0F) + (attr smd) + (fp_text reference "R17" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:575 pos:119283(0x1D1F3) type:2 net:242 +#010000000005000000047C267C300100000000AA000000010C00F200FFFF1801FFFFFFFFF0B65805D34DB2020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 244 "NetIC1_3") + ) +#1309 counter:576 pos:119487(0x1D2BF) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF1801FFFFFFFF0BB55205D34DB2020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#281: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8949.7244mil|Y=4622.6772mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=R18|SOURCEUNIQUEID=\SQGBPEUV|SOURCEHIERARCHICALPATH=rev02_7|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=UJKEOVKI|JUMPERSVISIBLE=TRUE +#$pads{281} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 27.425 -52.900001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R18" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:573 pos:118875(0x1D05B) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF1901FFFFFFFFAA9D5205545DC1020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:574 pos:119079(0x1D127) type:2 net:205 +#010000000005000000047C267C300100000000AA000000010C00CD00FFFF1901FFFFFFFF8F9F5805545DC1020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 207 "KSM_PROM_CS_N") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#282: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9102.622mil|Y=4178.937mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=R19|SOURCEUNIQUEID=\OXLAMTKS|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JHFXXJBJ|JUMPERSVISIBLE=TRUE +#$pads{282} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 31.308599 -41.629) + (path /539EEC0F) + (attr smd) + (fp_text reference "R19" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:571 pos:118467(0x1CEC3) type:2 net:289 +#010000000005000000047C267C300100000000AA000000010C002101FFFF1A01FFFFFFFF39F26905BAA77D020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 291 "RTC_SDA") + ) +#1309 counter:572 pos:118671(0x1CF8F) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF1A01FFFFFFFF1EF46F05BAA77D020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#283: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9078mil|Y=4225mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=R20|SOURCEUNIQUEID=\VJEBVRHS|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=FOIHDNYB|JUMPERSVISIBLE=TRUE +#$pads{283} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 30.6832 -42.799) + (path /539EEC0F) + (attr smd) + (fp_text reference "R20" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:569 pos:118059(0x1CD2B) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF1B01FFFFFFFF52326C0510AF84020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:570 pos:118263(0x1CDF7) type:2 net:288 +#010000000005000000047C267C300100000000AA000000010C002001FFFF1B01FFFFFFFF6D30660510AF84020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 290 "RTC_SCL") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#284: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9078mil|Y=4276mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=R21|SOURCEUNIQUEID=\YNNFUAQH|SOURCEHIERARCHICALPATH=rev02_8|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JYDJJPGF|JUMPERSVISIBLE=TRUE +#$pads{284} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 30.6832 -44.0944) + (path /539EEC0F) + (attr smd) + (fp_text reference "R21" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:567 pos:117651(0x1CB93) type:2 net:287 +#010000000005000000047C267C300100000000AA000000010C001F01FFFF1C01FFFFFFFF6D30660540778C020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 289 "RTC_MFP") + ) +#1309 counter:568 pos:117855(0x1CC5F) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF1C01FFFFFFFF52326C0540778C020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#285: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8669.0394mil|Y=2900.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=R22|SOURCEUNIQUEID=\NAVRWTVD|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=HHOKHUTX|JUMPERSVISIBLE=TRUE +#$pads{285} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 20.295601 -9.153398) + (path /539EEC0F) + (attr smd) + (fp_text reference "R22" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:565 pos:117243(0x1C9FB) type:2 net:189 +#010000000005000000047C267C300100000000AA000000010C00BD00FFFF1D01FFFFFFFF68C92705B48FBA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 191 "FT_REF") + ) +#1309 counter:566 pos:117447(0x1CAC7) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF1D01FFFFFFFF4DCB2D05B48FBA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#286: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8170.0394mil|Y=2830.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=R23|SOURCEUNIQUEID=\UQHITTRJ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=UIIADULL|JUMPERSVISIBLE=TRUE +#$pads{286} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 7.62100100000001 -7.37539799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R23" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:563 pos:116835(0x1C863) type:2 net:197 +#010000000005000000047C267C300100000000AA000000010C00C500FFFF1E01FFFFFFFF2AA6DE0461E0AC010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 199 "FT_VCC3V3") + ) +#1309 counter:564 pos:117039(0x1C92F) type:2 net:191 +#010000000005000000047C267C300100000000AA000000010C00BF00FFFF1E01FFFFFFFF2AA6DE0446E2B2010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 193 "FT_RESET") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#287: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11355.2362mil|Y=2910.0787mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=23|SOURCEDESIGNATOR=R26|SOURCEUNIQUEID=\SEHSRGHN|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=WLDGRWQJ|JUMPERSVISIBLE=TRUE +#$pads{287} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 88.524999 -9.39999899999999) + (path /539EEC0F) + (attr smd) + (fp_text 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smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#288: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11184mil|Y=3478.7401mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=24|SOURCEDESIGNATOR=R27|SOURCEUNIQUEID=\IAPLFHPG|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JOMPPNXI|JUMPERSVISIBLE=TRUE +#$pads{288} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 84.1756 -23.843999) + (path /539EEC0F) + (attr smd) + (fp_text reference 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smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 192 "FT_RESET1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#289: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9708.5827mil|Y=4021.2992mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R30|SOURCEUNIQUEID=\NTCQNNVF|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=WHXPLIJG|JUMPERSVISIBLE=TRUE +#$pads{289} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 46.700001 -37.625) + (path /539EEC0F) + (attr smd) + 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+ (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 4 "3V3_BATT") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#290: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8972.3622mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R31|SOURCEUNIQUEID=\OURRHNRW|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=OXURQQCI|JUMPERSVISIBLE=TRUE +#$pads{290} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 28 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2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=26|SOURCEDESIGNATOR=R32|SOURCEUNIQUEID=\XIYWNOCJ|SOURCEHIERARCHICALPATH=rev02_4|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=TPKREXLK|JUMPERSVISIBLE=TRUE +#$pads{291} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 36.2204 -22.8854) + (path /539EEC0F) + (attr smd) + (fp_text reference "R32" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:555 pos:115203(0x1C203) type:2 net:2 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(at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#292: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10986mil|Y=3557.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=4|SOURCEDESIGNATOR=R33|SOURCEUNIQUEID=\KFYQYRWR|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=QVPJRGIX|JUMPERSVISIBLE=TRUE +#$pads{292} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 79.1464 -25.841198) + (path /539EEC0F) + (attr smd) + (fp_text reference "R33" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 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(net 4 "3V3_BATT") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#294: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10980.2362mil|Y=2830.3543mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=R38|SOURCEUNIQUEID=\LBJHVIJA|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=YVTMEUAD|JUMPERSVISIBLE=TRUE +#$pads{294} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 78.999999 -7.37499899999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R38" (at 0 0) (layer F.SilkS) hide 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0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 254 "NetLED13_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#295: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9415.2755mil|Y=5357.9134mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=R39|SOURCEUNIQUEID=\FXMVOMDL|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=OHXEDFYJ|JUMPERSVISIBLE=TRUE +#$pads{295} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 39.249998 -71.575) + (path /539EEC0F) + (attr smd) + (fp_text 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"2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 130 "FPGA_DONE_INT") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#296: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11185.315mil|Y=5364mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R40|SOURCEUNIQUEID=\HXYLFJYB|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=KTKWCOPQ|JUMPERSVISIBLE=TRUE +#$pads{296} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 84.209001 -71.7296) + (path /539EEC0F) + (attr smd) + (fp_text reference "R40" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:549 pos:113979(0x1BD3B) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF2801FFFFFFFF6BBDA706407B32030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:550 pos:114183(0x1BE07) type:2 net:153 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1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=R41|SOURCEUNIQUEID=\XSWLJSOK|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=TJEBXAMB|JUMPERSVISIBLE=TRUE +#$pads{297} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 35.200001 -67.649999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R41" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:547 pos:113571(0x1BBA3) type:2 net:167 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#298: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11528mil|Y=5379mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R42|SOURCEUNIQUEID=\USCJBBGP|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=BXTXQRPX|JUMPERSVISIBLE=TRUE +#$pads{298} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 92.9132 -72.1106) + (path /539EEC0F) + (attr smd) + (fp_text reference "R42" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:545 pos:113163(0x1BA0B) type:2 net:154 +#010000000005000000047C267C300100000000AA000000010C009A00FFFF2A01FFFFFFFF8D07DC0630C534030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 156 "FPGA_INIT_B") + ) +#1309 counter:546 pos:113367(0x1BAD7) type:2 net:5 +#010000000005000000047C267C300100000000AA000000010C000500FFFF2A01FFFFFFFF7209E20630C534030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#299: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11584mil|Y=5233mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R43|SOURCEUNIQUEID=\JNTNAIRU|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=CJOCTSFI|JUMPERSVISIBLE=TRUE +#$pads{299} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.3356 -68.4022) + (path /539EEC0F) + (attr smd) + (fp_text reference "R43" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:543 pos:112755(0x1B873) type:2 net:160 +#010000000005000000047C267C300100000000AA000000010C00A000FFFF2B01FFFFFFFFF294EA06107E1E030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 162 "FPGA_JTAG_TDI") + ) +#1309 counter:544 pos:112959(0x1B93F) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF2B01FFFFFFFF0D93E406107E1E030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#300: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11583mil|Y=5133mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R44|SOURCEUNIQUEID=\PYDNWLMV|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=WTVKNAOV|JUMPERSVISIBLE=TRUE +#$pads{300} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.3102 -65.8622) + (path /539EEC0F) + (attr smd) + (fp_text reference "R44" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:541 pos:112347(0x1B6DB) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF2C01FFFFFFFFFD6BE406D03B0F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:542 pos:112551(0x1B7A7) type:2 net:162 +#010000000005000000047C267C300100000000AA000000010C00A200FFFF2C01FFFFFFFFE26DEA06D03B0F030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 164 "FPGA_JTAG_TMS") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#301: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11583mil|Y=5034mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R45|SOURCEUNIQUEID=\BOXFRSJH|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=AFYWQSTP|JUMPERSVISIBLE=TRUE +#$pads{301} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 94.3102 -63.3476) + (path /539EEC0F) + (attr smd) + (fp_text reference "R45" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:539 pos:111939(0x1B543) type:2 net:159 +#010000000005000000047C267C300100000000AA000000010C009F00FFFF2D01FFFFFFFFE26DEA06A02000030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 161 "FPGA_JTAG_TCK") + ) +#1309 counter:540 pos:112143(0x1B60F) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF2D01FFFFFFFFFD6BE406A02000030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#302: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8377.874mil|Y=3832.3228mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R46|SOURCEUNIQUEID=\WEHUBXOQ|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=PHVNOSMT|JUMPERSVISIBLE=TRUE +#$pads{302} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 12.9 -32.824999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R46" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:537 pos:111531(0x1B3AB) type:2 net:301 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#303: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8376.8898mil|Y=3664.0157mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R47|SOURCEUNIQUEID=\JINPGWNB|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=UVDSHSEH|JUMPERSVISIBLE=TRUE +#$pads{303} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 12.875001 -28.549999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R47" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer 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B.Mask B.Paste) (net 262 "NetQ5_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#305: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8381.811mil|Y=3492.7559mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R50|SOURCEUNIQUEID=\AJEHVBJN|SOURCEHIERARCHICALPATH=rev02_15|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=IYCHTOBY|JUMPERSVISIBLE=TRUE +#$pads{305} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 12.999999 -24.2) + (path /539EEC0F) + (attr smd) + (fp_text reference "R50" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 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0.5999988) + (layers F.Cu F.Mask F.Paste) (net 170 "FPGA_PROM_CS_N") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#307: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9257mil|Y=5367mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R52|SOURCEUNIQUEID=\YOTJPEPB|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=PWBRFWST|JUMPERSVISIBLE=TRUE +#$pads{307} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 35.2298 -71.8058) + (path /539EEC0F) + (attr smd) + (fp_text reference "R52" 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0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#313: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8475mil|Y=4010mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=R58|SOURCEUNIQUEID=\VNJYFHSD|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FSIBEQJH|JUMPERSVISIBLE=TRUE +#$pads{313} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 15.367 -37.338) + (path /539EEC0F) + (attr smd) + (fp_text reference "R58" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1959 pos:500743(0x7A407) type:2 net:238 +#010000000005000000047C267C300100000000AA000000200C00EE00FFFF3901FFFFFFFFB02E0D0592E166020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 240 "NetC118_2") + ) +#1309 counter:1960 pos:500947(0x7A4D3) type:2 net:237 +#010000000005000000047C267C300100000000AA000000200C00ED00FFFF3901FFFFFFFFB02E0D05ADDF60020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 239 "NetC118_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#314: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8450mil|Y=4097mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=17|SOURCEDESIGNATOR=R59|SOURCEUNIQUEID=\RPFTUREA|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=UFPUKHUF|JUMPERSVISIBLE=TRUE +#$pads{314} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 14.732 -39.5478) + (path /539EEC0F) + (attr smd) + (fp_text reference "R59" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1957 pos:500335(0x7A26F) type:2 net:238 +#010000000005000000047C267C300100000000AA000000200C00EE00FFFF3A01FFFFFFFF205E09051D266E020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 240 "NetC118_2") + ) +#1309 counter:1958 pos:500539(0x7A33B) type:2 net:5 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3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=18|SOURCEDESIGNATOR=R60|SOURCEUNIQUEID=\FRAVEMPY|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=SVBXIYGX|JUMPERSVISIBLE=TRUE +#$pads{315} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 36.6 -81.475001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R60" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1955 pos:499927(0x7A0D7) type:2 net:5 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0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#316: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8245mil|Y=3952mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=19|SOURCEDESIGNATOR=R61|SOURCEUNIQUEID=\JRGYMDHF|SOURCEHIERARCHICALPATH=rev02_18|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=EFOFTKNJ|JUMPERSVISIBLE=TRUE +#$pads{316} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 9.52500000000001 -35.8648) + (path /539EEC0F) + (attr smd) + (fp_text reference "R61" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1953 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#317: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11185.315mil|Y=5419mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R62|SOURCEUNIQUEID=\WHHCXYRO|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=BLRXDOTU|JUMPERSVISIBLE=TRUE +#$pads{317} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 84.209001 -73.1266) + (path /539EEC0F) + (attr smd) + (fp_text reference "R62" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:529 pos:109899(0x1AD4B) type:2 net:153 +#010000000005000000047C267C300100000000AA000000010C009900FFFF3D01FFFFFFFF50BFAD06B0DF3A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 155 "FPGA_INIT_B_INT") + ) +#1309 counter:530 pos:110103(0x1AE17) type:2 net:152 +#010000000005000000047C267C300100000000AA000000010C009800FFFF3D01FFFFFFFF6BBDA706B0DF3A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 154 "FPGA_INIT_B_INT1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#318: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9335.5512mil|Y=5203.3858mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=R63|SOURCEUNIQUEID=\CBSLHEIR|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=VXYSITMO|JUMPERSVISIBLE=TRUE +#$pads{318} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 37.225 -67.649999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R63" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:527 pos:109491(0x1ABB3) type:2 net:166 +#010000000005000000047C267C300100000000AA000000010C00A600FFFF3E01FFFFFFFFEB7E930542F919030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 168 "FPGA_PROGRAM_B1") + ) +#1309 counter:528 pos:109695(0x1AC7F) type:2 net:167 +#010000000005000000047C267C300100000000AA000000010C00A700FFFF3E01FFFFFFFF067D8D0542F919030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 169 "FPGA_PROGRAM_B") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#319: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11058.9764mil|Y=2815.5906mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=6|SOURCEDESIGNATOR=R64|SOURCEUNIQUEID=\GGDHHOSC|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=LJFQFSLY|JUMPERSVISIBLE=TRUE +#$pads{319} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 81.000001 -7.000001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R64" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1951 pos:499111(0x79DA7) type:2 net:254 +#010000000005000000047C267C300100000000AA000000200C00FE00FFFF3F01FFFFFFFF44779706109FAA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 256 "NetLED15_1") + ) +#1309 counter:1952 pos:499315(0x79E73) type:2 net:149 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2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=0|SOURCEDESIGNATOR=R65|SOURCEUNIQUEID=\VVYWIALL|SOURCEHIERARCHICALPATH=rev02_20|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=WCDNIKSX|JUMPERSVISIBLE=TRUE +#$pads{320} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 44.699999 -61.349999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R65" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:525 pos:109083(0x1AA1B) type:2 net:301 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+ (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#321: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8739mil|Y=5016mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=R66|SOURCEUNIQUEID=\QLOUVGLX|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JRVSQPBJ|JUMPERSVISIBLE=TRUE +#$pads{321} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 22.0726 -62.8904) + (path /539EEC0F) + (attr smd) + (fp_text reference "R66" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1949 pos:498703(0x79C0F) type:2 net:272 +#010000000005000000047C267C300100000000AA000000200C001001FFFF4101FFFFFFFF3E7632058061FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 274 "NetR66_1") + ) +#1309 counter:1950 pos:498907(0x79CDB) type:2 net:300 +#010000000005000000047C267C300100000000AA000000200C002C01FFFF4101FFFFFFFF237838058061FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 302 "VCC_5V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#322: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9024mil|Y=5016mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R67|SOURCEUNIQUEID=\RRYKBJJE|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FYMDQJTK|JUMPERSVISIBLE=TRUE +#$pads{322} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 29.3116 -62.8904) + (path /539EEC0F) + (attr smd) + (fp_text reference "R67" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1947 pos:498295(0x79A77) type:2 net:240 +#010000000005000000047C267C300100000000AA000000200C00F000FFFF4201FFFFFFFFF3F463058061FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1") + ) +#1309 counter:1948 pos:498499(0x79B43) type:2 net:273 +#010000000005000000047C267C300100000000AA000000200C001101FFFF4201FFFFFFFF0EF35D058061FD020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 275 "NetR67_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#323: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8930mil|Y=5082mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=R68|SOURCEUNIQUEID=\EGQMXVBQ|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=ALUMTHGN|JUMPERSVISIBLE=TRUE +#$pads{323} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 26.924 -64.5668) + (path /539EEC0F) + (attr smd) + (fp_text reference "R68" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1945 pos:497887(0x798DF) type:2 net:241 +#010000000005000000047C267C300100000000AA000000200C00F100FFFF4301FFFFFFFF2E9B4F05A07307030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 243 "NetC208_2") + ) +#1309 counter:1946 pos:498091(0x799AB) type:2 net:240 +#010000000005000000047C267C300100000000AA000000200C00F000FFFF4301FFFFFFFF139D5505A07307030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#324: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8834mil|Y=5082mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R69|SOURCEUNIQUEID=\XRUUPPTT|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=NPWAUOBG|JUMPERSVISIBLE=TRUE +#$pads{324} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 24.4856 -64.5668) + (path /539EEC0F) + (attr smd) + (fp_text reference "R69" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1943 pos:497479(0x79747) type:2 net:241 +#010000000005000000047C267C300100000000AA000000200C00F100FFFF4401FFFFFFFF13F74605A07307030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 243 "NetC208_2") + ) +#1309 counter:1944 pos:497683(0x79813) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4401FFFFFFFF2EF54005A07307030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#325: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9063mil|Y=5082mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R70|SOURCEUNIQUEID=\HTLCFWKG|SOURCEHIERARCHICALPATH=rev02_24|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=FBCJSVNB|JUMPERSVISIBLE=TRUE +#$pads{325} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 30.3022 -64.5668) + (path /539EEC0F) + (attr smd) + (fp_text reference "R70" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1941 pos:497071(0x795AF) type:2 net:5 +#010000000005000000047C267C300100000000AA000000200C000500FFFF4501FFFFFFFF62E86905A07307030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 7 "GND") + ) +#1309 counter:1942 pos:497275(0x7967B) type:2 net:240 +#010000000005000000047C267C300100000000AA000000200C00F000FFFF4501FFFFFFFF7DE66305A07307030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 242 "NetC208_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#326: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9337.5197mil|Y=5257.5197mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=R71|SOURCEUNIQUEID=\JIEWBCRX|SOURCEHIERARCHICALPATH=rev02_13|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=FALSE|FLIPPINGCHANGED=TRUE|UNIQUEID=BQSBUYDP|JUMPERSVISIBLE=TRUE +#$pads{326} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 37.275 -69.025) + (path /539EEC0F) + (attr smd) + (fp_text reference "R71" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:523 pos:108675(0x1A883) type:2 net:126 +#010000000005000000047C267C300100000000AA000000010C007E00FFFF4601FFFFFFFFD0CB9305DD3B22030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 128 "FPGA_CFG_SCLK1") + ) +#1309 counter:524 pos:108879(0x1A94F) type:2 net:127 +#010000000005000000047C267C300100000000AA000000010C007F00FFFF4601FFFFFFFFEBC98D05DD3B22030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 129 "FPGA_CFG_SCLK") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#327: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8570mil|Y=5024.0001mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R72|SOURCEUNIQUEID=\CWDEVVHF|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=HCESQLWH|JUMPERSVISIBLE=TRUE +#$pads{327} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 17.78 -63.093603) + (path /539EEC0F) + (attr smd) + (fp_text reference "R72" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:521 pos:108267(0x1A6EB) type:2 net:300 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#328: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8303mil|Y=4515mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=R73|SOURCEUNIQUEID=\FUMQCXAW|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=JRPHRSCD|JUMPERSVISIBLE=TRUE +#$pads{328} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 10.9982 -50.165) + (path /539EEC0F) + (attr smd) + (fp_text reference "R73" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:519 pos:107859(0x1A553) type:2 net:300 +#010000000005000000047C267C300100000000AA000000010C002C01FFFF4801FFFFFFFFE3F0F50430EFB0020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0") + ) +#1309 counter:520 pos:108063(0x1A61F) type:2 net:279 +#010000000005000000047C267C300100000000AA000000010C001701FFFF4801FFFFFFFFFEEEEF0430EFB0020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 281 "POK_VCCAUX") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#329: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8322.7559mil|Y=4299.8425mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=10|SOURCEDESIGNATOR=R74|SOURCEUNIQUEID=\IQWADQTB|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=UNGCFJVU|JUMPERSVISIBLE=TRUE +#$pads{329} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 11.5 -44.699999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R74" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:517 pos:107451(0x1A3BB) type:2 net:279 +#010000000005000000047C267C300100000000AA000000010C001701FFFF4901FFFFFFFFB5F2F204991A90020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 281 "POK_VCCAUX") + ) +#1309 counter:518 pos:107655(0x1A487) type:2 net:285 +#010000000005000000047C267C300100000000AA000000010C001D01FFFF4901FFFFFFFF9AF4F804991A90020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 287 "PWR_ENA_VCCO") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#330: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9225mil|Y=5310mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=11|SOURCEDESIGNATOR=R75|SOURCEUNIQUEID=\BSEBXVBC|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=GBIHSBUL|JUMPERSVISIBLE=TRUE +#$pads{330} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 34.417 -70.358) + (path /539EEC0F) + (attr smd) + (fp_text reference "R75" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:515 pos:107043(0x1A223) type:2 net:300 +#010000000005000000047C267C300100000000AA000000010C002C01FFFF4A01FFFFFFFF83A08205E03D2A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0") + ) +#1309 counter:516 pos:107247(0x1A2EF) type:2 net:280 +#010000000005000000047C267C300100000000AA000000010C001801FFFF4A01FFFFFFFF9E9E7C05E03D2A030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#331: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9148.5433mil|Y=5517.3622mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=12|SOURCEDESIGNATOR=R76|SOURCEUNIQUEID=\KKYTTUBF|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 1%|UNIQUEID=LSJXNDYB|JUMPERSVISIBLE=TRUE +#$pads{331} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 32.475 -75.625) + (path /539EEC0F) + (attr smd) + (fp_text reference "R76" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:513 pos:106635(0x1A08B) type:2 net:280 +#010000000005000000047C267C300100000000AA000000010C001801FFFF4B01FFFFFFFFEBF57605F6E149030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 282 "POK_VCCINT") + ) +#1309 counter:514 pos:106839(0x1A157) type:2 net:283 +#010000000005000000047C267C300100000000AA000000010C001B01FFFF4B01FFFFFFFF06F47005F6E149030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 285 "PWR_ENA_VCCAUX") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#332: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8380.6772mil|Y=4199.7087mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R77|SOURCEUNIQUEID=\WTTIQWXB|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=LCIUXKJV|JUMPERSVISIBLE=TRUE +#$pads{332} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 12.971201 -42.156601) + (path /539EEC0F) + (attr smd) + (fp_text reference "R77" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:511 pos:106227(0x19EF3) type:2 net:300 +#010000000005000000047C267C300100000000AA000000010C002C01FFFF4C01FFFFFFFF34CAFE042CD27D020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0") + ) +#1309 counter:512 pos:106431(0x19FBF) type:2 net:281 +#010000000005000000047C267C300100000000AA000000010C001901FFFF4C01FFFFFFFF34CAFE0411D483020DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 283 "POK_VCCO") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#333: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11153.4646mil|Y=2728.9764mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R78|SOURCEUNIQUEID=\WQKKKFSW|SOURCEHIERARCHICALPATH=rev02_25|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=RKXEYKCR|JUMPERSVISIBLE=TRUE +#$pads{333} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 83.400001 -4.80000099999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R78" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:509 pos:105819(0x19D5B) type:2 net:257 +#010000000005000000047C267C300100000000AA000000010C000101FFFF4D01FFFFFFFF44E1A206A468A0010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 259 "NetLED18_1") + ) +#1309 counter:510 pos:106023(0x19E27) type:2 net:300 +#010000000005000000047C267C300100000000AA000000010C002C01FFFF4D01FFFFFFFF29E3A806A468A0010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 302 "VCC_5V0") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#334: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10875mil|Y=3557.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=R80|SOURCEUNIQUEID=\ERRQQWNE|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=VYXTBHNL|JUMPERSVISIBLE=TRUE +#$pads{334} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 76.327 -25.841198) + (path /539EEC0F) + (attr smd) + (fp_text reference "R80" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1939 pos:496663(0x79417) type:2 net:2 +#010000000005000000047C267C300100000000AA000000200C000200FFFF4E01FFFFFFFFA3657E06C4CF1E020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 4 "3V3_BATT") + ) +#1309 counter:1940 pos:496867(0x794E3) type:2 net:213 +#010000000005000000047C267C300100000000AA000000200C00D500FFFF4E01FFFFFFFFBE637806C4CF1E020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 215 "MKM_CONTROL_AVR_ENA") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#335: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10593.4252mil|Y=3923.8583mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R81|SOURCEUNIQUEID=\FRKKSKYA|SOURCEHIERARCHICALPATH=rev02_12|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MKBPAQIE|JUMPERSVISIBLE=TRUE +#$pads{335} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 69.175 -35.150001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R81" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1937 pos:496255(0x7927F) type:2 net:214 +#010000000005000000047C267C300100000000AA000000200C00D600FFFF4F01FFFFFFFF9E6E5306B7BB56020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 216 "MKM_CONTROL_FPGA_DIS") + ) +#1309 counter:1938 pos:496459(0x7934B) type:2 net:5 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3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R82|SOURCEUNIQUEID=\FIRAUOXY|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=RHHFAERO|JUMPERSVISIBLE=TRUE +#$pads{336} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 70.2056 -36.229798) + (path /539EEC0F) + (attr smd) + (fp_text reference "R82" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1935 pos:495847(0x790E7) type:2 net:2 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0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#337: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9332.5984mil|Y=5138.4252mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=1|SOURCEDESIGNATOR=R83|SOURCEUNIQUEID=\KFGLIMFW|SOURCEHIERARCHICALPATH=rev02_20|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=DNRHMEEQ|JUMPERSVISIBLE=TRUE +#$pads{337} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 37.149999 -66) + (path /539EEC0F) + (attr smd) + (fp_text reference "R83" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:507 pos:105411(0x19BC3) type:2 net:125 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#338: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9332.5984mil|Y=5081.7586mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=2|SOURCEDESIGNATOR=R84|SOURCEUNIQUEID=\CYSJVWIS|SOURCEHIERARCHICALPATH=rev02_20|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=GWDEWYAF|JUMPERSVISIBLE=TRUE +#$pads{338} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 37.149999 -64.560668) + (path /539EEC0F) + (attr smd) + (fp_text reference "R84" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:505 pos:105003(0x19A2B) type:2 net:122 +#010000000005000000047C267C300100000000AA000000010C007A00FFFF5201FFFFFFFF930B9305326A07030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 124 "FPGA_CFG_MISO1") + ) +#1309 counter:506 pos:105207(0x19AF7) type:2 net:123 +#010000000005000000047C267C300100000000AA000000010C007B00FFFF5201FFFFFFFFAE098D05326A07030DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 -0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 125 "FPGA_CFG_MISO") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#339: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9332.5984mil|Y=5022.2835mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=3|SOURCEDESIGNATOR=R85|SOURCEUNIQUEID=\TONFTCKK|SOURCEHIERARCHICALPATH=rev02_20|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0603|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=DCAKXCHI|JUMPERSVISIBLE=TRUE +#$pads{339} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 37.149999 -63.050001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R85" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:503 pos:104595(0x19893) type:2 net:119 +#010000000005000000047C267C300100000000AA000000010C007700FFFF5301FFFFFFFFAE098D05F356FE020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 121 "FPGA_CFG_CS_N") + ) +#1309 counter:504 pos:104799(0x1995F) type:2 net:118 +#010000000005000000047C267C300100000000AA000000010C007600FFFF5301FFFFFFFF930B9305F356FE020DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 120 "FPGA_CFG_CS_N1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#340: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8529.5394mil|Y=3179.3701mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=27|SOURCEDESIGNATOR=R86|SOURCEUNIQUEID=\LGNIISVQ|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=UCDXFBNH|JUMPERSVISIBLE=TRUE +#$pads{340} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 16.752301 -16.240001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R86" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:501 pos:104187(0x196FB) type:2 net:195 +#010000000005000000047C267C300100000000AA000000010C00C300FFFF5401FFFFFFFF228115053221E2010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 197 "FT_TXD1") + ) +#1309 counter:502 pos:104391(0x197C7) type:2 net:196 +#010000000005000000047C267C300100000000AA000000010C00C400FFFF5401FFFFFFFF228115051723E8010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 198 "FT_TXD") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#341: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8480.0394mil|Y=3179.3701mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 2.70000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=28|SOURCEDESIGNATOR=R87|SOURCEUNIQUEID=\ULGBWCWU|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=KYKBTAXW|JUMPERSVISIBLE=TRUE +#$pads{341} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 15.495001 -16.240001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R87" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:499 pos:103779(0x19563) type:2 net:194 +#010000000005000000047C267C300100000000AA000000010C00C200FFFF5501FFFFFFFF8AF30D051723E8010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 -0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 196 "FT_RXD") + ) +#1309 counter:500 pos:103983(0x1962F) type:2 net:193 +#010000000005000000047C267C300100000000AA000000010C00C100FFFF5501FFFFFFFF8AF30D053221E2010DB40200BC9A03000DB40200BC9A03000DB40200BC9A0300000000000202020000000000E070400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 0.50000 270) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 195 "FT_RXD1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#342: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11516.0001mil|Y=3135.7401mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=27|SOURCEDESIGNATOR=R88|SOURCEUNIQUEID=\EUPIIQMN|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=OVWFUIDV|JUMPERSVISIBLE=TRUE +#$pads{342} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 92.608403 -15.131799) + (path /539EEC0F) + (attr smd) + (fp_text reference "R88" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:497 pos:103371(0x193CB) type:2 net:182 +#010000000005000000047C267C300100000000AA000000010C00B600FFFF5601FFFFFFFFCE32DA06D979DE010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 184 "FT_MGMT_TXD1") + ) +#1309 counter:498 pos:103575(0x19497) type:2 net:183 +#010000000005000000047C267C300100000000AA000000010C00B700FFFF5601FFFFFFFFB334E006D979DE010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008066400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at 0.50000 0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 185 "FT_MGMT_TXD") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#343: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11516.0001mil|Y=3193.7401mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 1.80000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=28|SOURCEDESIGNATOR=R89|SOURCEUNIQUEID=\GPFFAIEB|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=QJQTFYLW|JUMPERSVISIBLE=TRUE +#$pads{343} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 92.608403 -16.604999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R89" (at 0 0) (layer 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0.00000 180) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 182 "FT_MGMT_RXD1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + + ) +#Components#344: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=11516mil|Y=3076.7401mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 3.60000000000000E+0002|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=29|SOURCEDESIGNATOR=R90|SOURCEUNIQUEID=\ILKIVIXK|SOURCEHIERARCHICALPATH=rev02_10|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=LCAJOKUS|JUMPERSVISIBLE=TRUE +#$pads{344} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 92.6084 -13.633199) + (path /539EEC0F) + (attr smd) + (fp_text reference "R90" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:493 pos:102555(0x1909B) type:2 net:183 +#010000000005000000047C267C300100000000AA000000010C00B700FFFF5801FFFFFFFFB334E0062979D5010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at 0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 185 "FT_MGMT_TXD") + ) +#1309 counter:494 pos:102759(0x19167) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF5801FFFFFFFFCE32DA062979D5010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000000000000100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.50000 0.00000) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 360)) + ) + + ) +#Components#345: |SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8579.0394mil|Y=3179.37mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=29|SOURCEDESIGNATOR=R91|SOURCEUNIQUEID=\LYQVLVGE|SOURCEHIERARCHICALPATH=rev02_9|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|UNIQUEID=HUKGWUJO|JUMPERSVISIBLE=TRUE +#$pads{345} + (module "R_0402" (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 18.009601 -16.239998) + (path /539EEC0F) + (attr smd) + (fp_text reference "R91" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:491 pos:102147(0x18F03) type:2 net:301 +#010000000005000000047C267C300100000000AA000000010C002D01FFFF5901FFFFFFFFBA0E1D053221E2010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 303 "VCCO_3V3") + ) +#1309 counter:492 pos:102351(0x18FCF) type:2 net:196 +#010000000005000000047C267C300100000000AA000000010C00C400FFFF5901FFFFFFFFBA0E1D051723E8010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000010000010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers F.Cu F.Mask F.Paste) (net 198 "FT_TXD") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#346: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9720.3936mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=13|SOURCEDESIGNATOR=R92|SOURCEUNIQUEID=\GVDYEFOE|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=YNSGLOCY|JUMPERSVISIBLE=TRUE +#$pads{346} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 46.999997 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+ (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#348: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9562.9133mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=R94|SOURCEUNIQUEID=\DXOGUFNY|SOURCEHIERARCHICALPATH=rev02_3|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=DXYQCVFP|JUMPERSVISIBLE=TRUE +#$pads{348} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 42.999998 -7.49999799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R94" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#349: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=9051.1024mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=14|SOURCEDESIGNATOR=R95|SOURCEUNIQUEID=\RSFRAQVH|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MIYDIYEG|JUMPERSVISIBLE=TRUE +#$pads{349} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 30.000001 -7.49999799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R95" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1927 pos:494215(0x78A87) type:2 net:248 +#010000000005000000047C267C300100000000AA000000200C00F800FFFF5D01FFFFFFFFB016650501A0AD010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 250 "NetLED9_1") + ) +#1309 counter:1928 pos:494419(0x78B53) type:2 net:33 +#010000000005000000047C267C300100000000AA000000200C002100FFFF5D01FFFFFFFFB0166505E6A1B3010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at 0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 35 "AVR_LED2") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#350: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8814.8819mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=15|SOURCEDESIGNATOR=R96|SOURCEUNIQUEID=\OKQTOVVE|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=AXUUPANC|JUMPERSVISIBLE=TRUE +#$pads{350} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 24 -7.49999799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R96" (at 0 0) (layer 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90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 252 "NetLED11_1") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#351: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=8893.6221mil|Y=2835.2755mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=16|SOURCEDESIGNATOR=R97|SOURCEUNIQUEID=\PWTBQUHW|SOURCEHIERARCHICALPATH=rev02_11|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=MVANMSPH|JUMPERSVISIBLE=TRUE +#$pads{351} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 26.000001 -7.49999799999999) + (path /539EEC0F) + (attr smd) + (fp_text reference "R97" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1923 pos:493399(0x78757) type:2 net:249 +#010000000005000000047C267C300100000000AA000000200C00F900FFFF5F01FFFFFFFF1D0F4D0501A0AD010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at 0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 251 "NetLED10_1") + ) +#1309 counter:1924 pos:493603(0x78823) type:2 net:35 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9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=7|SOURCEDESIGNATOR=R98|SOURCEUNIQUEID=\UPQTUJVL|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=TLTDRVSS|JUMPERSVISIBLE=TRUE +#$pads{352} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 78.999999 -7.000001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R98" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1921 pos:492991(0x785BF) type:2 net:150 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"/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#353: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10901.4961mil|Y=2815.5906mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=8|SOURCEDESIGNATOR=R99|SOURCEUNIQUEID=\BYOEOKRC|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=LNPRFJDA|JUMPERSVISIBLE=TRUE +#$pads{353} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 77.000001 -7.000001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R99" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.05))) + ) + + #1309 counter:1919 pos:492583(0x78427) type:2 net:253 +#010000000005000000047C267C300100000000AA000000200C00FD00FFFF6101FFFFFFFFB16F7F06109FAA010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "1" smd rect (at -0.00000 0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 255 "NetLED14_1") + ) +#1309 counter:1920 pos:492787(0x784F3) type:2 net:151 +#010000000005000000047C267C300100000000AA000000200C009700FFFF6101FFFFFFFFB16F7F06F5A0B0010DB40200BC9A03000DB40200BC9A03000DB40200BC9A03000000000002020200000000008056400100000000000000F200030004007980010079800100798001007CC2FFFFE54C00000000000101010102020100000000000000000000FFFF00010000 + (pad "2" smd rect (at -0.00000 -0.50000 90) (size 0.4499991 0.5999988) + (layers B.Cu B.Mask B.Paste) (net 153 "FPGA_GPIO_LED_3") + ) +#1365 + (model "/home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl" + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + + ) +#Components#354: |SELECTION=FALSE|LAYER=BOTTOM|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|PRIMITIVELOCK=TRUE|X=10822.7559mil|Y=2815.5906mil|PATTERN=R_0402|NAMEON=TRUE|COMMENTON=FALSE|GROUPNUM=0|COUNT=0|ROTATION= 9.00000000000000E+0001|COMMENTAUTOPOSITION=3|UNIONINDEX=0|CHANNELOFFSET=9|SOURCEDESIGNATOR=R100|SOURCEUNIQUEID=\BDKMEVMJ|SOURCEHIERARCHICALPATH=rev02_19|SOURCEFOOTPRINTLIBRARY=Components.PcbLib|SOURCECOMPONENTLIBRARY=resistor.IntLib|SOURCELIBREFERENCE=R-EU_R0402|SOURCEDESCRIPTION=0402 Resistor 5%|FLIPPED=TRUE|FLIPPINGCHANGED=TRUE|UNIQUEID=JKAPAYIP|JUMPERSVISIBLE=TRUE +#$pads{354} + (module "R_0402" (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF) + (at 75 -7.000001) + (path /539EEC0F) + (attr smd) + (fp_text reference "R100" (at 0 0) (layer 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10 f +S -484 -275 -451 -275 0 1 10 f +S -407 -275 -374 -275 0 1 10 f +S -88 -275 -88 -275 0 1 10 f +S -11 -275 -11 -275 0 1 10 f +S 66 -275 66 -275 0 1 10 f +S 308 -275 308 -275 0 1 10 f +S 385 -275 385 -275 0 1 10 f +S 462 -275 462 -275 0 1 10 f +S -242 -275 -209 -275 0 1 10 f +S -484 -275 -462 -275 0 1 10 f +S -396 -275 -374 -275 0 1 10 f +S -231 -275 -209 -275 0 1 10 f +S -319 -275 -297 -275 0 1 10 f +S -473 -275 -462 -275 0 1 10 f +S -308 -275 -297 -275 0 1 10 f +S -396 -275 -385 -275 0 1 10 f +S -231 -275 -220 -275 0 1 10 f +S -121 -275 -110 -264 0 1 10 f +S 165 -275 176 -264 0 1 10 f +S -121 -264 -110 -264 0 1 10 f +S 165 -264 176 -264 0 1 10 f +S -121 -264 -110 -253 0 1 10 f +S 165 -264 176 -253 0 1 10 f +S -121 -253 -110 -253 0 1 10 f +S 165 -253 176 -253 0 1 10 f +S -110 -253 -110 -253 0 1 10 f +S 176 -253 176 -253 0 1 10 f +P 34 0 1 20 66 -165 88 -154 143 -198 187 -154 143 -99 165 -44 242 -33 242 22 165 33 143 88 187 143 143 187 88 143 33 165 22 242 -33 242 -44 165 -99 143 -154 187 -198 143 -154 88 -176 33 -253 22 -253 -33 -176 -44 -154 -99 -198 -154 -154 -198 -99 -154 -66 -165 -33 -77 -88 0 22 -77 66 -165 F +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_00.sch b/rev03-KiCad/rev02_00.sch new file mode 100644 index 0000000..fdd702b --- /dev/null +++ b/rev03-KiCad/rev02_00.sch @@ -0,0 +1,53 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 2 27 +Title "rev02_00" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 1650 7150 0 168 ~ 12 +This document contains the electrical schematics for the Crypthech Alpha board.\nThe latest version of these schematics can be found here:\nhttps://wiki.cryptech.is/browser/hardware/eagle/alpha\nFor more information about the Alpha board including functionality, goals\nand block diagram, please see:\nhttps://wiki.cryptech.is/wiki/AlphaBoardStrategy\nFor more information about the Cryptech project, please see:\nhttps://cryptech.is/ +$Comp +L OSHW-LOGOL-COPPER IC0 +U 1 1 580240DE + 1 13024 10252 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_01-cache.lib b/rev03-KiCad/rev02_01-cache.lib new file mode 100644 index 0000000..c126eca --- /dev/null +++ b/rev03-KiCad/rev02_01-cache.lib @@ -0,0 +1,242 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# PWR_18V +# +DEF PWR_18V #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "PWR_18V" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X PWR_18V 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# 15V_STABLE +# +DEF 15V_STABLE #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "15V_STABLE" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X 15V_STABLE 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# 2N7002 +# +DEF 2N7002 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "2N7002" -220 165 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -55 -110 -110 -110 +P 2 0 1 10 0 0 0 33 +P 2 0 1 10 0 -33 0 0 +P 2 0 1 10 0 55 0 154 +P 2 0 1 10 22 0 77 22 +P 2 0 1 10 22 0 77 -33 +P 2 0 1 10 22 0 0 0 +P 2 0 1 10 110 0 22 0 +P 2 0 1 10 110 -110 110 0 +P 2 0 1 10 0 -165 0 -66 +P 2 0 1 10 -55 -110 -55 110 +X D 3 220 110 220 L 1 1 0 1 P +X S 2 220 -110 220 L 1 1 0 1 P +X G 1 -220 -110 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" 110 0 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S 88 -66 -88 -88 0 1 10 f +S 88 -22 -88 -44 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +ENDDRAW +ENDDEF +# +# C-EUC0603 +# +DEF C-EUC0603 IC 0 40 Y Y 1 F N +F0 "C" 110 -110 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC1210 +# +DEF C-EUC1210 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# CP_E-035X080 +# +DEF CP_E-035X080 IC 0 40 Y Y 1 F N +F0 "C" 132 22 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 0 22 0 +P 2 0 1 10 22 0 22 77 +P 2 0 1 10 22 -66 22 0 +P 2 0 1 10 -22 0 -22 0 +P 2 0 1 10 -110 0 -22 0 +A -132 11 99 -382 -4 1 1 20 N -54 -50 -33 10 +A -132 0 99 0 374 1 1 20 N -33 0 -53 60 +X - 2 -121 0 11 R 1 1 0 1 P +X + 1 121 0 11 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# JP1Q +# +DEF JP1Q IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 165 0 110 +P 2 0 1 10 0 220 0 165 +P 2 0 1 10 0 -165 0 -110 +P 2 0 1 10 0 -220 0 -165 +P 2 0 1 10 77 220 -88 220 +P 2 0 1 10 77 -220 77 220 +P 2 0 1 10 -88 -220 77 -220 +P 2 0 1 10 -88 220 -88 -220 +X 1 1 0 -330 110 U 70 1 0 1 P +X 2 2 0 330 110 D 70 1 0 1 P +ENDDRAW +ENDDEF +# +# LMZ13608 +# +DEF LMZ13608 IC 0 40 Y Y 1 F N +F0 "U" -781 1001 60 H V L BNN +F1 "LMZ13608" -550 990 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 770 990 -770 990 +P 2 0 1 10 770 -990 770 990 +P 2 0 1 10 -770 -990 770 -990 +P 2 0 1 10 -770 990 -770 -990 +X EN 4 -990 110 220 R 70 70 0 1 P +X AGND 3 110 -1210 220 U 70 70 0 1 W +X PGND TP1 -110 -1210 220 U 70 70 0 1 W +X FB 7 990 -110 220 L 70 70 0 1 P +X SS/TRK 8 -990 -770 220 R 70 70 0 1 P +X NC 9 990 -770 220 L 70 70 0 1 P +X VOUT 10 990 770 220 L 70 70 0 1 W +X VIN 1 -990 770 220 R 70 70 0 1 W +X VIN 2 -990 660 220 R 70 70 0 1 W +X VOUT 11 990 660 220 L 70 70 0 1 W +X AGND 5 220 -1210 220 U 70 70 0 1 W +X AGND 6 330 -1210 220 U 70 70 0 1 W +ENDDRAW +ENDDEF +# +# LT3060ITS8-15 +# +DEF LT3060ITS8-15 IC 0 40 Y Y 1 F N +F0 "U" -451 451 60 H V L BNN +F1 "LT3060ITS8-15" -451 -781 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +X REF/BYP 8 660 -330 220 L 70 70 0 1 P +X ADJ 7 660 0 220 L 70 70 0 1 P +X OUT 6 660 330 220 L 70 70 0 1 W +X IN 5 -660 330 220 R 70 70 0 1 W +X ~SHDN 1 -660 0 220 R 70 70 0 1 P +X GND 2 -660 -330 220 R 70 70 0 1 W +X GND 3 -660 -440 220 R 70 70 0 1 W +X GND 4 -660 -550 220 R 70 70 0 1 W +P 2 0 1 10 -440 -660 -440 440 +P 2 0 1 10 440 -660 440 440 +P 2 0 1 10 440 -660 -440 -660 +P 2 0 1 10 440 440 -440 440 +ENDDRAW +ENDDEF +# +# POWER_JACKSMD +# +DEF POWER_JACKSMD IC 0 40 Y Y 1 F N +F0 "JP" -451 363 60 H V L BNN +F1 "POWER_JACKSMD" -451 -33 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -330 220 -440 110 +P 2 0 1 10 -220 110 -330 220 +P 2 0 1 10 -110 110 -220 110 +P 2 0 1 10 0 110 -110 110 +P 2 0 1 10 -110 220 -110 110 +P 2 0 1 10 0 220 -110 220 +S -440 297 0 363 0 1 10 f +X GNDBREAK 3 110 220 110 L 1 1 0 1 P +X GND 2 110 110 110 L 1 1 0 1 P +X PWR 1 110 330 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" -165 55 60 H V L BNN +F1 "R-EU_R0402" 165 -165 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_01.sch b/rev03-KiCad/rev02_01.sch new file mode 100644 index 0000000..a3c4c51 --- /dev/null +++ b/rev03-KiCad/rev02_01.sch @@ -0,0 +1,797 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 3 27 +Title "rev02_01" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 10890 1155 0 84 ~ 12 +15V LDO powered from external 18V\nand supplying stable 15V to noise source +Text Notes 1430 1760 0 126 ~ 12 +Main power input\n18V DC +Text Notes 5335 2090 0 60 ~ 12 +To mitigate component ageing in the avalanche noise circuit,\nthis jumper can be used to decide if FPGA/ARM/None should\nbe allowed to turn off the entropy source\n(default On through pull-up) +Text Notes 13860 2970 0 60 ~ 12 +Max 3 ohm ESR +Text Notes 6710 5390 0 84 ~ 12 +*) Intermediate Regulator: 18V -> 5V +Text Notes 10340 8910 0 60 ~ 12 +*) VCC_5V0 = 0.8V x (1 + 6.3/1.21) = 4.965V\n*) Current sharing not used\n*) SYNC is not used +Text Notes 5390 990 0 126 ~ 12 +Entropy source power +Text Notes 1540 3520 0 60 ~ 12 +XXX verify symbol +Text Notes 15070 10120 0 84 ~ 12 +Input power +Text Label 13310 2310 0 70 ~ +0.01uF +Text Label 13860 2750 0 70 ~ +4.7uF +Text Notes 9790 1815 2 60 ~ 12 +R7 +Text Label 9680 2035 0 70 ~ +10k +Text Notes 6545 6765 0 60 ~ 12 +R3 +Text Label 6710 6765 0 70 ~ +100 +Text Label 6270 7150 0 70 ~ +4.64k +Text Label 6270 6490 0 70 ~ +56k +Text Notes 4026 6809 0 60 ~ 12 +C1 +Text Notes 4026 7029 0 60 ~ 12 +10~uF +Text Label 10043 6589 1 70 ~ +6.3k +Text Label 10043 7370 1 70 ~ +1.21k +Text Notes 10626 6479 0 60 ~ 12 +C6 +Text Notes 10626 6699 0 60 ~ 12 +0.047~uF +Text Notes 5566 6809 0 60 ~ 12 +C4 +Text Notes 5566 7029 0 60 ~ 12 +0.047~uF +Text Notes 4466 6809 0 60 ~ 12 +C2 +Text Notes 4466 7029 0 60 ~ 12 +10~uF +Text Notes 4906 6809 0 60 ~ 12 +C3 +Text Notes 4906 7029 0 60 ~ 12 +10~uF +Text Notes 11286 6479 0 60 ~ 12 +C8 +Text Notes 11286 6699 0 60 ~ 12 +47uF +Text Notes 7590 2530 0 60 ~ 12 +Q1 +Text Notes 7425 3300 3 60 ~ 12 +R6 +Text Label 7524 3245 1 70 ~ +10k +Text Label 7150 2750 0 70 ~ +1k +Text Notes 9130 2090 2 60 ~ 12 +JP2 +$Comp +L GND #PWR?580240DD +U 1 1 580240DD +P 2750 2970 +F 0 "GND" H 2750 2970 20 0000 C CNN +F 1 "+GND" H 2750 2900 30 0000 C CNN +F 2 "" H 2750 2970 70 0000 C CNN +F 3 "" H 2750 2970 70 0000 C CNN + 1 2750 2970 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240DC +U 1 1 580240DC +P 11660 3080 +F 0 "GND_2" H 11660 3080 20 0000 C CNN +F 1 "+GND" H 11660 3010 30 0000 C CNN +F 2 "" H 11660 3080 70 0000 C CNN +F 3 "" H 11660 3080 70 0000 C CNN + 1 11660 3080 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240DB +U 1 1 580240DB +P 13200 3080 +F 0 "GND_3" H 13200 3080 20 0000 C CNN +F 1 "+GND" H 13200 3010 30 0000 C CNN +F 2 "" H 13200 3080 70 0000 C CNN +F 3 "" H 13200 3080 70 0000 C CNN + 1 13200 3080 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240DA +U 1 1 580240DA +P 13750 3080 +F 0 "GND_4" H 13750 3080 20 0000 C CNN +F 1 "+GND" H 13750 3010 30 0000 C CNN +F 2 "" H 13750 3080 70 0000 C CNN +F 3 "" H 13750 3080 70 0000 C CNN + 1 13750 3080 + 1 0 0 -1 +$EndComp +$Comp +L PWR_18V #PWR?580240D9 +U 1 1 580240D9 +P 2750 2200 +F 0 "PWR_18V" H 2750 2200 20 0000 C CNN +F 1 "+PWR_18V" H 2750 2130 30 0000 C CNN +F 2 "" H 2750 2200 70 0000 C CNN +F 3 "" H 2750 2200 70 0000 C CNN + 1 2750 2200 + 1 0 0 -1 +$EndComp +$Comp +L PWR_18V #PWR?580240D8 +U 1 1 580240D8 +P 11110 1650 +F 0 "PWR_18V_2" H 11110 1650 20 0000 C CNN +F 1 "+PWR_18V" H 11110 1580 30 0000 C CNN +F 2 "" H 11110 1650 70 0000 C CNN +F 3 "" H 11110 1650 70 0000 C CNN + 1 11110 1650 + 1 0 0 -1 +$EndComp +$Comp +L 15V_STABLE #PWR?580240D7 +U 1 1 580240D7 +P 14080 1650 +F 0 "15V_STABLE" H 14080 1650 20 0000 C CNN +F 1 "+15V_STABLE" H 14080 1580 30 0000 C CNN +F 2 "" H 14080 1650 70 0000 C CNN +F 3 "" H 14080 1650 70 0000 C CNN + 1 14080 1650 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240D6 +U 1 1 580240D6 +P 8470 8580 +F 0 "GND_5" H 8470 8580 20 0000 C CNN +F 1 "+GND" H 8470 8510 30 0000 C CNN +F 2 "" H 8470 8580 70 0000 C CNN +F 3 "" H 8470 8580 70 0000 C CNN + 1 8470 8580 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240D5 +U 1 1 580240D5 +P 8690 8580 +F 0 "GND_6" H 8690 8580 20 0000 C CNN +F 1 "+GND" H 8690 8510 30 0000 C CNN +F 2 "" H 8690 8580 70 0000 C CNN +F 3 "" H 8690 8580 70 0000 C CNN + 1 8690 8580 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240D4 +U 1 1 580240D4 +P 7370 8580 +F 0 "GND_7" H 7370 8580 20 0000 C CNN +F 1 "+GND" H 7370 8510 30 0000 C CNN +F 2 "" H 7370 8580 70 0000 C CNN +F 3 "" H 7370 8580 70 0000 C CNN + 1 7370 8580 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240D3 +U 1 1 580240D3 +P 6160 7480 +F 0 "GND_8" H 6160 7480 20 0000 C CNN +F 1 "+GND" H 6160 7410 30 0000 C CNN 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7480 70 0000 C CNN + 1 3960 7480 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240CE +U 1 1 580240CE +P 10120 7700 +F 0 "GND_13" H 10120 7700 20 0000 C CNN +F 1 "+GND" H 10120 7630 30 0000 C CNN +F 2 "" H 10120 7700 70 0000 C CNN +F 3 "" H 10120 7700 70 0000 C CNN + 1 10120 7700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240CD +U 1 1 580240CD +P 10560 6930 +F 0 "GND_14" H 10560 6930 20 0000 C CNN +F 1 "+GND" H 10560 6860 30 0000 C CNN +F 2 "" H 10560 6930 70 0000 C CNN +F 3 "" H 10560 6930 70 0000 C CNN + 1 10560 6930 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240CC +U 1 1 580240CC +P 11220 6930 +F 0 "GND_15" H 11220 6930 20 0000 C CNN +F 1 "+GND" H 11220 6860 30 0000 C CNN +F 2 "" H 11220 6930 70 0000 C CNN +F 3 "" H 11220 6930 70 0000 C CNN + 1 11220 6930 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240CB +U 1 1 580240CB +P 11880 6930 +F 0 "GND_16" H 11880 6930 20 0000 C CNN +F 1 "+GND" H 11880 6860 30 0000 C CNN +F 2 "" H 11880 6930 70 0000 C CNN +F 3 "" H 11880 6930 70 0000 C CNN + 1 11880 6930 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240CA +U 1 1 580240CA +P 12540 6930 +F 0 "GND_17" H 12540 6930 20 0000 C CNN +F 1 "+GND" H 12540 6860 30 0000 C CNN +F 2 "" H 12540 6930 70 0000 C CNN +F 3 "" H 12540 6930 70 0000 C CNN + 1 12540 6930 + 1 0 0 -1 +$EndComp +$Comp +L PWR_18V #PWR?580240C9 +U 1 1 580240C9 +P 3740 5830 +F 0 "PWR_18V_3" H 3740 5830 20 0000 C CNN +F 1 "+PWR_18V" H 3740 5760 30 0000 C CNN +F 2 "" H 3740 5830 70 0000 C CNN +F 3 "" H 3740 5830 70 0000 C CNN + 1 3740 5830 + 1 0 0 -1 +$EndComp +$Comp +L PWR_18V #PWR?580240C8 +U 1 1 580240C8 +P 9570 1650 +F 0 "PWR_18V_4" H 9570 1650 20 0000 C CNN +F 1 "+PWR_18V" H 9570 1580 30 0000 C CNN +F 2 "" H 9570 1650 70 0000 C CNN +F 3 "" H 9570 1650 70 0000 C CNN + 1 9570 1650 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240C7 +U 1 1 580240C7 +P 7590 3685 +F 0 "GND_18" H 7590 3685 20 0000 C CNN +F 1 "+GND" H 7590 3615 30 0000 C CNN +F 2 "" H 7590 3685 70 0000 C CNN +F 3 "" H 7590 3685 70 0000 C CNN + 1 7590 3685 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240C6 +U 1 1 580240C6 +P 8470 3685 +F 0 "GND_19" H 8470 3685 20 0000 C CNN +F 1 "+GND" H 8470 3615 30 0000 C CNN +F 2 "" H 8470 3685 70 0000 C CNN +F 3 "" H 8470 3685 70 0000 C CNN + 1 8470 3685 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240C5 +U 1 1 580240C5 +P 11110 3080 +F 0 "GND_20" H 11110 3080 20 0000 C CNN +F 1 "+GND" H 11110 3010 30 0000 C CNN +F 2 "" H 11110 3080 70 0000 C CNN +F 3 "" H 11110 3080 70 0000 C CNN + 1 11110 3080 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2750 2750 1980 2750 +Wire Wire Line + 2750 2750 2750 2970 +Wire Wire Line + 11770 2640 11660 2640 +Wire Wire Line + 11660 2860 11660 3080 +Wire Wire Line + 11660 2750 11660 2860 +Wire Wire Line + 11660 2640 11660 2750 +Wire Wire Line + 13200 2970 13200 3080 +Wire Wire Line + 13750 2750 13750 3080 +Wire Wire Line + 8470 8140 8470 8580 +Wire Wire Line + 8690 8140 8690 8580 +Wire Wire Line + 7370 8360 7370 8580 +Wire Wire Line + 6160 7370 6160 7480 +Wire Wire Line + 3960 7040 3960 7480 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Wire Line + 5500 6160 5500 6710 +Wire Wire Line + 4840 6160 4840 6710 +Wire Wire Line + 3960 6160 3740 6160 +Wire Wire Line + 3740 5830 3740 6160 +Connection ~ 6160 6160 +Connection ~ 4400 6160 +Connection ~ 5500 6160 +Connection ~ 3960 6160 +Connection ~ 4840 6160 +Wire Wire Line + 9570 1650 9570 1760 +Wire Wire Line + 13200 2310 13090 2310 +Wire Wire Line + 13200 2640 13090 2640 +Wire Wire Line + 11770 2310 9570 2310 +Wire Wire Line + 9570 2200 9570 2310 +Wire Wire Line + 9570 2310 9295 2310 +Text Label 9900 2310 0 70 ~ +15V_LDO_ENABLE +Connection ~ 9570 2310 +Wire Wire Line + 13200 1980 13090 1980 +Wire Wire Line + 13750 1980 13200 1980 +Wire Wire Line + 14080 1980 13750 1980 +Wire Wire Line + 13750 1980 13750 2420 +Wire Wire Line + 14080 1650 14080 1980 +Connection ~ 13200 1980 +Connection ~ 13750 1980 +Wire Wire Line + 7370 7700 7370 8030 +Wire Wire Line + 7590 7700 7370 7700 +Wire Wire Line + 6490 6820 6160 6820 +Wire Wire Line + 6160 6710 6160 6820 +Wire Wire Line + 6160 6820 6160 6930 +Connection ~ 6160 6820 +Wire Wire Line + 7590 6820 6930 6820 +Wire Wire Line + 10120 7040 9570 7040 +Wire Wire Line + 10120 6820 10120 7040 +Wire Wire Line + 10120 7040 10120 7150 +Connection ~ 10120 7040 +Wire Wire Line + 10120 6160 10120 6380 +Wire Wire Line + 11220 6160 11220 6380 +Wire Wire Line + 11220 6160 10560 6160 +Wire Wire Line + 10560 6160 10120 6160 +Wire Wire Line + 10120 6160 9570 6160 +Wire Wire Line + 11880 6160 11880 6490 +Wire Wire Line + 11880 6160 11220 6160 +Wire Wire Line + 12540 6160 12540 6490 +Wire Wire Line + 12540 6160 11880 6160 +Wire Wire Line + 13530 6160 12540 6160 +Wire Wire Line + 10560 6160 10560 6380 +Text Label 12980 6160 0 70 ~ +VCC_5V0 +Connection ~ 10120 6160 +Connection ~ 11220 6160 +Connection ~ 11880 6160 +Connection ~ 12540 6160 +Connection ~ 10560 6160 +Wire Wire Line + 7590 2805 7370 2805 +Wire Wire Line + 7810 2805 7590 2805 +Wire Wire Line + 7590 2805 7590 3025 +Connection ~ 7590 2805 +Wire Wire Line + 8470 2585 8250 2585 +Wire Wire Line + 8470 2310 8470 2585 +Wire Wire Line + 8635 2310 8470 2310 +Wire Wire Line + 6930 2805 6600 2805 +Text Label 5995 2805 0 70 ~ +FPGA_ENTROPY_DISABLE +Wire Wire Line + 5995 2805 6600 2805 +Wire Wire Line + 11660 2750 11770 2750 +Wire Wire Line + 11660 2860 11770 2860 +Text Label 11220 2970 0 70 ~ +4.7uF +Wire Wire Line + 7590 6160 7590 6270 +Wire Wire Line + 9570 6160 9570 6270 +Text Notes 7480 8360 0 60 ~ 12 +0.47uF +Text Label 13310 2970 0 70 ~ +0.01uF +Text Label 11979 6699 0 70 ~ +330uF +Text Label 12639 6699 0 70 ~ +330uF +Wire Wire Line + 1980 2750 1980 2640 +Wire Wire Line + 8800 8140 8910 8140 +Wire Wire Line + 8690 8140 8800 8140 +Connection ~ 1980 2750 +Connection ~ 7590 6160 +Connection ~ 8690 8140 +Connection ~ 8800 8140 +Connection ~ 9570 6160 +Connection ~ 11660 2860 +Connection ~ 11660 2750 +$Comp +L C-EUC0402 C11 +U 1 1 580240C4 +F 0 "C11" H 13090 2200 60 0000 R TNN + 1 13200 2200 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 IC2 +U 1 1 580240C3 + 1 10560 6490 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC3 +U 1 1 580240C2 + 1 5500 6820 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC4 +U 1 1 580240C1 + 1 4400 6820 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC5 +U 1 1 580240C0 + 1 4840 6820 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC6 +U 1 1 580240BF + 1 11220 6490 + 1 0 0 -1 +$EndComp +$Comp +L 2N7002 IC7 +U 1 1 580240BE +F 1 "2N7002P,235" H 7810 2860 60 0000 L BNN +F 2 "" H 7810 2860 60 0000 C CNN +F 3 "" H 7810 2860 60 0000 C CNN + 1 8030 2695 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC8 +U 1 1 580240BD + 1 7590 3245 + 0 1 1 0 +$EndComp +$Comp +L R-EU_R0402 R5 +U 1 1 580240BC +F 0 "R5" H 6985 2860 60 0000 L BNN + 1 7150 2805 + 1 0 0 -1 +$EndComp +$Comp +L JP1Q IC10 +U 1 1 580240BB + 1 8965 2310 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC0603 C7 +U 1 1 580240BA +F 0 "C7" H 11220 2640 60 0000 L BNN + 1 11110 2750 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 C13 +U 1 1 580240B9 +F 0 "C13" H 13860 2420 60 0000 L BNN + 1 13750 2530 + 1 0 0 -1 +$EndComp +$Comp +L LT3060ITS8-15 U2 +U 1 1 580240B8 +F 0 "U2" H 11979 2761 60 0000 L BNN +F 1 "LT3060ITS8-15#TRMPBF" H 11979 1529 60 0000 L BNN +F 2 "" H 11979 1529 60 0000 C CNN +F 3 "" H 11979 1529 60 0000 C CNN + 1 12430 2310 + 1 0 0 -1 +$EndComp +$Comp +L LMZ13608 U1 +U 1 1 580240B7 +F 0 "U1" H 7799 7931 60 0000 L BNN +F 1 "LMZ13608TZ*" H 8030 7920 60 0000 L BNN +F 2 "" H 8030 7920 60 0000 C CNN +F 3 "" H 8030 7920 60 0000 C CNN + 1 8580 6930 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C5 +U 1 1 580240B6 +F 0 "C5" H 7480 8085 60 0000 L BNN + 1 7370 8140 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C12 +U 1 1 580240B5 +F 0 "C12" H 13090 2860 60 0000 R TNN + 1 13200 2860 + -1 0 0 1 +$EndComp +$Comp +L POWER_JACKSMD JP1 +U 1 1 580240B4 +F 0 "JP1" H 1419 3223 60 0000 L BNN +F 1 "694106301002" H 1419 2827 60 0000 L BNN +F 2 "" H 1419 2827 60 0000 C CNN +F 3 "" H 1419 2827 60 0000 C CNN + 1 1870 2860 + 1 0 0 -1 +$EndComp +$Comp +L CP_E-035X080 C9 +U 1 1 580240B3 +F 0 "C9" V 11907.5 6462.5 60 0000 R TNN + 1 11880 6600 + 0 -1 -1 0 +$EndComp +$Comp +L CP_E-035X080 C10 +U 1 1 580240B2 +F 0 "C10" V 12567.5 6462.5 60 0000 R TNN + 1 12540 6600 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC20 +U 1 1 580240B1 + 1 9570 1980 + 0 1 1 0 +$EndComp +$Comp +L R-EU_R0402 IC21 +U 1 1 580240B0 + 1 6710 6820 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R2 +U 1 1 580240AF +F 0 "R2" V 6270 7018 60 0000 R TNN +F 1 "" H 5830 6985 60 0000 R TNN +F 2 "" H 5830 6985 60 0000 C CNN +F 3 "" H 5830 6985 60 0000 C CNN + 1 6160 7150 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 R1 +U 1 1 580240AE +F 0 "R1" V 6270 6380 60 0000 R TNN + 1 6160 6490 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC1210 IC24 +U 1 1 580240AD + 1 3960 6820 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R8 +U 1 1 580240AC +F 0 "R8" H 9955 6664.9 60 0000 R TNN +F 1 "" H 9955 6435 60 0000 R TNN +F 2 "" H 9955 6435 60 0000 C CNN +F 3 "" H 9955 6435 60 0000 C CNN + 1 10120 6600 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 R9 +U 1 1 580240AB +F 0 "R9" H 9955 7434.9 60 0000 R TNN + 1 10120 7370 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_02-cache.lib b/rev03-KiCad/rev02_02-cache.lib new file mode 100644 index 0000000..bb3daf1 --- /dev/null +++ b/rev03-KiCad/rev02_02-cache.lib @@ -0,0 +1,174 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# 15V_STABLE +# +DEF 15V_STABLE #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "15V_STABLE" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X 15V_STABLE 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# BAT54 +# +DEF BAT54 IC 0 40 Y Y 1 F N +F0 "D" -99 77 60 H V L BNN +F1 "BAT54" -253 -187 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 55 0 -55 -55 +P 2 0 1 10 -55 55 55 0 +P 2 0 1 10 55 55 77 55 +P 2 0 1 10 55 0 55 55 +P 2 0 1 10 -55 -55 -55 55 +P 2 0 1 10 55 -55 55 0 +P 2 0 1 10 77 44 77 55 +P 2 0 1 10 22 -55 55 -55 +P 2 0 1 10 22 -55 22 -44 +X A 1 -110 0 110 R 1 1 0 1 P +X C 3 110 0 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# BC818*SMD +# +DEF BC818*SMD IC 0 40 Y Y 1 F N +F0 "T" 275 275 60 H V L BNN +F1 "BC818*SMD" 737 165 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 22 66 110 110 +P 2 0 1 10 110 -110 77 -66 +P 2 0 1 10 55 -110 110 -110 +P 2 0 1 10 77 -66 55 -110 +P 2 0 1 10 22 -55 77 -88 +P 2 0 1 10 99 -99 66 -99 +P 2 0 1 10 77 -77 99 -99 +P 2 0 1 10 66 -99 77 -77 +P 2 0 1 10 88 -99 66 -99 +P 2 0 1 10 77 -88 88 -99 +S 22 110 -11 -110 0 1 10 f +X B 1 -110 0 110 R 1 1 0 1 P +X E 2 110 -220 110 U 1 1 0 1 P +X C 3 110 220 110 D 1 1 0 1 P +P 2 0 1 10 11 -66 66 -99 +P 2 0 1 10 99 -110 66 -110 +P 2 0 1 10 77 -77 99 -110 +P 2 0 1 10 77 -99 66 -99 +P 2 0 1 10 77 -88 77 -99 +S -11 -110 22 110 0 1 10 f +ENDDRAW +ENDDEF +# +# C-EUC0603 +# +DEF C-EUC0603 IC 0 40 Y Y 1 F N +F0 "C" -110 -220 60 H V L BNN +F1 "C-EUC0603" -110 -330 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S 88 -66 -88 -88 0 1 10 f +S 88 -22 -88 -44 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +S -88 -66 88 -88 0 1 10 f +S -88 -22 88 -44 0 1 10 f +ENDDRAW +ENDDEF +# +# MC74HC1G14DTT1G +# +DEF MC74HC1G14DTT1G IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -550 -660 -550 440 +P 2 0 1 10 550 -660 -550 -660 +P 2 0 1 10 550 440 550 -660 +P 2 0 1 10 -550 440 550 440 +X VCC 5 -770 220 220 R 70 70 0 1 W +X IN_A 2 -770 0 220 R 70 70 0 1 P +X NC 1 -770 -220 220 R 70 70 0 1 P +X GND 3 -770 -440 220 R 70 70 0 1 P +X OUT_Y 4 770 220 220 L 70 70 0 1 O +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" 110 0 60 H V L BNN +F1 "R-EU_R0402" 110 -110 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +ENDDRAW +ENDDEF +# +# TPB1,27 +# +DEF TPB1,27 IC 0 40 Y Y 1 F N +F0 "TP" -110 -330 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 0 -33 -33 +P 2 0 1 10 33 -33 0 0 +P 2 0 1 10 0 -66 33 -33 +P 2 0 1 10 -33 -33 0 -66 +X TP TP 0 -110 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# WE-SHC +# +DEF WE-SHC IC 0 40 Y Y 1 F N +F0 "S" -330 495 60 H V L BNN +F1 "WE-SHC" 0 440 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -330 330 550 330 +P 2 0 1 10 -330 -550 -330 330 +X GND 1 -440 110 110 R 70 70 0 1 W +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_02.sch b/rev03-KiCad/rev02_02.sch new file mode 100644 index 0000000..b26e50e --- /dev/null +++ b/rev03-KiCad/rev02_02.sch @@ -0,0 +1,410 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 4 27 +Title "rev02_02" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 12760 2970 0 126 ~ 12 +Digitizer +Text Notes 3520 2970 0 126 ~ 12 +Noise generator +Text Notes 4620 5951 0 60 ~ 12 +Noisy diode +Text Notes 7480 2970 0 126 ~ 12 +Amplifier +Text Notes 3520 7260 0 60 ~ 12 +AGND is connected to GND on the board using polygons\n(found no other good way) - not visible in schematics. +Text Notes 10340 7315 0 60 ~ 12 +This whole sheets circuitry should be as shielded as possible.\nSolid isolated ground plane and internal planes connected\nto the rest of the board at a single point is expected. +Text Notes 15059 10142 0 84 ~ 12 +Noise source +Text Label 11759 4785 0 70 ~ +0.1uF +Text Notes 13178 3861 0 60 ~ 12 +U3 +Text Notes 12969 5269 0 60 ~ 12 +MC74HC1G14DTT1G +Text Label 3839 5962 0 70 ~ +0.1uF +Text Label 4950 4785 0 70 ~ +470 +Text Label 5709 4521 0 70 ~ +1k +Text Label 8470 5159 0 70 ~ +0.1uF +Text Label 9317 4565 0 70 ~ +10k +Text Label 9779 3839 0 70 ~ +1k +$Comp +L VCCO_3V3 #PWR?580240AA +U 1 1 580240AA +P 12540 3410 +F 0 "VCCO_3V3" H 12540 3410 20 0000 C CNN +F 1 "+VCCO_3V3" H 12540 3340 30 0000 C CNN +F 2 "" H 12540 3410 70 0000 C CNN +F 3 "" H 12540 3410 70 0000 C CNN + 1 12540 3410 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240A9 +U 1 1 580240A9 +P 5555 6105 +F 0 "GND_21" H 5555 6105 20 0000 C CNN +F 1 "+GND" H 5555 6035 30 0000 C CNN +F 2 "" H 5555 6105 70 0000 C CNN +F 3 "" H 5555 6105 70 0000 C CNN + 1 5555 6105 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?580240A8 +U 1 1 580240A8 +P 9680 3410 +F 0 "VCCO_3V3_2" H 9680 3410 20 0000 C CNN +F 1 "+VCCO_3V3" H 9680 3340 30 0000 C CNN +F 2 "" H 9680 3410 70 0000 C CNN +F 3 "" H 9680 3410 70 0000 C CNN + 1 9680 3410 + 1 0 0 -1 +$EndComp +$Comp +L 15V_STABLE #PWR?580240A7 +U 1 1 580240A7 +P 5555 3685 +F 0 "15V_STABLE_2" H 5555 3685 20 0000 C CNN +F 1 "+15V_STABLE" H 5555 3615 30 0000 C CNN +F 2 "" H 5555 3685 70 0000 C CNN +F 3 "" H 5555 3685 70 0000 C CNN + 1 5555 3685 + 1 0 0 -1 +$EndComp +Wire Wire Line + 12650 4180 12540 4180 +Wire Wire Line + 12540 3410 12540 4180 +Wire Wire Line + 12210 4180 12210 4510 +Wire Wire Line + 12540 4180 12210 4180 +Connection ~ 12540 4180 +Wire Wire Line + 9680 3410 9680 3520 +Wire Wire Line + 12650 4400 11330 4400 +Text Label 11330 4400 0 70 ~ +AMPLIFIED +Wire Wire Line + 11055 4400 10230 4400 +Wire Wire Line + 9680 3960 9680 4070 +Wire Wire Line + 9680 4070 9680 4400 +Wire Wire Line + 9680 4400 9680 4620 +Wire Wire Line + 10230 4400 9680 4400 +Wire Wire Line + 9680 4400 9570 4400 +Wire Wire Line + 9680 4070 9460 4070 +Wire Wire Line + 10230 4290 10230 4400 +Text Label 10615 4400 0 70 ~ +AMPLIFIED +Connection ~ 9680 4400 +Connection ~ 9680 4400 +Connection ~ 9680 4070 +Connection ~ 10230 4400 +Wire Wire Line + 14740 4180 14190 4180 +Text Label 14740 4180 0 70 ~ +DIGITIZED_NOISE +Wire Wire Line + 12650 4840 12540 4840 +Wire Wire Line + 12540 4840 12540 5280 +Wire Wire Line + 12540 5280 12540 5390 +Wire Wire Line + 12210 4840 12210 5280 +Wire Wire Line + 12540 5280 12210 5280 +Connection ~ 12540 5280 +Wire Wire Line + 9680 5060 9680 5170 +Wire Wire Line + 5335 5500 4895 5500 +Text Label 4950 5500 0 70 ~ +NOISE_OUT +Wire Wire Line + 4345 4840 4345 5720 +Wire Wire Line + 4675 4840 4345 4840 +Wire Wire Line + 4895 4840 4675 4840 +Wire Wire Line + 4675 4840 4675 5280 +Connection ~ 4675 4840 +Text Label 4345 4840 0 70 ~ +NOISE_IN +Wire Wire Line + 5555 4840 5335 4840 +Wire Wire Line + 5555 4840 5555 5280 +Wire Wire Line + 5555 4730 5555 4840 +Wire Wire Line + 5885 4840 5555 4840 +Wire Wire Line + 7040 4840 5885 4840 +Wire Wire Line + 5885 4730 5885 4840 +Text Label 6600 4840 0 70 ~ +RAW_NOISE +Connection ~ 5555 4840 +Connection ~ 5885 4840 +Wire Wire Line + 8470 4840 7425 4840 +Text Label 7425 4840 0 70 ~ +RAW_NOISE +Wire Wire Line + 9240 4070 8910 4070 +Wire Wire Line + 8910 4840 8800 4840 +Wire Wire Line + 8910 4400 8910 4840 +Wire Wire Line + 9130 4400 8910 4400 +Wire Wire Line + 9460 4840 8910 4840 +Wire Wire Line + 8910 4070 8910 4400 +Connection ~ 8910 4840 +Connection ~ 8910 4400 +Wire Wire Line + 5555 5720 5555 6105 +Wire Wire Line + 4345 6050 4345 6105 +Wire Wire Line + 5555 6105 4345 6105 +Connection ~ 5555 6105 +Wire Wire Line + 5555 3685 5555 4290 +Wire Wire Line + 3465 4345 3520 4345 +Wire Wire Line + 3465 5225 3465 4345 +$Comp +L GND #PWR?580240A6 +U 1 1 580240A6 +P 3465 5225 +F 0 "GND_22" H 3465 5225 20 0000 C CNN +F 1 "+GND" H 3465 5155 30 0000 C CNN +F 2 "" H 3465 5225 70 0000 C CNN +F 3 "" H 3465 5225 70 0000 C CNN + 1 3465 5225 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240A5 +U 1 1 580240A5 +P 9680 5170 +F 0 "GND_23" H 9680 5170 20 0000 C CNN +F 1 "+GND" H 9680 5100 30 0000 C CNN +F 2 "" H 9680 5170 70 0000 C CNN +F 3 "" H 9680 5170 70 0000 C CNN + 1 9680 5170 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?580240A4 +U 1 1 580240A4 +P 12540 5390 +F 0 "GND_24" H 12540 5390 20 0000 C CNN +F 1 "+GND" H 12540 5320 30 0000 C CNN +F 2 "" H 12540 5390 70 0000 C CNN +F 3 "" H 12540 5390 70 0000 C CNN + 1 12540 5390 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 C16 +U 1 1 580240A3 +F 0 "C16" H 12650 4686 60 0000 R TNN +F 1 "" V 12023 4895 60 0000 R TNN +F 2 "" H 12023 4895 60 0000 C CNN +F 3 "" H 12023 4895 60 0000 C CNN + 1 12210 4730 + -1 0 0 1 +$EndComp +$Comp +L WE-SHC S1 +U 1 1 580240A2 +F 0 "S1" H 3630 4950 60 0000 L BNN +F 1 "SHIELDING CABINET" H 3960 4895 60 0000 L BNN +F 2 "" H 3960 4895 60 0000 C CNN +F 3 "" H 3960 4895 60 0000 C CNN + 1 3960 4455 + 1 0 0 -1 +$EndComp +$Comp +L BC818*SMD Q2 +U 1 1 580240A1 +F 0 "Q2" H 4862 5148 60 0000 R TNN +F 1 "BC818-40LT1G" H 4862 5258 60 0000 R TNN +F 2 "" H 4862 5258 60 0000 C CNN +F 3 "" H 4862 5258 60 0000 C CNN + 1 4785 5500 + -1 0 0 1 +$EndComp +$Comp +L BC818*SMD T1 +U 1 1 580240A0 +F 0 "T1" H 5720 5775 60 0000 R TNN +F 1 "BC847BLT3G" H 6182 5665 60 0000 R TNN +F 2 "" H 6182 5665 60 0000 C CNN +F 3 "" H 6182 5665 60 0000 C CNN + 1 5445 5500 + 1 0 0 -1 +$EndComp +$Comp +L BC818*SMD T2 +U 1 1 5802409F +F 0 "T2" H 9845 5115 60 0000 R TNN +F 1 "BC847BLT3G" H 10307 5005 60 0000 R TNN +F 2 "" H 10307 5005 60 0000 C CNN +F 3 "" H 10307 5005 60 0000 C CNN + 1 9570 4840 + 1 0 0 -1 +$EndComp +$Comp +L TPB1,27 TP1 +U 1 1 5802409E +F 0 "TP1" H 5775 4290 60 0000 L BNN + 1 5885 4620 + 1 0 0 -1 +$EndComp +$Comp +L TPB1,27 TP2 +U 1 1 5802409D +F 0 "TP2" H 10120 3850 60 0000 L BNN + 1 10230 4180 + 1 0 0 -1 +$EndComp +$Comp +L MC74HC1G14DTT1G IC34 +U 1 1 5802409C + 1 13420 4400 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 C14 +U 1 1 5802409B +F 0 "C14" H 4840 5830 60 0000 R TNN +F 1 "" H 4840 5940 60 0000 R TNN +F 2 "" H 4840 5940 60 0000 C CNN +F 3 "" H 4840 5940 60 0000 C CNN + 1 4345 5940 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R10 +U 1 1 5802409A +F 0 "R10" H 5277.78889 4697 60 0000 R TNN +F 1 "" H 5390 5060 60 0000 R TNN +F 2 "" H 5390 5060 60 0000 C CNN +F 3 "" H 5390 5060 60 0000 C CNN + 1 5115 4840 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R11 +U 1 1 58024099 +F 0 "R11" V 5445 4675 60 0000 L BNN +F 1 "" V 5555 4675 60 0000 L BNN +F 2 "" H 5555 4675 60 0000 C CNN +F 3 "" H 5555 4675 60 0000 C CNN + 1 5555 4510 + 0 1 1 0 +$EndComp +$Comp +L C-EUC0603 C15 +U 1 1 58024098 +F 0 "C15" V 8360 4950 60 0000 R TNN +F 1 "" V 8250 4950 60 0000 R TNN +F 2 "" H 8250 4950 60 0000 C CNN +F 3 "" H 8250 4950 60 0000 C CNN + 1 8580 4840 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 R12 +U 1 1 58024097 +F 0 "R12" H 9097 4235 60 0000 L BNN +F 1 "" H 9020 4180 60 0000 L BNN +F 2 "" H 9020 4180 60 0000 C CNN +F 3 "" H 9020 4180 60 0000 C CNN + 1 9350 4400 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R13 +U 1 1 58024096 +F 0 "R13" V 9680 3630 60 0000 R TNN +F 1 "" V 9570 3630 60 0000 R TNN +F 2 "" H 9570 3630 60 0000 C CNN +F 3 "" H 9570 3630 60 0000 C CNN + 1 9680 3740 + 0 -1 -1 0 +$EndComp +$Comp +L BAT54 D1 +U 1 1 58024095 +F 0 "D1" H 9251 4152.5 60 0000 L BNN +F 1 "BAT54LT1G" H 9097 3883 60 0000 L BNN +F 2 "" H 9097 3883 60 0000 C CNN +F 3 "" H 9097 3883 60 0000 C CNN + 1 9350 4070 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_03-cache.lib b/rev03-KiCad/rev02_03-cache.lib new file mode 100644 index 0000000..c679844 --- /dev/null +++ b/rev03-KiCad/rev02_03-cache.lib @@ -0,0 +1,146 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" -495 55 60 H V L BNN +F1 "C-EUC0402" -495 -55 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S 88 -66 -88 -88 0 1 10 f +S 88 -22 -88 -44 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +ENDDRAW +ENDDEF +# +# LEDCHIP-LED0603 +# +DEF LEDCHIP-LED0603 IC 0 40 Y Y 1 F N +F0 "LED" 693 -33 60 H V L BNN +F1 "LEDCHIP-LED0603" 1364 -44 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -110 55 0 +P 2 0 1 10 -55 0 0 -110 +P 2 0 1 10 0 -110 55 -110 +P 2 0 1 10 -55 -110 0 -110 +P 2 0 1 10 0 0 55 0 +P 2 0 1 10 -55 0 0 0 +P 2 0 1 10 0 -110 0 0 +P 2 0 1 10 -154 -88 -88 -33 +P 2 0 1 10 -143 -143 -88 -77 +P 4 0 1 10 -154 -88 -132 -55 -110 -77 -154 -88 F +P 4 0 1 10 -143 -143 -132 -99 -110 -121 -143 -143 F +X C 2 0 -220 110 U 1 1 0 1 P +X A 1 0 110 110 D 1 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" -99 -187 60 H V L BNN +F1 "R-EU_R0402" -99 99 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# STM32-SWD +# +DEF STM32-SWD IC 0 40 Y Y 1 F N +F0 "J" -165 473 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 220 -440 220 330 +P 2 0 1 10 -330 -440 220 -440 +P 2 0 1 10 -330 330 -330 -440 +P 2 0 1 10 220 330 -330 330 +X VCC 1 440 -330 220 L 70 70 0 1 W +X SWDIO 4 440 0 220 L 70 70 0 1 P +X NRST 5 440 110 220 L 70 70 0 1 P +X GND 3 440 -110 220 L 70 70 0 1 W +X SWDCLK 2 440 -220 220 L 70 70 0 1 P +X SWO 6 440 220 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# STM32F429BIT6_2 +# +DEF STM32F429BIT6_2 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 1100 880 -1210 880 +P 2 0 1 10 -1210 -990 -1210 880 +P 2 0 1 10 1100 -990 1100 880 +P 2 0 1 10 1100 -990 -1210 -990 +X PA14/JTCK-SWCLK 159 1210 220 110 L 70 70 0 1 P +X PA15/JTDI 160 1210 -220 110 L 70 70 0 1 P +X PB3/JTDO/TRACESWO 192 1210 -440 110 L 70 70 0 1 P +X PB4/NJTRST 193 1210 -330 110 L 70 70 0 1 P +X BOOT0 197 -1320 -770 110 R 70 70 0 1 P +X PDR_ON 203 -1320 440 110 R 70 70 0 1 P +X PA13/JTMS-SWDIO 147 1210 110 110 L 70 70 0 1 P +X OSC_IN/PH0 32 -1320 0 110 R 70 70 0 1 P +X OSC_OUT/PH1 33 -1320 -110 110 R 70 70 0 1 P +X NRST 34 1210 330 110 L 70 70 0 1 P +X VREF+ 41 -1320 660 110 R 70 70 0 1 W +X PB2/BOOT1 63 -1320 -550 110 R 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XTAL-4-3225 +# +DEF XTAL-4-3225 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XTAL-4-3225" -517 253 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -110 -110 -110 110 +P 2 0 1 10 110 -110 110 110 +P 2 0 1 10 -55 -110 -55 110 +P 2 0 1 10 55 -110 -55 -110 +P 2 0 1 10 55 110 55 -110 +P 2 0 1 10 -55 110 55 110 +X X1 1 -220 0 110 R 1 1 0 1 P +X X2 3 220 0 110 L 1 1 0 1 P +X G1 4 -220 -330 220 R 1 1 0 1 W +X G2 2 220 -330 220 L 1 1 0 1 W +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_03.sch b/rev03-KiCad/rev02_03.sch new file mode 100644 index 0000000..21728a8 --- /dev/null +++ b/rev03-KiCad/rev02_03.sch @@ -0,0 +1,502 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 5 27 +Title "rev02_03" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 7304 5720 0 60 ~ 12 +ST 4488 §5.1\nBOOT0 to GND boots\nMain Flash Memory +Text Notes 2750 3278 0 60 ~ 12 +ST AN4488 §4.1.2\nsuggests 25 MHz for good\nEthernet, USB OTG and I2C +Text Notes 13640 2420 0 60 ~ 12 +SWD program/debug +Text Notes 14443 4037 0 60 ~ 12 +ST AN4488 §2.3.3\nReset circuit not needed,\nbut pull-down cap\nrecommended. +Text Notes 5654 3674 0 60 ~ 12 +PDR_ON high enables\ninternal power regulator +Text Notes 2739 3608 0 60 ~ 12 +CL 10pF +Text Notes 2200 1430 0 126 ~ 12 +Basic configuration, STM32 +Text Notes 15037 10153 0 84 ~ 12 +ARM configuration +Text Label 4532 4279 0 70 ~ +5pF +Text Label 2200 4290 0 70 ~ +5pF +Text Notes 7216 5456 0 60 ~ 12 +R15 +Text Label 7216 5566 0 70 ~ +10k +Text Label 13651 4015 0 70 ~ +0.1uF +Text Notes 2706 4488 0 60 ~ 12 +R14 +Text Label 2827 4576 0 70 ~ +0 +Text Notes 3410 3905 0 60 ~ 12 +Q3 +Text Notes 3410 4400 0 60 ~ 12 +Gnd +Text Label 12474 3465 0 70 ~ +0.1uF +$Comp +L GND #PWR?58024094 +U 1 1 58024094 +P 2640 4510 +F 0 "GND_25" H 2640 4510 20 0000 C CNN +F 1 "+GND" H 2640 4440 30 0000 C CNN +F 2 "" H 2640 4510 70 0000 C CNN +F 3 "" H 2640 4510 70 0000 C CNN + 1 2640 4510 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024093 +U 1 1 58024093 +P 4400 4510 +F 0 "GND_26" H 4400 4510 20 0000 C CNN +F 1 "+GND" H 4400 4440 30 0000 C CNN +F 2 "" H 4400 4510 70 0000 C CNN +F 3 "" H 4400 4510 70 0000 C CNN + 1 4400 4510 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024092 +U 1 1 58024092 +P 7084 5830 +F 0 "GND_27" H 7084 5830 20 0000 C CNN +F 1 "+GND" H 7084 5760 30 0000 C CNN +F 2 "" H 7084 5830 70 0000 C CNN +F 3 "" H 7084 5830 70 0000 C CNN + 1 7084 5830 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024091 +U 1 1 58024091 +P 14146 4180 +F 0 "GND_28" H 14146 4180 20 0000 C CNN +F 1 "+GND" H 14146 4110 30 0000 C CNN +F 2 "" H 14146 4180 70 0000 C CNN +F 3 "" H 14146 4180 70 0000 C CNN + 1 14146 4180 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024090 +U 1 1 58024090 +P 13310 4180 +F 0 "GND_29" H 13310 4180 20 0000 C CNN +F 1 "+GND" H 13310 4110 30 0000 C CNN +F 2 "" H 13310 4180 70 0000 C CNN +F 3 "" H 13310 4180 70 0000 C CNN + 1 13310 4180 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?5802408F +U 1 1 5802408F +P 12980 2750 +F 0 "VCCO_3V3_3" H 12980 2750 20 0000 C CNN +F 1 "+VCCO_3V3" H 12980 2680 30 0000 C CNN +F 2 "" H 12980 2750 70 0000 C CNN +F 3 "" H 12980 2750 70 0000 C CNN + 1 12980 2750 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?5802408E +U 1 1 5802408E +P 7150 2860 +F 0 "VCCO_3V3_4" H 7150 2860 20 0000 C CNN +F 1 "+VCCO_3V3" H 7150 2790 30 0000 C CNN +F 2 "" H 7150 2860 70 0000 C CNN +F 3 "" H 7150 2860 70 0000 C CNN + 1 7150 2860 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?5802408D +U 1 1 5802408D +P 15070 6490 +F 0 "GND_30" H 15070 6490 20 0000 C CNN +F 1 "+GND" H 15070 6420 30 0000 C CNN +F 2 "" H 15070 6490 70 0000 C CNN +F 3 "" H 15070 6490 70 0000 C CNN + 1 15070 6490 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?5802408C +U 1 1 5802408C +P 3300 4510 +F 0 "GND_31" H 3300 4510 20 0000 C CNN +F 1 "+GND" H 3300 4440 30 0000 C CNN +F 2 "" H 3300 4510 70 0000 C CNN +F 3 "" H 3300 4510 70 0000 C CNN + 1 3300 4510 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?5802408B +U 1 1 5802408B +P 3740 4510 +F 0 "GND_32" H 3740 4510 20 0000 C CNN +F 1 "+GND" H 3740 4440 30 0000 C CNN +F 2 "" H 3740 4510 70 0000 C CNN +F 3 "" H 3740 4510 70 0000 C CNN + 1 3740 4510 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?5802408A +U 1 1 5802408A +P 12980 4180 +F 0 "GND_33" H 12980 4180 20 0000 C CNN +F 1 "+GND" H 12980 4110 30 0000 C CNN +F 2 "" H 12980 4180 70 0000 C CNN +F 3 "" H 12980 4180 70 0000 C CNN + 1 12980 4180 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2640 4400 2640 4510 +Wire Wire Line + 4400 4400 4400 4510 +Wire Wire Line + 7084 5720 7084 5830 +Wire Wire Line + 13310 3333 13310 4180 +Wire Wire Line + 15070 6050 14960 6050 +Wire Wire Line + 15070 6050 15070 6160 +Wire Wire Line + 15070 6160 14740 6160 +Wire Wire Line + 15070 6160 15070 6270 +Wire Wire Line + 15070 6270 14960 6270 +Wire Wire Line + 15070 6380 14740 6380 +Wire Wire Line + 15070 6270 15070 6380 +Wire Wire Line + 15070 6380 15070 6490 +Wire Wire Line + 3300 4400 3300 4510 +Wire Wire Line + 3740 4400 3740 4510 +Wire Wire Line + 12980 3630 12980 4180 +Wire Wire Line + 12980 2750 12980 3080 +Wire Wire Line + 12980 3113 12980 3300 +Wire Wire Line + 12980 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+F 3 "" H 3080 4290 60 0000 C CNN + 1 2640 4290 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 IC52 +U 1 1 5802407F + 1 7084 5500 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC0402 C20 +U 1 1 5802407E +F 0 "C20" H 13651 4015 60 0000 L BNN +F 1 "" H 13651 3905 60 0000 L BNN +F 2 "" H 13651 3905 60 0000 C CNN +F 3 "" H 13651 3905 60 0000 C CNN + 1 14146 3960 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC54 +U 1 1 5802407D + 1 2970 4510 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED3 +U 1 1 5802407C +F 0 "LED3" V 14707 5574.23614 60 0000 R TNN +F 1 "LTST-C193TBKT-5A" V 14685 4906 60 0000 R TNN +F 2 "" H 14685 4906 60 0000 C CNN +F 3 "" H 14685 4906 60 0000 C CNN + 1 14740 6050 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED1 +U 1 1 5802407B +F 0 "LED1" V 14487 5464.23614 60 0000 R TNN +F 1 "LTST-C191KGKT" V 14476 4796 60 0000 R TNN +F 2 "" H 14476 4796 60 0000 C CNN +F 3 "" H 14476 4796 60 0000 C CNN + 1 14520 6160 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED4 +U 1 1 5802407A +F 0 "LED4" V 14707 5794.23614 60 0000 R TNN +F 1 "LTST-C191KSKT" V 14685 5137 60 0000 R TNN +F 2 "" H 14685 5137 60 0000 C CNN +F 3 "" H 14685 5137 60 0000 C CNN + 1 14740 6270 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED2 +U 1 1 58024079 +F 0 "LED2" V 14487 5684.23614 60 0000 R TNN +F 1 "LTST-C191KRKT" V 14476 5016 60 0000 R TNN +F 2 "" H 14476 5016 60 0000 C CNN +F 3 "" H 14476 5016 60 0000 C CNN + 1 14520 6380 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_04-cache.lib b/rev03-KiCad/rev02_04-cache.lib new file mode 100644 index 0000000..ac9de46 --- /dev/null +++ b/rev03-KiCad/rev02_04-cache.lib @@ -0,0 +1,152 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# 3V3_BATT +# +DEF 3V3_BATT #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "3V3_BATT" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X 3V3_BATT 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" -66 -330 60 H V L BNN +F1 "C-EUC0402" -132 -396 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0603 +# +DEF C-EUC0603 IC 0 40 Y Y 1 F N +F0 "C" -396 11 60 H V L BNN +F1 "C-EUC0603" -561 -99 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +S 88 -66 -88 -88 0 1 10 f +S 88 -22 -88 -44 0 1 10 f +ENDDRAW +ENDDEF +# +# C-EUC0805 +# +DEF C-EUC0805 IC 0 40 Y Y 1 F N +F0 "C" 99 0 60 H V L BNN +F1 "C-EUC0805" 110 -110 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" -330 110 60 H V L BNN +F1 "R-EU_R0402" -330 0 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# STM32F429BIT6_3 +# +DEF STM32F429BIT6_3 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 770 1650 -770 1650 +P 2 0 1 10 770 -1540 770 1650 +P 2 0 1 10 -770 1650 -770 -1540 +P 2 0 1 10 770 -1540 -770 -1540 +X VBAT 6 -880 1320 110 R 70 70 0 1 W +X VDD 15 -880 880 110 R 70 70 0 1 W +X VDD 26 -880 770 110 R 70 70 0 1 W +X VDD 39 -880 660 110 R 70 70 0 1 W +X VDDA 42 -880 1100 110 R 70 70 0 1 W +X VDD 52 -880 550 110 R 70 70 0 1 W +X VSS 14 880 770 110 L 70 70 0 1 W +X VSS 25 880 660 110 L 70 70 0 1 W +X VSSA 40 880 1100 110 L 70 70 0 1 W +X VSS 51 880 550 110 L 70 70 0 1 W +X VDD 59 -880 330 110 R 70 70 0 1 W +X VDD 73 -880 220 110 R 70 70 0 1 W +X VDD 83 -880 110 110 R 70 70 0 1 W +X VDD 94 -880 0 110 R 70 70 0 1 W +X VDD 103 -880 -110 110 R 70 70 0 1 W +X VSS 60 880 330 110 L 70 70 0 1 W +X VSS 72 880 220 110 L 70 70 0 1 W +X VSS 82 880 110 110 L 70 70 0 1 W +X VSS 93 880 0 110 L 70 70 0 1 W +X VDD 115 -880 -330 110 R 70 70 0 1 W +X VDD 124 -880 -440 110 R 70 70 0 1 W +X VDD 137 -880 -550 110 R 70 70 0 1 W +X VDD 150 -880 -660 110 R 70 70 0 1 W +X VSS 114 880 -330 110 L 70 70 0 1 W +X VSS 125 880 -440 110 L 70 70 0 1 W +X VSS 136 880 -550 110 L 70 70 0 1 W +X VSS 149 880 -660 110 L 70 70 0 1 W +X VDD 158 -880 -1210 110 R 70 70 0 1 W +X VDD 171 -880 -1100 110 R 70 70 0 1 W +X VDD 185 -880 -990 110 R 70 70 0 1 W +X VDD 204 -880 -880 110 R 70 70 0 1 W +X VSS 170 880 -880 110 L 70 70 0 1 W +X VSS 184 880 -990 110 L 70 70 0 1 W +X VSS 202 880 -1100 110 L 70 70 0 1 W +X VCAP1 92 -110 1760 110 D 70 70 0 1 P +X VCAP2 148 110 1760 110 D 70 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_04.sch b/rev03-KiCad/rev02_04.sch new file mode 100644 index 0000000..2e1e63e --- /dev/null +++ b/rev03-KiCad/rev02_04.sch @@ -0,0 +1,790 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 6 27 +Title "rev02_04" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 13783 4070 0 60 ~ 12 +ST AN8844 §2.2\nOne bypass capacitor for every VDD.\nUse 0.1 uF X7R 10V. +Text Notes 10285 4235 0 60 ~ 12 +ST AN8844 §2.2\nOne 10uF bypass cap for the package.\n(two used for extra comfort) +Text Notes 7040 4235 0 60 ~ 12 +2*2*2.2uF LowESR or\n2*1*4.7uF LowESR\n< 1 ohm\n(ST AN4488 §2.2) +Text Notes 2090 1210 0 126 ~ 12 +Power and bypass capacitors, STM32 +Text Notes 15323 10142 0 84 ~ 12 +ARM power +Text Label 10450 5412 0 70 ~ +10uF +Text Label 11440 5379 0 70 ~ +10uF +Text Label 15356 4609 0 70 ~ +0.1uF +Text Label 15158 5137 0 70 ~ +0.1uF +Text Label 14894 4609 0 70 ~ +0.1uF +Text Label 14729 5148 0 70 ~ +0.1uF +Text Label 14432 4609 0 70 ~ +0.1uF +Text Label 14036 4609 0 70 ~ +0.1uF +Text Label 13772 5148 0 70 ~ +0.1uF +Text Label 13728 4609 0 70 ~ +0.1uF +Text Label 14256 5137 0 70 ~ +0.1uF +Text Label 13464 5709 0 70 ~ +0.1uF +Text Label 13464 4609 0 70 ~ +0.1uF +Text Label 13057 4829 0 70 ~ +0.1uF +Text Label 15532 5401 0 70 ~ +0.1uF +Text Label 15136 5720 0 70 ~ +0.1uF +Text Label 14883 5698 0 70 ~ +0.1uF +Text Label 14619 5709 0 70 ~ +0.1uF +Text Label 14421 5874 0 70 ~ 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70 0000 C CNN + 1 13420 4235 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024075 +U 1 1 58024075 +P 13420 5830 +F 0 "GND_35" H 13420 5830 20 0000 C CNN +F 1 "+GND" H 13420 5760 30 0000 C CNN +F 2 "" H 13420 5830 70 0000 C CNN +F 3 "" H 13420 5830 70 0000 C CNN + 1 13420 5830 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024074 +U 1 1 58024074 +P 2640 6820 +F 0 "GND_36" H 2640 6820 20 0000 C CNN +F 1 "+GND" H 2640 6750 30 0000 C CNN +F 2 "" H 2640 6820 70 0000 C CNN +F 3 "" H 2640 6820 70 0000 C CNN + 1 2640 6820 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58024073 +U 1 1 58024073 +P 2530 3575 +F 0 "VCCO_3V3_7" H 2530 3575 20 0000 C CNN +F 1 "+VCCO_3V3" H 2530 3505 30 0000 C CNN +F 2 "" H 2530 3575 70 0000 C CNN +F 3 "" H 2530 3575 70 0000 C CNN + 1 2530 3575 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024072 +U 1 1 58024072 +P 4840 6820 +F 0 "GND_37" H 4840 6820 20 0000 C CNN +F 1 "+GND" H 4840 6750 30 0000 C CNN +F 2 "" H 4840 6820 70 0000 C CNN +F 3 "" H 4840 6820 70 0000 C CNN + 1 4840 6820 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70 70 0 1 P +X PE9/FMC_D6 81 1210 1650 110 L 70 70 0 1 P +X PE10/FMC_D7 84 1210 1540 110 L 70 70 0 1 P +X PE11/FMC_D8 85 1210 1430 110 L 70 70 0 1 P +X PE12/FMC_D9 86 1210 1320 110 L 70 70 0 1 P +X PE13/FMC_D10 87 1210 1210 110 L 70 70 0 1 P +X PE14/FMC_D11 88 1210 1100 110 L 70 70 0 1 P +X PE15/FMC_D12 89 1210 990 110 L 70 70 0 1 P +X PD8/FMC_D13 108 1210 880 110 L 70 70 0 1 P +X PD9/FMC_D14 109 1210 770 110 L 70 70 0 1 P +X PD10/FMC_D15 110 1210 660 110 L 70 70 0 1 P +X PD14/FMC_D0 116 1210 2310 110 L 70 70 0 1 P +X PD15/FMC_D1 117 1210 2200 110 L 70 70 0 1 P +X PD0/FMC_D2 164 1210 2090 110 L 70 70 0 1 P +X PD1/FMC_D3 165 1210 1980 110 L 70 70 0 1 P +X PI6/FMC_D28 207 1210 -770 110 L 70 70 0 1 P +X PI7/FMC_D29 208 1210 -880 110 L 70 70 0 1 P +X PH8/FMC_D16 98 1210 550 110 L 70 70 0 1 P +X PH9/FMC_D17 99 1210 440 110 L 70 70 0 1 P +X PH10/FMC_D18 100 1210 330 110 L 70 70 0 1 P +X PH11/FMC_D19 101 1210 220 110 L 70 70 0 1 P +X PH12/FMC_D20 102 1210 110 110 L 70 70 0 1 P +X PI9/FMC_D30 11 1210 -990 110 L 70 70 0 1 P +X PI10/FMC_D31 12 1210 -1100 110 L 70 70 0 1 P +X PI3/FMC_D27 157 1210 -660 110 L 70 70 0 1 P +X FMC_A23/PE2 1 -1430 -220 110 R 70 70 0 1 P +X FMC_A19/PE3 2 -1430 220 110 R 70 70 0 1 P +X FMC_A20/PE4 3 -1430 110 110 R 70 70 0 1 P +X FMC_A21/PE5 4 -1430 0 110 R 70 70 0 1 P +X FMC_A22/PE6 5 -1430 -110 110 R 70 70 0 1 P +X FMC_A0/PF0 16 -1430 2310 110 R 70 70 0 1 P +X FMC_A1/PF1 17 -1430 2200 110 R 70 70 0 1 P +X FMC_A2/PF2 18 -1430 2090 110 R 70 70 0 1 P +X FMC_A3/PF3 22 -1430 1980 110 R 70 70 0 1 P +X FMC_A4/PF4 23 -1430 1870 110 R 70 70 0 1 P +X FMC_A5/PF5 24 -1430 1760 110 R 70 70 0 1 P +X FMC_A6/PF12 71 -1430 1650 110 R 70 70 0 1 P +X FMC_A7/PF13 74 -1430 1540 110 R 70 70 0 1 P +X FMC_A8/PF14 75 -1430 1430 110 R 70 70 0 1 P +X FMC_A9/PF15 76 -1430 1320 110 R 70 70 0 1 P +X FMC_A10/PG0 77 -1430 1210 110 R 70 70 0 1 P +X FMC_A11/PG1 78 -1430 1100 110 R 70 70 0 1 P +X FMC_A16/PD11 111 -1430 550 110 R 70 70 0 1 P +X FMC_A17/PD12 112 -1430 440 110 R 70 70 0 1 P +X FMC_A18/PD13 113 -1430 330 110 R 70 70 0 1 P +X FMC_A12/PG2 129 -1430 990 110 R 70 70 0 1 P +X FMC_A13/PG3 130 -1430 880 110 R 70 70 0 1 P +X FMC_A14/PG4 131 -1430 770 110 R 70 70 0 1 P +X FMC_A15/PG5 132 -1430 660 110 R 70 70 0 1 P +X FMC_A24/PG13 182 -1430 -330 110 R 70 70 0 1 P +X FMC_A25/PG14 183 -1430 -440 110 R 70 70 0 1 P +X FMC_CLK/PD3 167 -1430 -1760 110 R 70 70 0 1 P +X FMC_NOE/PD4 168 -1430 -1870 110 R 70 70 0 1 P +X FMC_NWE/PD5 169 -1430 -1980 110 R 70 70 0 1 P +X FMC_NWAIT/PD6 172 -1430 -2090 110 R 70 70 0 1 P +X FMC_NE1/PD7 173 -1430 -2200 110 R 70 70 0 1 P +X PG15/FMC_SDNCAS 191 1210 -2420 110 L 70 70 0 1 P +X PB5/FMC_SDCKE1 194 1210 -2200 110 L 70 70 0 1 P +X PB6/FMC_SDNE1 195 1210 -1870 110 L 70 70 0 1 P +X FMC_NL/PB7 196 -1430 -1430 110 R 70 70 0 1 P +X FMC_NBL2/PI4 205 -1430 -990 110 R 70 70 0 1 P +X FMC_NBL3/PI5 206 -1430 -1100 110 R 70 70 0 1 P +X FMC_NBL0/PE0 200 -1430 -770 110 R 70 70 0 1 P +X FMC_NBL1/PE1 201 -1430 -880 110 R 70 70 0 1 P +X PG8/FMC_SDCLK 135 1210 -1430 110 L 70 70 0 1 P +X PF11/FMC_SDNRAS 70 1210 -2530 110 L 70 70 0 1 P +X PC0/FMC_SDNWE 35 1210 -1540 110 L 70 70 0 1 P +X PC2/FMC_SDNE0 37 1210 -1760 110 L 70 70 0 1 P +X PC3/FMC_SDCKE0 38 1210 -2090 110 L 70 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_05.sch b/rev03-KiCad/rev02_05.sch new file mode 100644 index 0000000..6b03563 --- /dev/null +++ b/rev03-KiCad/rev02_05.sch @@ -0,0 +1,651 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 7 27 +Title "rev02_05" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3520 9185 0 60 ~ 12 +All of these input/outputs can be swapped\nwith equivalent functionality pins. +Text Notes 1540 550 0 126 ~ 12 +Input/output, STM32 +Text Notes 15323 10142 0 84 ~ 12 +ARM I/O +Text Notes 3740 1210 0 60 ~ 12 +U4 +Text Notes 3740 1430 0 60 ~ 12 +STM32F429BIT6 +Wire Wire Line + 11660 6710 10989 6710 +Text Label 10989 6710 0 70 ~ +FMC_CLK +Wire Wire Line + 11660 6380 10989 6380 +Text Label 10989 6380 0 70 ~ +FMC_NL +Wire Wire Line + 11660 6820 10989 6820 +Text Label 10989 6820 0 70 ~ +FMC_NOE +Wire Wire Line + 11660 6930 10989 6930 +Text Label 10989 6930 0 70 ~ +FMC_NWE +Wire Wire Line + 11660 7040 10989 7040 +Text Label 10989 7040 0 70 ~ +FMC_NWAIT +Wire Wire Line + 11660 7150 10989 7150 +Text Label 10989 7150 0 70 ~ +FMC_NE1 +Wire Wire Line + 14839 7370 14300 7370 +Text Label 14421 7370 0 70 ~ +FMC_SDNCAS +Wire Wire Line + 14839 7480 14300 7480 +Text Label 14421 7480 0 70 ~ +FMC_SDNRAS +Wire Wire Line + 11660 5720 10989 5720 +Text Label 10989 5720 0 70 ~ +FMC_NBL0 +Wire Wire Line + 11660 5830 10989 5830 +Text Label 10989 5830 0 70 ~ +FMC_NBL1 +Wire Wire Line + 11660 5940 10989 5940 +Text Label 10989 5940 0 70 ~ +FMC_NBL2 +Wire Wire Line + 11660 6050 10989 6050 +Text Label 10989 6050 0 70 ~ +FMC_NBL3 +Wire Wire Line + 14839 7150 14300 7150 +Text Label 14421 7150 0 70 ~ +FMC_SDCKE1 +Wire Wire Line + 14839 6820 14300 6820 +Text Label 14432 6820 0 70 ~ +FMC_SDNE1 +Entry Wire Line + 11044 2640 10989 2695 +Wire Wire Line + 11660 2640 11044 2640 +Text Label 11176 2640 0 70 ~ +FMC_A0 +Entry Wire Line + 11044 2750 10989 2805 +Wire Wire Line + 11660 2750 11044 2750 +Text Label 11176 2750 0 70 ~ +FMC_A1 +Entry Wire Line + 11044 2860 10989 2915 +Wire Wire Line + 11660 2860 11044 2860 +Text Label 11176 2860 0 70 ~ +FMC_A2 +Entry Wire Line + 11044 2970 10989 3025 +Wire Wire Line + 11660 2970 11044 2970 +Text Label 11176 2970 0 70 ~ +FMC_A3 +Entry Wire Line + 11044 3080 10989 3135 +Wire Wire Line + 11660 3080 11044 3080 +Text Label 11176 3080 0 70 ~ +FMC_A4 +Entry Wire Line + 11044 3190 10989 3245 +Wire Wire Line + 11660 3190 11044 3190 +Text Label 11176 3190 0 70 ~ +FMC_A5 +Entry Wire Line + 11044 3300 10989 3355 +Wire Wire Line + 11660 3300 11044 3300 +Text Label 11176 3300 0 70 ~ +FMC_A6 +Entry Wire Line + 11044 3410 10989 3465 +Wire Wire Line + 11660 3410 11044 3410 +Text Label 11176 3410 0 70 ~ +FMC_A7 +Entry Wire Line + 11044 3520 10989 3575 +Wire Wire Line + 11660 3520 11044 3520 +Text Label 11176 3520 0 70 ~ +FMC_A8 +Entry Wire Line + 11044 3630 10989 3685 +Wire Wire Line + 11660 3630 11044 3630 +Text Label 11176 3630 0 70 ~ +FMC_A9 +Entry Wire Line + 11044 3740 10989 3795 +Wire Wire Line + 11660 3740 11044 3740 +Text Label 11176 3740 0 70 ~ +FMC_A10 +Entry Wire Line + 11044 3850 10989 3905 +Wire Wire Line + 11660 3850 11044 3850 +Text Label 11176 3850 0 70 ~ +FMC_A11 +Entry Wire Line + 11044 3960 10989 4015 +Wire Wire Line + 11660 3960 11044 3960 +Text Label 11176 3960 0 70 ~ +FMC_A12 +Entry Wire Line + 11044 4070 10989 4125 +Wire Wire Line + 11660 4070 11044 4070 +Text Label 11176 4070 0 70 ~ +FMC_A13 +Entry Wire Line + 11044 4180 10989 4235 +Wire Wire Line + 11660 4180 11044 4180 +Text Label 11176 4180 0 70 ~ +FMC_A14 +Entry Wire Line + 11044 4290 10989 4345 +Wire Wire Line + 11660 4290 11044 4290 +Text Label 11176 4290 0 70 ~ +FMC_A15 +Entry Wire Line + 11044 4400 10989 4455 +Wire Wire Line + 11660 4400 11044 4400 +Text Label 11176 4400 0 70 ~ +FMC_A16 +Entry Wire Line + 11044 4510 10989 4565 +Wire Wire Line + 11660 4510 11044 4510 +Text Label 11176 4510 0 70 ~ +FMC_A17 +Entry Wire Line + 11044 4620 10989 4675 +Wire Wire Line + 11660 4620 11044 4620 +Text Label 11176 4620 0 70 ~ +FMC_A18 +Entry Wire Line + 11044 4730 10989 4785 +Wire Wire Line + 11660 4730 11044 4730 +Text Label 11176 4730 0 70 ~ +FMC_A19 +Entry Wire Line + 11044 4840 10989 4895 +Wire Wire Line + 11660 4840 11044 4840 +Text Label 11176 4840 0 70 ~ +FMC_A20 +Entry Wire Line + 11044 4950 10989 5005 +Wire Wire Line + 11660 4950 11044 4950 +Text Label 11176 4950 0 70 ~ +FMC_A21 +Entry Wire Line + 11044 5060 10989 5115 +Wire Wire Line + 11660 5060 11044 5060 +Text Label 11176 5060 0 70 ~ +FMC_A22 +Entry Wire Line + 11044 5170 10989 5225 +Wire Wire Line + 11660 5170 11044 5170 +Text Label 11176 5170 0 70 ~ +FMC_A23 +Entry Wire Line + 11044 5280 10989 5335 +Wire Wire Line + 11660 5280 11044 5280 +Text Label 11176 5280 0 70 ~ +FMC_A24 +Entry Wire Line + 11044 5390 10989 5390 +Wire Wire Line + 11660 5390 11044 5390 +Text Label 11176 5390 0 70 ~ +FMC_A25 +Entry Wire Line + 14795 2640 14850 2585 +Wire Wire Line + 14795 2640 14300 2640 +Text Label 14432 2640 0 70 ~ +FMC_D0 +Entry Wire Line + 14795 2750 14850 2695 +Wire Wire Line + 14795 2750 14300 2750 +Text Label 14432 2750 0 70 ~ +FMC_D1 +Entry Wire Line + 14795 2860 14850 2805 +Wire Wire Line + 14795 2860 14300 2860 +Text Label 14432 2860 0 70 ~ +FMC_D2 +Entry Wire Line + 14795 2970 14850 2915 +Wire Wire Line + 14795 2970 14300 2970 +Text Label 14432 2970 0 70 ~ +FMC_D3 +Entry Wire Line + 14795 3080 14850 3025 +Wire Wire Line + 14795 3080 14300 3080 +Text Label 14432 3080 0 70 ~ +FMC_D4 +Entry Wire Line + 14795 3190 14850 3135 +Wire Wire Line + 14795 3190 14300 3190 +Text Label 14432 3190 0 70 ~ +FMC_D5 +Entry Wire Line + 14795 3300 14850 3245 +Wire Wire Line + 14795 3300 14300 3300 +Text Label 14432 3300 0 70 ~ +FMC_D6 +Entry Wire Line + 14795 3410 14850 3355 +Wire Wire Line + 14795 3410 14300 3410 +Text Label 14432 3410 0 70 ~ +FMC_D7 +Entry Wire Line + 14795 3520 14850 3465 +Wire Wire Line + 14795 3520 14300 3520 +Text Label 14432 3520 0 70 ~ +FMC_D8 +Entry Wire Line + 14795 3630 14850 3575 +Wire Wire Line + 14795 3630 14300 3630 +Text Label 14432 3630 0 70 ~ +FMC_D9 +Entry Wire Line + 14795 3740 14850 3685 +Wire Wire Line + 14795 3740 14300 3740 +Text Label 14432 3740 0 70 ~ +FMC_D10 +Entry Wire Line + 14795 3850 14850 3795 +Wire Wire Line + 14795 3850 14300 3850 +Text Label 14432 3850 0 70 ~ +FMC_D11 +Entry Wire Line + 14795 3960 14850 3905 +Wire Wire Line + 14795 3960 14300 3960 +Text Label 14432 3960 0 70 ~ +FMC_D12 +Entry Wire Line + 14795 4070 14850 4015 +Wire Wire Line + 14795 4070 14300 4070 +Text Label 14432 4070 0 70 ~ +FMC_D13 +Entry Wire Line + 14795 4180 14850 4125 +Wire Wire Line + 14795 4180 14300 4180 +Text Label 14432 4180 0 70 ~ +FMC_D14 +Entry Wire Line + 14795 4290 14850 4235 +Wire Wire Line + 14795 4290 14300 4290 +Text Label 14432 4290 0 70 ~ +FMC_D15 +Entry Wire Line + 14795 4400 14850 4345 +Wire Wire Line + 14795 4400 14300 4400 +Text Label 14432 4400 0 70 ~ +FMC_D16 +Entry Wire Line + 14795 4510 14850 4455 +Wire Wire Line + 14795 4510 14300 4510 +Text Label 14432 4510 0 70 ~ +FMC_D17 +Entry Wire Line + 14795 4620 14850 4565 +Wire Wire Line + 14795 4620 14300 4620 +Text Label 14432 4620 0 70 ~ +FMC_D18 +Entry Wire Line + 14795 4730 14850 4675 +Wire Wire Line + 14795 4730 14300 4730 +Text Label 14432 4730 0 70 ~ +FMC_D19 +Entry Wire Line + 14795 4840 14850 4785 +Wire Wire Line + 14795 4840 14300 4840 +Text Label 14432 4840 0 70 ~ +FMC_D20 +Entry Wire Line + 14795 4950 14850 4895 +Wire Wire Line + 14795 4950 14300 4950 +Text Label 14432 4950 0 70 ~ +FMC_D21 +Entry Wire Line + 14795 5060 14850 5005 +Wire Wire Line + 14795 5060 14300 5060 +Text Label 14432 5060 0 70 ~ +FMC_D22 +Entry Wire Line + 14795 5170 14850 5115 +Wire Wire Line + 14795 5170 14300 5170 +Text Label 14432 5170 0 70 ~ +FMC_D23 +Entry Wire Line + 14795 5280 14850 5225 +Wire Wire Line + 14795 5280 14300 5280 +Text Label 14432 5280 0 70 ~ +FMC_D24 +Entry Wire Line + 14795 5390 14850 5335 +Wire Wire Line + 14795 5390 14300 5390 +Text Label 14432 5390 0 70 ~ +FMC_D25 +Entry Wire Line + 14795 5500 14850 5445 +Wire Wire Line + 14795 5500 14300 5500 +Text Label 14432 5500 0 70 ~ +FMC_D26 +Entry Wire Line + 14795 5610 14850 5555 +Wire Wire Line + 14795 5610 14300 5610 +Text Label 14432 5610 0 70 ~ +FMC_D27 +Entry Wire Line + 14795 5720 14850 5665 +Wire Wire Line + 14795 5720 14300 5720 +Text Label 14432 5720 0 70 ~ +FMC_D28 +Entry Wire Line + 14795 5830 14850 5775 +Wire Wire Line + 14795 5830 14300 5830 +Text Label 14432 5830 0 70 ~ +FMC_D29 +Entry Wire Line + 14795 5940 14850 5885 +Wire Wire Line + 14795 5940 14300 5940 +Text Label 14432 5940 0 70 ~ +FMC_D30 +Entry Wire Line + 14795 6050 14850 5995 +Wire Wire Line + 14795 6050 14300 6050 +Text Label 14432 6050 0 70 ~ +FMC_D31 +Wire Wire Line + 14839 7040 14300 7040 +Text Label 14421 7040 0 70 ~ +FMC_SDCKE0 +Wire Wire Line + 14839 6710 14300 6710 +Text Label 14432 6710 0 70 ~ +FMC_SDNE0 +Wire Wire Line + 14839 6490 14300 6490 +Text Label 14432 6490 0 70 ~ +FMC_SDNWE +Wire Wire Line + 14839 6380 14300 6380 +Text Label 14432 6380 0 70 ~ +FMC_SDCLK +Wire Wire Line + 3410 2090 2475 2090 +Text Label 2475 2090 0 70 ~ +FT_TXD +Wire Wire Line + 3410 1980 2475 1980 +Text Label 2475 1980 0 70 ~ +FT_RXD +Wire Wire Line + 7755 3630 6820 3630 +Text Label 7040 3630 0 70 ~ +AVR_GPIO_ARM_1 +Wire Wire Line + 7755 3740 6820 3740 +Text Label 7040 3740 0 70 ~ +AVR_GPIO_ARM_0 +Wire Wire Line + 3410 5720 2475 5720 +Text Label 2475 5720 0 70 ~ +RTC_SCL +Wire Wire Line + 3410 5610 2475 5610 +Text Label 2475 5610 0 70 ~ +RTC_SDA +Wire Wire Line + 3410 5830 2475 5830 +Text Label 2475 5830 0 70 ~ +RTC_MFP +Wire Wire Line + 7700 6050 6820 6050 +Text Label 7040 6050 0 70 ~ +FPGA_IRQ_N_0 +Wire Wire Line + 7700 6160 6820 6160 +Text Label 7040 6160 0 70 ~ +FPGA_IRQ_N_1 +Wire Wire Line + 7700 6270 6820 6270 +Text Label 7040 6270 0 70 ~ +FPGA_IRQ_N_2 +Wire Wire Line + 7700 6380 6820 6380 +Text Label 7040 6380 0 70 ~ +FPGA_IRQ_N_3 +Wire Wire Line + 7700 5830 6820 5830 +Text Label 7040 5830 0 70 ~ +FPGA_PROGRAM_B +Wire Wire Line + 7700 5720 6820 5720 +Text Label 7040 5720 0 70 ~ +FPGA_INIT_B +Wire Wire Line + 3410 3520 2475 3520 +Text Label 2475 3520 0 70 ~ +ARM_FPGA_CFG_SCLK +Wire Wire Line + 3410 3630 2475 3630 +Text Label 2475 3630 0 70 ~ +ARM_FPGA_CFG_MISO +Wire Wire Line + 3410 3740 2475 3740 +Text Label 2475 3740 0 70 ~ +ARM_FPGA_CFG_MOSI +Wire Wire Line + 3410 4180 2475 4180 +Text Label 2475 4180 0 70 ~ +KSM_PROM_SCLK +Wire Wire Line + 3410 4290 2475 4290 +Text Label 2475 4290 0 70 ~ +KSM_PROM_MISO +Wire Wire Line + 3410 4400 2475 4400 +Text Label 2475 4400 0 70 ~ +KSM_PROM_MOSI +Wire Wire Line + 3410 2310 2475 2310 +Text Label 2475 2310 0 70 ~ +FT_RTS +Wire Wire Line + 3410 2200 2475 2200 +Text Label 2475 2200 0 70 ~ +FT_CTS +Wire Wire Line + 3410 2750 2475 2750 +Text Label 2475 2750 0 70 ~ +FT_MGMT_RXD +Wire Wire Line + 3410 2860 2475 2860 +Text Label 2475 2860 0 70 ~ +FT_MGMT_TXD +Wire Wire Line + 3410 2970 2475 2970 +Text Label 2475 2970 0 70 ~ +FT_MGMT_CTS +Wire Wire Line + 3410 3080 2475 3080 +Text Label 2475 3080 0 70 ~ +FT_MGMT_RTS +Wire Wire Line + 7700 6600 6820 6600 +Text Label 7040 6600 0 70 ~ +FPGA_DONE +Wire Wire Line + 3410 1870 2475 1870 +Text Label 2475 1870 0 70 ~ +FT_DTR +Wire Wire Line + 3410 2640 2475 2640 +Text Label 2475 2640 0 70 ~ +FT_MGMT_DTR +Wire Wire Line + 3410 3410 2475 3410 +Text Label 2475 3410 0 70 ~ +ARM_FPGA_CFG_CS_N +Wire Wire Line + 3410 4070 2475 4070 +Text Label 2475 4070 0 70 ~ +KSM_PROM_CS_N +Wire Wire Line + 3410 6930 2475 6930 +Text Label 2475 6930 0 70 ~ +AVR_GPIO_ARM_2 +Wire Wire Line + 3410 6820 2475 6820 +Text Label 2475 6820 0 70 ~ +AVR_GPIO_ARM_3 +Wire Bus Line + 16390 2420 14850 2420 +Wire Bus Line + 14850 2420 14850 6050 +Text Label 14850 2420 0 70 ~ +FMC_D[0..31]FMC_A[0..25] +Wire Bus Line + 10989 2420 10989 5390 +Wire Bus Line + 10989 2420 9449 2420 +Text Label 9449 2420 0 70 ~ +FMC_D[0..31]FMC_A[0..25] +Wire Wire Line + 7700 7370 6820 7370 +Text Label 7040 7370 0 70 ~ +ARM_LED1 +Wire Wire Line + 7700 7480 6820 7480 +Text Label 7040 7480 0 70 ~ +ARM_LED2 +Wire Wire Line + 7700 7590 6820 7590 +Text Label 7040 7590 0 70 ~ +ARM_LED3 +Wire Wire Line + 7700 7700 6820 7700 +Text Label 7040 7700 0 70 ~ +ARM_LED4 +Wire Wire Line + 7700 4510 6820 4510 +Text Label 7040 4510 0 70 ~ +FPGA_CFG_CTRL_FPGA_DIS +Wire Wire Line + 7700 1870 6820 1870 +Text Label 7040 1870 0 70 ~ +FPGA_CFG_CTRL_ARM_ENA +$Comp +L STM32F429BIT6_4 IC87 +U 1 1 58024052 + 1 13090 4950 + 1 0 0 -1 +$EndComp +$Comp +L STM32F429BIT6_1 IC88 +U 1 1 58024051 + 1 5170 5060 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_06-cache.lib b/rev03-KiCad/rev02_06-cache.lib new file mode 100644 index 0000000..10d31b9 --- /dev/null +++ b/rev03-KiCad/rev02_06-cache.lib @@ -0,0 +1,129 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" -110 -330 60 H V L BNN +F1 "C-EUC0402" -110 -396 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# IS45S32160F +# +DEF IS45S32160F IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "IS45S32160F" -1496 2475 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 1210 -2420 -1210 -2420 +P 2 0 1 10 1210 2420 1210 -2420 +P 2 0 1 10 -1210 2420 1210 2420 +P 2 0 1 10 -1210 -2420 -1210 2420 +X VDD 1 -660 2530 110 D 70 70 0 1 W +X DQ0 2 1320 2200 110 L 70 70 0 1 P +X VDDQ 3 -110 2530 110 D 70 70 0 1 W +X DQ1 4 1320 2090 110 L 70 70 0 1 P +X DQ2 5 1320 1980 110 L 70 70 0 1 P +X VSSQ 6 -660 -2530 110 U 70 70 0 1 W +X DQ3 7 1320 1870 110 L 70 70 0 1 P +X DQ4 8 1320 1760 110 L 70 70 0 1 P +X DQ5 10 1320 1650 110 L 70 70 0 1 P +X DQ6 11 1320 1540 110 L 70 70 0 1 P +X VSSQ 12 -550 -2530 110 U 70 70 0 1 W +X DQ7 13 1320 1430 110 L 70 70 0 1 P +X VDD 15 -550 2530 110 D 70 70 0 1 W +X DQM0 16 1320 -1430 110 L 70 70 0 1 P +X ~WE 17 -1320 -2090 110 R 70 70 0 1 P +X ~CAS 18 -1320 220 110 R 70 70 0 1 P +X ~RAS 19 -1320 110 110 R 70 70 0 1 P +X ~CS 20 -1320 -1540 110 R 70 70 0 1 P +X A11 21 -1320 990 110 R 70 70 0 1 P +X BA0 22 -1320 550 110 R 70 70 0 1 P +X BA1 23 -1320 440 110 R 70 70 0 1 P +X A10 24 -1320 1100 110 R 70 70 0 1 P +X A0 25 -1320 2200 110 R 70 70 0 1 P +X A1 26 -1320 2090 110 R 70 70 0 1 P +X A2 27 -1320 1980 110 R 70 70 0 1 P +X DQM2 28 1320 -1650 110 L 70 70 0 1 P +X VDD 29 -440 2530 110 D 70 70 0 1 W +X DQ16 31 1320 440 110 L 70 70 0 1 P +X VSSQ 32 -440 -2530 110 U 70 70 0 1 W +X DQ17 33 1320 330 110 L 70 70 0 1 P +X DQ18 34 1320 220 110 L 70 70 0 1 P +X VDDQ 35 0 2530 110 D 70 70 0 1 W +X DQ19 36 1320 110 110 L 70 70 0 1 P +X DQ20 37 1320 0 110 L 70 70 0 1 P +X VSSQ 38 -330 -2530 110 U 70 70 0 1 W +X DQ21 39 1320 -110 110 L 70 70 0 1 P +X DQ22 40 1320 -220 110 L 70 70 0 1 P +X VDDQ 41 110 2530 110 D 70 70 0 1 W +X DQ23 42 1320 -330 110 L 70 70 0 1 P +X VDD 43 -330 2530 110 D 70 70 0 1 W +X VSS 44 330 -2530 110 U 70 70 0 1 W +X DQ24 45 1320 -440 110 L 70 70 0 1 P +X VSSQ 46 -220 -2530 110 U 70 70 0 1 W +X DQ25 47 1320 -550 110 L 70 70 0 1 P +X DQ26 48 1320 -660 110 L 70 70 0 1 P +X VDDQ 49 220 2530 110 D 70 70 0 1 W +X DQ27 50 1320 -770 110 L 70 70 0 1 P +X DQ28 51 1320 -880 110 L 70 70 0 1 P +X VSSQ 52 -110 -2530 110 U 70 70 0 1 W +X DQ29 53 1320 -990 110 L 70 70 0 1 P +X DQ30 54 1320 -1100 110 L 70 70 0 1 P +X VDDQ 55 330 2530 110 D 70 70 0 1 W +X DQ31 56 1320 -1210 110 L 70 70 0 1 P +X VSS 58 440 -2530 110 U 70 70 0 1 W +X DQM3 59 1320 -1760 110 L 70 70 0 1 P +X A3 60 -1320 1870 110 R 70 70 0 1 P +X A4 61 -1320 1760 110 R 70 70 0 1 P +X A5 62 -1320 1650 110 R 70 70 0 1 P +X A6 63 -1320 1540 110 R 70 70 0 1 P +X A7 64 -1320 1430 110 R 70 70 0 1 P +X A8 65 -1320 1320 110 R 70 70 0 1 P +X A9 66 -1320 1210 110 R 70 70 0 1 P +X CKE 67 -1320 -990 110 R 70 70 0 1 P +X CLK 68 -1320 -440 110 R 70 70 0 1 P +X A12 69 -1320 880 110 R 70 70 0 1 P +X DQM1 71 1320 -1540 110 L 70 70 0 1 P +X VSS 72 550 -2530 110 U 70 70 0 1 W +X DQ8 74 1320 1320 110 L 70 70 0 1 P +X VDDQ 75 440 2530 110 D 70 70 0 1 W +X DQ9 76 1320 1210 110 L 70 70 0 1 P +X DQ10 77 1320 1100 110 L 70 70 0 1 P +X VSSQ 78 0 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\ No newline at end of file diff --git a/rev03-KiCad/rev02_07-cache.lib b/rev03-KiCad/rev02_07-cache.lib new file mode 100644 index 0000000..c8b3029 --- /dev/null +++ b/rev03-KiCad/rev02_07-cache.lib @@ -0,0 +1,74 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# N25Q128A13ES +# +DEF N25Q128A13ES IC 0 40 Y Y 1 F N +F0 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mode 100644 index 0000000..59536c4 --- /dev/null +++ b/rev03-KiCad/rev02_07.sch @@ -0,0 +1,190 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 9 27 +Title "rev02_07" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 9790 4620 0 60 ~ 12 +*) HOLD feature not used +Text Notes 7040 3080 0 84 ~ 12 +This memory holds cryptographic keys\nwrapped with the master key. +Text Notes 7040 2420 0 126 ~ 12 +Keystore memory, 128 Mbit +Text Notes 15004 10153 0 84 ~ 12 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6897 5060 0 70 ~ +KSM_PROM_MISO +Wire Wire Line + 7700 5170 6820 5170 +Wire Wire Line + 6820 4730 6820 5170 +$Comp +L N25Q128A13ES IC113 +U 1 1 5802402B +F 1 "N25Q128A13ESE*" H 8217 5632 60 0000 L BNN +F 2 "" H 8217 5632 60 0000 C CNN +F 3 "" H 8217 5632 60 0000 C CNN + 1 8470 5225 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R18 +U 1 1 5802402A +F 0 "R18" V 7635.1 4675 60 0000 L BNN +F 1 "" V 7733 4664 60 0000 L BNN +F 2 "" H 7733 4664 60 0000 C CNN +F 3 "" H 7733 4664 60 0000 C CNN + 1 7700 4510 + 0 1 1 0 +$EndComp +$Comp +L C-EUC0402 IC115 +U 1 1 58024029 + 1 10670 5500 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R17 +U 1 1 58024028 +F 0 "R17" V 6754 4158 60 0000 L BNN +F 1 "" V 6853 4147 60 0000 L BNN +F 2 "" H 6853 4147 60 0000 C CNN +F 3 "" H 6853 4147 60 0000 C CNN + 1 6820 4510 + 0 1 1 0 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_08-cache.lib b/rev03-KiCad/rev02_08-cache.lib new file mode 100644 index 0000000..7d52f16 --- /dev/null +++ b/rev03-KiCad/rev02_08-cache.lib @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# 3V3_BATT +# +DEF 3V3_BATT #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "3V3_BATT" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X 3V3_BATT 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" -374 88 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S 88 -66 -88 -88 0 1 10 f +S 88 -22 -88 -44 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# MCP79412-I/SN +# +DEF MCP79412-I/SN IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "MCP79412-I/SN" -462 473 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -440 -660 -440 440 +P 2 0 1 10 440 -660 -440 -660 +P 2 0 1 10 440 440 440 -660 +P 2 0 1 10 -440 440 440 440 +X VCC 8 -660 220 220 R 70 70 0 1 W +X VBAT 3 -660 110 220 R 70 70 0 1 W +X X1 1 -660 -110 220 R 70 70 0 1 P +X X2 2 -660 -220 220 R 70 70 0 1 P +X VSS 4 -660 -440 220 R 70 70 0 1 W +X SDA 5 660 -110 220 L 70 70 0 1 P +X SCL 6 660 0 220 L 70 70 0 1 P +X MFP 7 660 110 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" 770 220 60 H V L BNN +F1 "R-EU_R0402" 330 -110 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# XTAL-3.2X1.5 +# +DEF XTAL-3.2X1.5 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XTAL-3.2X1.5" -187 -825 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -110 -110 -110 110 +P 2 0 1 10 110 -110 110 110 +P 2 0 1 10 -55 -110 -55 110 +P 2 0 1 10 55 -110 -55 -110 +P 2 0 1 10 55 110 55 -110 +P 2 0 1 10 -55 110 55 110 +X P$1 P$1 -220 0 110 R 1 1 0 1 P +X P$2 P$2 220 0 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_08.sch b/rev03-KiCad/rev02_08.sch new file mode 100644 index 0000000..3121bb1 --- /dev/null +++ b/rev03-KiCad/rev02_08.sch @@ -0,0 +1,259 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 10 27 +Title "rev02_08" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 7546 5126 0 60 ~ 12 +CL 12.5 pF +Text Notes 9680 5720 0 60 ~ 12 +MFP is Multi Function Pin.\nGPIO output from RTC. +Text Notes 9240 3960 0 60 ~ 12 +i2c pull-ups, typically 10K for 100kHz +Text Notes 6820 2640 0 126 ~ 12 +Real Time Clock +Text Notes 15103 10142 0 84 ~ 12 +Real Time Clock +Text Notes 8360 4466 0 60 ~ 12 +U7 +Text Label 7513 5720 0 70 ~ +5pF +Text Label 6336 5742 0 70 ~ +5pF +Text Notes 6864 6204 0 60 ~ 12 +X1 +Text Label 10780 4609 0 70 ~ +10k +Text Label 10780 4499 0 70 ~ +10k +Text Label 10791 4389 0 70 ~ +10k +$Comp +L GND #PWR?58024027 +U 1 1 58024027 +P 7920 5940 +F 0 "GND_46" H 7920 5940 20 0000 C CNN +F 1 "+GND" H 7920 5870 30 0000 C CNN +F 2 "" H 7920 5940 70 0000 C CNN +F 3 "" H 7920 5940 70 0000 C CNN + 1 7920 5940 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58024026 +U 1 1 58024026 +P 7590 4180 +F 0 "3V3_BATT_2" H 7590 4180 20 0000 C CNN +F 1 "+3V3_BATT" H 7590 4110 30 0000 C CNN +F 2 "" H 7590 4180 70 0000 C CNN +F 3 "" H 7590 4180 70 0000 C CNN + 1 7590 4180 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58024025 +U 1 1 58024025 +P 8140 4180 +F 0 "VCCO_3V3_15" H 8140 4180 20 0000 C CNN +F 1 "+VCCO_3V3" H 8140 4110 30 0000 C CNN +F 2 "" H 8140 4180 70 0000 C CNN +F 3 "" H 8140 4180 70 0000 C CNN + 1 8140 4180 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024024 +U 1 1 58024024 +P 6710 5940 +F 0 "GND_47" H 6710 5940 20 0000 C CNN +F 1 "+GND" H 6710 5870 30 0000 C CNN +F 2 "" H 6710 5940 70 0000 C CNN +F 3 "" H 6710 5940 70 0000 C CNN + 1 6710 5940 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024023 +U 1 1 58024023 +P 7370 5940 +F 0 "GND_48" H 7370 5940 20 0000 C CNN +F 1 "+GND" H 7370 5870 30 0000 C CNN +F 2 "" H 7370 5940 70 0000 C CNN +F 3 "" H 7370 5940 70 0000 C CNN + 1 7370 5940 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7590 4180 7590 4950 +Wire Wire Line + 8140 4950 7590 4950 +Wire Wire Line + 8140 5500 7920 5500 +Wire Wire Line + 7920 5500 7920 5940 +Wire Wire Line + 7370 5830 7370 5940 +Wire Wire Line + 6710 5830 6710 5940 +Wire Wire Line + 8140 4180 8140 4840 +Wire Wire Line + 6820 5500 6710 5500 +Wire Wire Line + 8140 5170 6710 5170 +Wire Wire Line + 6710 5170 6710 5500 +Connection ~ 6710 5500 +Wire Wire Line + 7370 5500 7260 5500 +Wire Wire Line + 8140 5280 7370 5280 +Wire Wire Line + 7370 5280 7370 5500 +Connection ~ 7370 5500 +Wire Wire Line + 10230 4950 9460 4950 +Wire Wire Line + 10450 4950 10230 4950 +Wire Wire Line + 10230 4840 10230 4950 +Text Label 10450 4950 0 70 ~ +RTC_MFP +Connection ~ 10230 4950 +Wire Wire Line + 10010 5060 9460 5060 +Wire Wire Line + 10450 5060 10010 5060 +Wire Wire Line + 10010 4840 10010 5060 +Text Label 10450 5060 0 70 ~ +RTC_SCL +Connection ~ 10010 5060 +Wire Wire Line + 9790 5170 9460 5170 +Wire Wire Line + 10450 5170 9790 5170 +Wire Wire Line + 9790 4840 9790 5170 +Text Label 10450 5170 0 70 ~ +RTC_SDA +Connection ~ 9790 5170 +Wire Wire Line + 10010 4180 10010 4290 +Wire Wire Line + 10010 4290 10010 4400 +Wire Wire Line + 9790 4290 9790 4400 +Wire Wire Line + 10010 4290 9790 4290 +Wire Wire Line + 10230 4290 10010 4290 +Wire Wire Line + 10230 4290 10230 4400 +Connection ~ 10010 4290 +$Comp +L VCCO_3V3 #PWR?58024022 +U 1 1 58024022 +P 10010 4180 +F 0 "VCCO_3V3_16" H 10010 4180 20 0000 C CNN +F 1 "+VCCO_3V3" H 10010 4110 30 0000 C CNN +F 2 "" H 10010 4180 70 0000 C CNN +F 3 "" H 10010 4180 70 0000 C CNN + 1 10010 4180 + 1 0 0 -1 +$EndComp +$Comp +L MCP79412-I/SN IC117 +U 1 1 58024021 +F 1 "MCP79412-I/SN" H 8338 5533 60 0000 L BNN +F 2 "" H 8338 5533 60 0000 C CNN +F 3 "" H 8338 5533 60 0000 C CNN + 1 8800 5060 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C71 +U 1 1 58024020 +F 0 "C71" H 7227 5621 60 0000 R TNN + 1 7370 5720 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 C70 +U 1 1 5802401F +F 0 "C70" H 7084 5632 60 0000 R TNN + 1 6710 5720 + -1 0 0 1 +$EndComp +$Comp +L XTAL-3.2X1.5 IC120 +U 1 1 5802401E +F 1 "ABS07-32.768KHZ-T" H 6853 4675 60 0000 L BNN +F 2 "" H 6853 4675 60 0000 C CNN +F 3 "" H 6853 4675 60 0000 C CNN + 1 7040 5500 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R21 +U 1 1 5802401D +F 0 "R21" V 10230 4950 60 0000 L BNN +F 1 "" V 10340 4950 60 0000 L BNN +F 2 "" H 10340 4950 60 0000 C CNN +F 3 "" H 10340 4950 60 0000 C CNN + 1 10230 4620 + 0 1 1 0 +$EndComp +$Comp +L R-EU_R0402 R20 +U 1 1 5802401C +F 0 "R20" V 9900 5170 60 0000 L BNN + 1 10010 4620 + 0 1 1 0 +$EndComp +$Comp +L R-EU_R0402 R19 +U 1 1 5802401B +F 0 "R19" V 9570 5390 60 0000 L BNN + 1 9790 4620 + 0 1 1 0 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_09-cache.lib b/rev03-KiCad/rev02_09-cache.lib new file mode 100644 index 0000000..1263639 --- /dev/null +++ b/rev03-KiCad/rev02_09-cache.lib @@ -0,0 +1,370 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# FT_VCC3V3 +# +DEF FT_VCC3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FT_VCC3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FT_VCC3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# FT_VREGIN +# +DEF FT_VREGIN #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FT_VREGIN" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FT_VREGIN 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# FT_VPHY +# +DEF FT_VPHY #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FT_VPHY" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FT_VPHY 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# FT_VPLL +# +DEF FT_VPLL #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FT_VPLL" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FT_VPLL 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" -440 -110 60 H V L BNN +F1 "C-EUC0402" -440 -220 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +S 88 -66 -88 -88 0 1 10 f +S 88 -22 -88 -44 0 1 10 f +ENDDRAW +ENDDEF +# +# C-EUC0603 +# +DEF C-EUC0603 IC 0 40 Y Y 1 F N +F0 "C" -319 88 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0805 +# +DEF C-EUC0805 IC 0 40 Y Y 1 F N +F0 "C" -319 -77 60 H V L BNN +F1 "C-EUC0805" -429 -187 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# CRYSTALTHIN +# +DEF CRYSTALTHIN IC 0 40 Y Y 1 F N +F0 "Y" -110 132 60 H V L BNN +F1 "CRYSTALTHIN" 902 154 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -11 -66 -11 66 +P 2 0 1 10 22 -66 -11 -66 +P 2 0 1 10 22 66 22 -66 +P 2 0 1 10 -11 66 22 66 +P 2 0 1 10 -44 0 -44 77 +P 2 0 1 10 -44 -77 -44 0 +P 2 0 1 10 44 0 44 77 +P 2 0 1 10 44 -77 44 0 +P 2 0 1 10 -44 0 -110 0 +P 2 0 1 10 44 0 110 0 +X 1 1 -121 0 11 R 1 1 0 1 P +X 3 3 121 0 11 L 1 1 0 1 P +X 2 2 -110 -110 110 R 1 1 0 1 P +X 4 4 110 -110 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# FERRITE_0603MP +# +DEF FERRITE_0603MP IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 55 33 -55 33 +P 2 0 1 10 55 -44 55 33 +P 2 0 1 10 -55 -44 55 -44 +P 2 0 1 10 -55 33 -55 -44 +X P$1 1 -110 0 110 R 1 1 0 1 P +X P$2 2 110 0 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# FT232H_SERIAL +# +DEF FT232H_SERIAL IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "FT232H_SERIAL" -1232 1672 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 990 1430 -990 1430 +P 2 0 1 10 990 -1430 990 1430 +P 2 0 1 10 -990 -1430 990 -1430 +P 2 0 1 10 -990 1430 -990 -1430 +X VREGIN 40 -1210 1320 220 R 70 70 0 1 W +X VCCD 39 -1210 1100 220 R 70 70 0 1 W +X VCCORE 38 -1210 990 220 R 70 70 0 1 W +X VCCA 37 -1210 880 220 R 70 70 0 1 W +X DM 6 -1210 660 220 R 70 70 0 1 P +X DP 7 -1210 550 220 R 70 70 0 1 P +X ~RESET 34 -1210 330 220 R 70 70 0 1 P +X REF 5 -1210 110 220 R 70 70 0 1 P +X EECS 45 -1210 -330 220 R 70 70 0 1 O +X EECLK 44 -1210 -440 220 R 70 70 0 1 O +X EEDATA 43 -1210 -550 220 R 70 70 0 1 P +X XCSI 1 -1210 -770 220 R 70 70 0 1 P +X XCSO 2 -1210 -1100 220 R 70 70 0 1 P +X TEST 42 -1210 -1320 220 R 70 70 0 1 P +X TXD 13 1210 1320 220 L 70 70 0 1 O +X RXD 14 1210 1210 220 L 70 70 0 1 P +X RTS# 15 1210 1100 220 L 70 70 0 1 O +X CTS# 16 1210 990 220 L 70 70 0 1 P +X DTR# 17 1210 880 220 L 70 70 0 1 O +X DSR# 18 1210 770 220 L 70 70 0 1 P +X DCD# 19 1210 660 220 L 70 70 0 1 P +X RI# 20 1210 550 220 L 70 70 0 1 P +X TXDEN 21 1210 330 220 L 70 70 0 1 O +X ACBUS1 25 1210 220 220 L 70 70 0 1 P +X ACBUS2 26 1210 110 220 L 70 70 0 1 P +X RXLED# 27 1210 0 220 L 70 70 0 1 O +X TXLED# 28 1210 -110 220 L 70 70 0 1 O +X ACBUS5 29 1210 -220 220 L 70 70 0 1 P +X ACBUS6 30 1210 -330 220 L 70 70 0 1 P +X PWRSAV# 31 1210 -440 220 L 70 70 0 1 P +X ACBUS8 32 1210 -550 220 L 70 70 0 1 P +X ACBUS9 33 1210 -660 220 L 70 70 0 1 P +X AGND 4 -440 -1650 220 U 70 70 0 1 W +X AGND 9 -330 -1650 220 U 70 70 0 1 W +X AGND 41 -220 -1650 220 U 70 70 0 1 W +X GND 10 -110 -1650 220 U 70 70 0 1 W +X GND 11 0 -1650 220 U 70 70 0 1 W +X GND 22 110 -1650 220 U 70 70 0 1 W +X GND 23 220 -1650 220 U 70 70 0 1 W +X GND 35 330 -1650 220 U 70 70 0 1 W +X GND 36 440 -1650 220 U 70 70 0 1 W +X GND 47 550 -1650 220 U 70 70 0 1 W +X GND 48 660 -1650 220 U 70 70 0 1 W +X VPHY 3 -220 1650 220 D 70 70 0 1 P +X VPLL 8 -110 1650 220 D 70 70 0 1 P +X VCCIO 12 0 1650 220 D 70 70 0 1 W +X VCCIO 24 110 1650 220 D 70 70 0 1 W +X VCCIO 46 220 1650 220 D 70 70 0 1 W +ENDDRAW +ENDDEF +# +# M03X2NO_SILK +# +DEF M03X2NO_SILK IC 0 40 Y Y 1 F N +F0 "J" -231 -341 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 220 220 -220 220 +P 2 0 1 10 220 110 220 220 +P 2 0 1 10 220 0 220 110 +P 2 0 1 10 220 -110 220 0 +P 2 0 1 10 220 -220 220 -110 +P 2 0 1 10 -220 -220 220 -220 +P 2 0 1 10 -220 -110 -220 -220 +P 2 0 1 10 -220 0 -220 -110 +P 2 0 1 10 -220 110 -220 0 +P 2 0 1 10 -220 220 -220 110 +P 2 0 1 10 -121 110 -220 110 +P 2 0 1 10 -121 0 -220 0 +P 2 0 1 10 -121 -110 -220 -110 +P 2 0 1 10 121 -110 220 -110 +P 2 0 1 10 121 0 220 0 +P 2 0 1 10 121 110 220 110 +A -77 110 44 0 1200 1 1 10 N -33 110 -99 148 +A -77 110 44 1200 -1200 1 1 10 N -99 148 -99 71 +A -77 110 44 -1200 0 1 1 10 N -99 71 -33 110 +A 77 110 44 0 1200 1 1 10 N 121 110 54 148 +A 77 110 44 1200 -1200 1 1 10 N 54 148 54 71 +A 77 110 44 -1200 0 1 1 10 N 54 71 121 110 +A 77 0 44 0 1200 1 1 10 N 121 0 54 38 +A 77 0 44 1200 -1200 1 1 10 N 54 38 54 -38 +A 77 0 44 -1200 0 1 1 10 N 54 -38 121 0 +A 77 -110 44 0 1200 1 1 10 N 121 -110 54 -71 +A 77 -110 44 1200 -1200 1 1 10 N 54 -71 54 -148 +A 77 -110 44 -1200 0 1 1 10 N 54 -148 121 -110 +A -77 -110 44 0 1200 1 1 10 N -33 -110 -99 -71 +A -77 -110 44 1200 -1200 1 1 10 N -99 -71 -99 -148 +A -77 -110 44 -1200 0 1 1 10 N -99 -148 -33 -110 +A -77 0 44 0 1200 1 1 10 N -33 0 -99 38 +A -77 0 44 1200 -1200 1 1 10 N -99 38 -99 -38 +A -77 0 44 -1200 0 1 1 10 N -99 -38 -33 0 +X 1 1 -330 110 110 R 1 1 0 1 P +X 3 3 -330 0 110 R 1 1 0 1 P +X 5 5 -330 -110 110 R 1 1 0 1 P +X 6 6 330 -110 110 L 1 1 0 1 P +X 4 4 330 0 110 L 1 1 0 1 P +X 2 2 330 110 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" 110 110 60 H V L BNN +F1 "R-EU_R0402" 110 0 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +ENDDRAW +ENDDEF +# +# RCLAMP0502ASC-89 +# +DEF RCLAMP0502ASC-89 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "RCLAMP0502ASC-89" -440 -363 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -440 -220 440 -220 +P 2 0 1 10 -440 220 -440 -220 +P 2 0 1 10 440 220 -440 220 +P 2 0 1 10 440 -220 440 220 +X OUT1 1 550 110 110 L 70 70 0 1 O +X GND 2 550 0 110 L 70 70 0 1 W +X OUT2 3 550 -110 110 L 70 70 0 1 O +X IN2 4 -550 -110 110 R 70 70 0 1 P +X VCC 5 -550 0 110 R 70 70 0 1 W +X IN1 6 -550 110 110 R 70 70 0 1 P +ENDDRAW +ENDDEF +# +# USBMINIB +# +DEF USBMINIB IC 0 40 Y Y 1 F N +F0 "CN" -462 -451 60 H V L BNN +F1 "USBMINIB" -462 341 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -440 330 -451 330 +P 2 0 1 10 330 330 -440 330 +P 2 0 1 10 330 -330 330 330 +P 2 0 1 10 -154 66 -66 66 +P 2 0 1 10 -187 66 -154 66 +P 2 0 1 10 -198 132 -242 132 +P 2 0 1 10 -220 0 -275 0 +P 2 0 1 10 -187 66 -220 0 +P 2 0 1 10 -154 66 -198 132 +P 2 0 1 10 -352 66 -187 66 +P 2 0 1 10 -352 33 -352 66 +P 2 0 1 10 -352 33 -352 33 +P 2 0 1 10 -396 66 -352 33 +P 2 0 1 10 -352 99 -396 66 +P 2 0 1 10 -352 99 -352 44 +P 2 0 1 10 -352 99 -352 99 +P 2 0 1 10 -352 66 -352 99 +P 2 0 1 10 -374 55 -374 66 +P 2 0 1 10 -363 44 -374 55 +P 2 0 1 10 -363 77 -363 44 +P 2 0 1 10 -385 66 -363 77 +P 2 0 1 10 -440 -330 -440 330 +P 2 0 1 10 330 -330 -440 -330 +S -319 -22 -264 33 0 1 10 f +A -66 66 22 0 1200 1 1 30 N -44 66 -77 85 +A -66 66 22 1200 -1200 1 1 30 N -77 85 -77 46 +A -66 66 22 -1200 0 1 1 30 N -77 46 -44 66 +A -264 132 0 0 1200 1 1 30 N -264 132 -264 132 +A -264 132 0 1200 -1200 1 1 30 N -264 132 -264 132 +A -264 132 0 -1200 0 1 1 30 N -264 132 -264 132 +X D+ D+ 440 110 110 L 1 70 0 1 P +X D- D- 440 0 110 L 1 70 0 1 P +X VBUS VBUS 440 220 110 L 1 70 0 1 W +X GND GND 440 -220 110 L 1 70 0 1 W +X ID ID 440 -110 110 L 1 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_09.sch b/rev03-KiCad/rev02_09.sch new file mode 100644 index 0000000..03b8bca --- /dev/null +++ b/rev03-KiCad/rev02_09.sch @@ -0,0 +1,1045 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 11 27 +Title "rev02_09" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 5500 1980 0 60 ~ 12 +DS_FT232H.pdf\n6.1 USB Bus Powered Configuration\ncopy of reference circuit +Text Notes 8525 6985 0 42 ~ 12 +Place close to FT232 +Text Notes 6039 5115 0 60 ~ 12 +CL 10pF +Text Notes 6820 770 0 126 ~ 12 +Application access USB UART +Text Notes 14993 10153 0 84 ~ 12 +USB-UART interface +Text Notes 15070 5390 0 60 ~ 12 +If possible, line up with\ncorresponding header\nfor MGMT USB-UART and\nlabel pins on silk screen +Text Notes 8019 2398 0 60 ~ 12 +U8 +Text Notes 7513 3366 2 60 ~ 12 +R23 +Text Label 7326 3564 0 70 ~ +10k +Text Label 6941 3520 0 70 ~ +0.1uF +Text Label 6204 3531 0 70 ~ +0.1uF +Text Label 7139 4125 0 70 ~ +12k +Text Label 7392 5500 0 70 ~ +5pF +Text Label 6281 5500 0 70 ~ +5pF +Text Label 4741 7700 0 70 ~ +4.7uF +Text Label 5489 7678 0 70 ~ +0.1uF +Text Label 10461 7711 0 70 ~ +4.7uF +Text Label 11231 7689 0 70 ~ +0.1uF +Text Label 7700 7898 0 70 ~ +0.1uF +Text Label 6677 7931 0 70 ~ +10uF +Text Label 9680 7898 0 70 ~ +0.1uF +Text Label 8668 7876 0 70 ~ +10uF +Text Label 11825 7898 0 70 ~ +0.1uF +Text Label 12331 7678 0 70 ~ +0.1uF +Text Label 13200 7898 0 70 ~ +0.1uF +Text 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0000 C CNN +F 3 "" H 6820 5170 70 0000 C CNN + 1 6820 5170 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58024001 +U 1 1 58024001 +P 7040 5170 +F 0 "GND_63" H 7040 5170 20 0000 C CNN +F 1 "+GND" H 7040 5100 30 0000 C CNN +F 2 "" H 7040 5170 70 0000 C CNN +F 3 "" H 7040 5170 70 0000 C CNN + 1 7040 5170 + 1 0 0 -1 +$EndComp +Connection ~ 2750 2530 +Connection ~ 7227 2860 +$Comp +L FT232H_SERIAL IC124 +U 1 1 58024000 +F 1 "FT232HL-REEL" H 8008 5632 60 0000 L BNN +F 2 "" H 8008 5632 60 0000 C CNN +F 3 "" H 8008 5632 60 0000 C CNN + 1 9240 3960 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 C82 +U 1 1 58023FFF +F 0 "C82" H 10464.65618 7792.4 60 0000 L BNN + 1 10780 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C83 +U 1 1 58023FFE +F 0 "C83" H 11220 7810 60 0000 L BNN +F 1 "" H 11220 7700 60 0000 L BNN +F 2 "" H 11220 7700 60 0000 C CNN +F 3 "" H 11220 7700 60 0000 C CNN + 1 11110 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C79 +U 1 1 58023FFD +F 0 "C79" H 7700 7590 60 0000 L BNN +F 1 "" H 7700 7480 60 0000 L BNN +F 2 "" H 7700 7480 60 0000 C CNN +F 3 "" H 7700 7480 60 0000 C CNN + 1 7590 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0805 C77 +U 1 1 58023FFC +F 0 "C77" H 6724.65618 7572.4 60 0000 L BNN +F 1 "" H 6611 7458 60 0000 L BNN +F 2 "" H 6611 7458 60 0000 C CNN +F 3 "" H 6611 7458 60 0000 C CNN + 1 7040 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C81 +U 1 1 58023FFB +F 0 "C81" H 9680 7590 60 0000 L BNN +F 1 "" H 9680 7480 60 0000 L BNN +F 2 "" H 9680 7480 60 0000 C CNN +F 3 "" H 9680 7480 60 0000 C CNN + 1 9570 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0805 C80 +U 1 1 58023FFA +F 0 "C80" H 8704.65618 7627.4 60 0000 L BNN +F 1 "" H 8591 7513 60 0000 L BNN +F 2 "" H 8591 7513 60 0000 C CNN +F 3 "" H 8591 7513 60 0000 C CNN + 1 9020 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C84 +U 1 1 58023FF9 +F 0 "C84" H 11838.21111 7606.5 60 0000 L BNN +F 1 "" H 11836 7491 60 0000 L BNN +F 2 "" H 11836 7491 60 0000 C CNN +F 3 "" H 11836 7491 60 0000 C CNN + 1 12210 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C85 +U 1 1 58023FF8 +F 0 "C85" H 12342 7821 60 0000 L BNN +F 1 "" H 12364 7832 60 0000 L BNN +F 2 "" H 12364 7832 60 0000 C CNN +F 3 "" H 12364 7832 60 0000 C CNN + 1 12650 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C86 +U 1 1 58023FF7 +F 0 "C86" H 13200 7590 60 0000 L BNN +F 1 "" H 13200 7480 60 0000 L BNN +F 2 "" H 13200 7480 60 0000 C CNN +F 3 "" H 13200 7480 60 0000 C CNN + 1 13090 7700 + 1 0 0 -1 +$EndComp +$Comp +L FERRITE_0603MP IC134 +U 1 1 58023FF6 + 1 8690 7370 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC135 +U 1 1 58023FF5 + 1 7447 3630 + -1 0 0 1 +$EndComp +$Comp +L FERRITE_0603MP IC136 +U 1 1 58023FF4 + 1 6710 7370 + 1 0 0 -1 +$EndComp +$Comp +L USBMINIB CN1 +U 1 1 58023FF3 +F 0 "CN1" H 1307.26772 2299 60 0000 L BNN +F 1 "690-005-299-043" H 1298 3091 60 0000 L BNN +F 2 "" H 1298 3091 60 0000 C CNN +F 3 "" H 1298 3091 60 0000 C CNN + 1 1760 2750 + 1 0 0 -1 +$EndComp +$Comp +L RCLAMP0502ASC-89 IC138 +U 1 1 58023FF2 +F 1 "RCLAMP0502A.TCT" H 2970 2387 60 0000 L BNN +F 2 "" H 2970 2387 60 0000 C CNN +F 3 "" H 2970 2387 60 0000 C CNN + 1 3410 2750 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R86 +U 1 1 58023FF1 +F 0 "R86" H 11877.78889 2387 60 0000 R TNN +F 1 "" H 11880 2497 60 0000 R TNN +F 2 "" H 11880 2497 60 0000 C CNN +F 3 "" H 11880 2497 60 0000 C CNN + 1 11770 2640 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R87 +U 1 1 58023FF0 +F 0 "R87" H 11924 2926 60 0000 R TNN +F 1 "" H 11880 3047 60 0000 R TNN +F 2 "" H 11880 3047 60 0000 C CNN +F 3 "" H 11880 3047 60 0000 C CNN + 1 11770 2750 + -1 0 0 1 +$EndComp +$Comp +L M03X2NO_SILK J2 +U 1 1 58023FEF +F 0 "J2" H 13959 5269 60 0000 L BNN + 1 14190 5610 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C214 +U 1 1 58023FEE +F 0 "C214" H 13145 5060 60 0000 L BNN +F 1 "" H 13145 4950 60 0000 L BNN +F 2 "" H 13145 4950 60 0000 C CNN +F 3 "" H 13145 4950 60 0000 C CNN + 1 13585 5170 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R91 +U 1 1 58023FED +F 0 "R91" V 11990 2200 60 0000 L BNN +F 1 "" V 12100 2200 60 0000 L BNN +F 2 "" H 12100 2200 60 0000 C CNN +F 3 "" H 12100 2200 60 0000 C CNN + 1 12100 2090 + 0 1 1 0 +$EndComp +$Comp +L CRYSTALTHIN Y1 +U 1 1 58023FEC +F 0 "Y1" H 7040 5192 60 0000 R BNN +F 1 "ABM8G-12.000MHZ-4Y-T3" H 6028 5214 60 0000 R BNN +F 2 "" H 6028 5214 60 0000 C CNN +F 3 "" H 6028 5214 60 0000 C CNN + 1 6930 5060 + -1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C76 +U 1 1 58023FEB +F 0 "C76" H 6930 3410 60 0000 L BNN +F 1 "" H 6930 3190 60 0000 L BNN +F 2 "" H 6930 3190 60 0000 C CNN +F 3 "" H 6930 3190 60 0000 C CNN + 1 6820 3410 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C74 +U 1 1 58023FEA +F 0 "C74" H 6226 3410 60 0000 L BNN +F 1 "" H 6160 3190 60 0000 L BNN +F 2 "" H 6160 3190 60 0000 C CNN +F 3 "" H 6160 3190 60 0000 C CNN + 1 6600 3410 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R22 +U 1 1 58023FE9 +F 0 "R22" H 7370 4026 60 0000 R TNN +F 1 "" H 7370 4125 60 0000 R TNN +F 2 "" H 7370 4125 60 0000 C CNN +F 3 "" H 7370 4125 60 0000 C CNN + 1 7260 3850 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 C78 +U 1 1 58023FE8 +F 0 "C78" H 7150 5390 60 0000 R TNN +F 1 "" H 7150 5500 60 0000 R TNN +F 2 "" H 7150 5500 60 0000 C CNN +F 3 "" H 7150 5500 60 0000 C CNN + 1 7260 5390 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 C75 +U 1 1 58023FE7 +F 0 "C75" H 6930 5390 60 0000 R TNN +F 1 "" H 6930 5500 60 0000 R TNN +F 2 "" H 6930 5500 60 0000 C CNN +F 3 "" H 6930 5500 60 0000 C CNN + 1 6600 5390 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0603 C72 +U 1 1 58023FE6 +F 0 "C72" H 4744.65618 7792.4 60 0000 L BNN + 1 5060 7700 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C73 +U 1 1 58023FE5 +F 0 "C73" H 5500 7810 60 0000 L BNN +F 1 "" H 5500 7700 60 0000 L BNN +F 2 "" H 5500 7700 60 0000 C CNN +F 3 "" H 5500 7700 60 0000 C CNN + 1 5390 7700 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_10-cache.lib b/rev03-KiCad/rev02_10-cache.lib new file mode 100644 index 0000000..abf758d --- /dev/null +++ b/rev03-KiCad/rev02_10-cache.lib @@ -0,0 +1,370 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# FT_MGMT_VCC3V3 +# +DEF FT_MGMT_VCC3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FT_MGMT_VCC3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FT_MGMT_VCC3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# FT_MGMT_VREGIN +# +DEF FT_MGMT_VREGIN #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FT_MGMT_VREGIN" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FT_MGMT_VREGIN 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# FT_MGMT_VPHY +# +DEF FT_MGMT_VPHY #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FT_MGMT_VPHY" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FT_MGMT_VPHY 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# FT_MGMT_VPLL +# +DEF FT_MGMT_VPLL #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FT_MGMT_VPLL" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FT_MGMT_VPLL 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" -440 -110 60 H V L BNN +F1 "C-EUC0402" -440 -220 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +S 88 -66 -88 -88 0 1 10 f +S 88 -22 -88 -44 0 1 10 f +ENDDRAW +ENDDEF +# +# C-EUC0603 +# +DEF C-EUC0603 IC 0 40 Y Y 1 F N +F0 "C" -341 88 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0805 +# +DEF C-EUC0805 IC 0 40 Y Y 1 F N +F0 "C" -319 -77 60 H V L BNN +F1 "C-EUC0805" -429 -187 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# CRYSTALTHIN +# +DEF CRYSTALTHIN IC 0 40 Y Y 1 F N +F0 "Y" -77 110 60 H V L BNN +F1 "CRYSTALTHIN" 869 132 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -11 -66 -11 66 +P 2 0 1 10 22 -66 -11 -66 +P 2 0 1 10 22 66 22 -66 +P 2 0 1 10 -11 66 22 66 +P 2 0 1 10 -44 0 -44 77 +P 2 0 1 10 -44 -77 -44 0 +P 2 0 1 10 44 0 44 77 +P 2 0 1 10 44 -77 44 0 +P 2 0 1 10 -44 0 -110 0 +P 2 0 1 10 44 0 110 0 +X 1 1 -121 0 11 R 1 1 0 1 P +X 3 3 121 0 11 L 1 1 0 1 P +X 2 2 -110 -110 110 R 1 1 0 1 P +X 4 4 110 -110 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# FERRITE_0603MP +# +DEF FERRITE_0603MP IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 55 33 -55 33 +P 2 0 1 10 55 -44 55 33 +P 2 0 1 10 -55 -44 55 -44 +P 2 0 1 10 -55 33 -55 -44 +X P$1 1 -110 0 110 R 1 1 0 1 P +X P$2 2 110 0 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# FT232H_SERIAL +# +DEF FT232H_SERIAL IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "FT232H_SERIAL" -1232 1672 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 990 1430 -990 1430 +P 2 0 1 10 990 -1430 990 1430 +P 2 0 1 10 -990 -1430 990 -1430 +P 2 0 1 10 -990 1430 -990 -1430 +X VREGIN 40 -1210 1320 220 R 70 70 0 1 W +X VCCD 39 -1210 1100 220 R 70 70 0 1 W +X VCCORE 38 -1210 990 220 R 70 70 0 1 W +X VCCA 37 -1210 880 220 R 70 70 0 1 W +X DM 6 -1210 660 220 R 70 70 0 1 P +X DP 7 -1210 550 220 R 70 70 0 1 P +X ~RESET 34 -1210 330 220 R 70 70 0 1 P +X REF 5 -1210 110 220 R 70 70 0 1 P +X EECS 45 -1210 -330 220 R 70 70 0 1 O +X EECLK 44 -1210 -440 220 R 70 70 0 1 O +X EEDATA 43 -1210 -550 220 R 70 70 0 1 P +X XCSI 1 -1210 -770 220 R 70 70 0 1 P +X XCSO 2 -1210 -1100 220 R 70 70 0 1 P +X TEST 42 -1210 -1320 220 R 70 70 0 1 P +X TXD 13 1210 1320 220 L 70 70 0 1 O +X RXD 14 1210 1210 220 L 70 70 0 1 P +X RTS# 15 1210 1100 220 L 70 70 0 1 O +X CTS# 16 1210 990 220 L 70 70 0 1 P +X DTR# 17 1210 880 220 L 70 70 0 1 O +X DSR# 18 1210 770 220 L 70 70 0 1 P +X DCD# 19 1210 660 220 L 70 70 0 1 P +X RI# 20 1210 550 220 L 70 70 0 1 P +X TXDEN 21 1210 330 220 L 70 70 0 1 O +X ACBUS1 25 1210 220 220 L 70 70 0 1 P +X ACBUS2 26 1210 110 220 L 70 70 0 1 P +X RXLED# 27 1210 0 220 L 70 70 0 1 O +X TXLED# 28 1210 -110 220 L 70 70 0 1 O +X ACBUS5 29 1210 -220 220 L 70 70 0 1 P +X ACBUS6 30 1210 -330 220 L 70 70 0 1 P +X PWRSAV# 31 1210 -440 220 L 70 70 0 1 P +X ACBUS8 32 1210 -550 220 L 70 70 0 1 P +X ACBUS9 33 1210 -660 220 L 70 70 0 1 P +X AGND 4 -440 -1650 220 U 70 70 0 1 W +X AGND 9 -330 -1650 220 U 70 70 0 1 W +X AGND 41 -220 -1650 220 U 70 70 0 1 W +X GND 10 -110 -1650 220 U 70 70 0 1 W +X GND 11 0 -1650 220 U 70 70 0 1 W +X GND 22 110 -1650 220 U 70 70 0 1 W +X GND 23 220 -1650 220 U 70 70 0 1 W +X GND 35 330 -1650 220 U 70 70 0 1 W +X GND 36 440 -1650 220 U 70 70 0 1 W +X GND 47 550 -1650 220 U 70 70 0 1 W +X GND 48 660 -1650 220 U 70 70 0 1 W +X VPHY 3 -220 1650 220 D 70 70 0 1 P +X VPLL 8 -110 1650 220 D 70 70 0 1 P +X VCCIO 12 0 1650 220 D 70 70 0 1 W +X VCCIO 24 110 1650 220 D 70 70 0 1 W +X VCCIO 46 220 1650 220 D 70 70 0 1 W +ENDDRAW +ENDDEF +# +# M03X2NO_SILK +# +DEF M03X2NO_SILK IC 0 40 Y Y 1 F N +F0 "J" -231 -341 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 220 220 -220 220 +P 2 0 1 10 220 110 220 220 +P 2 0 1 10 220 0 220 110 +P 2 0 1 10 220 -110 220 0 +P 2 0 1 10 220 -220 220 -110 +P 2 0 1 10 -220 -220 220 -220 +P 2 0 1 10 -220 -110 -220 -220 +P 2 0 1 10 -220 0 -220 -110 +P 2 0 1 10 -220 110 -220 0 +P 2 0 1 10 -220 220 -220 110 +P 2 0 1 10 -121 110 -220 110 +P 2 0 1 10 -121 0 -220 0 +P 2 0 1 10 -121 -110 -220 -110 +P 2 0 1 10 121 -110 220 -110 +P 2 0 1 10 121 0 220 0 +P 2 0 1 10 121 110 220 110 +A -77 110 44 0 1200 1 1 10 N -33 110 -99 148 +A -77 110 44 1200 -1200 1 1 10 N -99 148 -99 71 +A -77 110 44 -1200 0 1 1 10 N -99 71 -33 110 +A 77 110 44 0 1200 1 1 10 N 121 110 54 148 +A 77 110 44 1200 -1200 1 1 10 N 54 148 54 71 +A 77 110 44 -1200 0 1 1 10 N 54 71 121 110 +A 77 0 44 0 1200 1 1 10 N 121 0 54 38 +A 77 0 44 1200 -1200 1 1 10 N 54 38 54 -38 +A 77 0 44 -1200 0 1 1 10 N 54 -38 121 0 +A 77 -110 44 0 1200 1 1 10 N 121 -110 54 -71 +A 77 -110 44 1200 -1200 1 1 10 N 54 -71 54 -148 +A 77 -110 44 -1200 0 1 1 10 N 54 -148 121 -110 +A -77 -110 44 0 1200 1 1 10 N -33 -110 -99 -71 +A -77 -110 44 1200 -1200 1 1 10 N -99 -71 -99 -148 +A -77 -110 44 -1200 0 1 1 10 N -99 -148 -33 -110 +A -77 0 44 0 1200 1 1 10 N -33 0 -99 38 +A -77 0 44 1200 -1200 1 1 10 N -99 38 -99 -38 +A -77 0 44 -1200 0 1 1 10 N -99 -38 -33 0 +X 1 1 -330 110 110 R 1 1 0 1 P +X 3 3 -330 0 110 R 1 1 0 1 P +X 5 5 -330 -110 110 R 1 1 0 1 P +X 6 6 330 -110 110 L 1 1 0 1 P +X 4 4 330 0 110 L 1 1 0 1 P +X 2 2 330 110 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" 110 110 60 H V L BNN +F1 "R-EU_R0402" 110 0 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +ENDDRAW +ENDDEF +# +# RCLAMP0502ASC-89 +# +DEF RCLAMP0502ASC-89 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "RCLAMP0502ASC-89" -451 -352 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -440 -220 440 -220 +P 2 0 1 10 -440 220 -440 -220 +P 2 0 1 10 440 220 -440 220 +P 2 0 1 10 440 -220 440 220 +X OUT1 1 550 110 110 L 70 70 0 1 O +X GND 2 550 0 110 L 70 70 0 1 W +X OUT2 3 550 -110 110 L 70 70 0 1 O +X IN2 4 -550 -110 110 R 70 70 0 1 P +X VCC 5 -550 0 110 R 70 70 0 1 W +X IN1 6 -550 110 110 R 70 70 0 1 P +ENDDRAW +ENDDEF +# +# USBMINIB +# +DEF USBMINIB IC 0 40 Y Y 1 F N +F0 "CN" -462 -451 60 H V L BNN +F1 "USBMINIB" -462 341 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -440 330 -451 330 +P 2 0 1 10 330 330 -440 330 +P 2 0 1 10 330 -330 330 330 +P 2 0 1 10 -154 66 -66 66 +P 2 0 1 10 -187 66 -154 66 +P 2 0 1 10 -198 132 -242 132 +P 2 0 1 10 -220 0 -275 0 +P 2 0 1 10 -187 66 -220 0 +P 2 0 1 10 -154 66 -198 132 +P 2 0 1 10 -352 66 -187 66 +P 2 0 1 10 -352 33 -352 66 +P 2 0 1 10 -352 33 -352 33 +P 2 0 1 10 -396 66 -352 33 +P 2 0 1 10 -352 99 -396 66 +P 2 0 1 10 -352 99 -352 44 +P 2 0 1 10 -352 99 -352 99 +P 2 0 1 10 -352 66 -352 99 +P 2 0 1 10 -374 55 -374 66 +P 2 0 1 10 -363 44 -374 55 +P 2 0 1 10 -363 77 -363 44 +P 2 0 1 10 -385 66 -363 77 +P 2 0 1 10 -440 -330 -440 330 +P 2 0 1 10 330 -330 -440 -330 +S -319 -22 -264 33 0 1 10 f +A -66 66 22 0 1200 1 1 30 N -44 66 -77 85 +A -66 66 22 1200 -1200 1 1 30 N -77 85 -77 46 +A -66 66 22 -1200 0 1 1 30 N -77 46 -44 66 +A -264 132 0 0 1200 1 1 30 N -264 132 -264 132 +A -264 132 0 1200 -1200 1 1 30 N -264 132 -264 132 +A -264 132 0 -1200 0 1 1 30 N -264 132 -264 132 +X D+ D+ 440 110 110 L 1 70 0 1 P +X D- D- 440 0 110 L 1 70 0 1 P +X VBUS VBUS 440 220 110 L 1 70 0 1 W +X GND GND 440 -220 110 L 1 70 0 1 W +X ID ID 440 -110 110 L 1 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_10.sch b/rev03-KiCad/rev02_10.sch new file mode 100644 index 0000000..36e8f4c --- /dev/null +++ b/rev03-KiCad/rev02_10.sch @@ -0,0 +1,1043 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 12 27 +Title "rev02_10" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 5610 2090 0 60 ~ 12 +DS_FT232H.pdf\n6.1 USB Bus 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"" H 8701 7623 60 0000 L BNN +F 2 "" H 8701 7623 60 0000 C CNN +F 3 "" H 8701 7623 60 0000 C CNN + 1 9130 7810 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C99 +U 1 1 58023FC3 +F 0 "C99" H 12100 7700 60 0000 L BNN +F 1 "" H 11990 7590 60 0000 L BNN +F 2 "" H 11990 7590 60 0000 C CNN +F 3 "" H 11990 7590 60 0000 C CNN + 1 12430 7810 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C100 +U 1 1 58023FC2 +F 0 "C100" H 12540 7953 60 0000 L BNN +F 1 "" H 12650 7920 60 0000 L BNN +F 2 "" H 12650 7920 60 0000 C CNN +F 3 "" H 12650 7920 60 0000 C CNN + 1 12870 7810 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C101 +U 1 1 58023FC1 +F 0 "C101" H 13420 7700 60 0000 L BNN +F 1 "" H 13420 7590 60 0000 L BNN +F 2 "" H 13420 7590 60 0000 C CNN +F 3 "" H 13420 7590 60 0000 C CNN + 1 13310 7810 + 1 0 0 -1 +$EndComp +$Comp +L FERRITE_0603MP IC162 +U 1 1 58023FC0 + 1 8800 7480 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC163 +U 1 1 58023FBF + 1 7502 3740 + -1 0 0 1 +$EndComp +$Comp +L FERRITE_0603MP IC164 +U 1 1 58023FBE + 1 6820 7480 + 1 0 0 -1 +$EndComp +$Comp +L USBMINIB CN2 +U 1 1 58023FBD +F 0 "CN2" H 1417.26772 2409 60 0000 L BNN +F 1 "690-005-299-043" H 1408 3201 60 0000 L BNN +F 2 "" H 1408 3201 60 0000 C CNN +F 3 "" H 1408 3201 60 0000 C CNN + 1 1870 2860 + 1 0 0 -1 +$EndComp +$Comp +L RCLAMP0502ASC-89 IC166 +U 1 1 58023FBC +F 1 "RCLAMP0502A.TCT" H 3069 2508 60 0000 L BNN +F 2 "" H 3069 2508 60 0000 C CNN +F 3 "" H 3069 2508 60 0000 C CNN + 1 3520 2860 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R88 +U 1 1 58023FBB +F 0 "R88" H 11987.78889 2497 60 0000 R TNN +F 1 "" H 11990 2607 60 0000 R TNN +F 2 "" H 11990 2607 60 0000 C CNN +F 3 "" H 11990 2607 60 0000 C CNN + 1 11880 2750 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R89 +U 1 1 58023FBA +F 0 "R89" H 12254 3003 60 0000 R TNN +F 1 "" H 12254 3091 60 0000 R TNN +F 2 "" H 12254 3091 60 0000 C CNN +F 3 "" H 12254 3091 60 0000 C CNN + 1 11880 2860 + -1 0 0 1 +$EndComp +$Comp +L M03X2NO_SILK J3 +U 1 1 58023FB9 +F 0 "J3" H 14069 5379 60 0000 L BNN + 1 14300 5720 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C215 +U 1 1 58023FB8 +F 0 "C215" H 13420 5170 60 0000 L BNN +F 1 "" H 13420 5060 60 0000 L BNN +F 2 "" H 13420 5060 60 0000 C CNN +F 3 "" H 13420 5060 60 0000 C CNN + 1 13860 5280 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R90 +U 1 1 58023FB7 +F 0 "R90" V 12100 2310 60 0000 L BNN +F 1 "" V 12210 2310 60 0000 L BNN +F 2 "" H 12210 2310 60 0000 C CNN +F 3 "" H 12210 2310 60 0000 C CNN + 1 12210 2200 + 0 1 1 0 +$EndComp +$Comp +L CRYSTALTHIN Y2 +U 1 1 58023FB6 +F 0 "Y2" H 7117 5280 60 0000 R BNN +F 1 "ABM8G-12.000MHZ-4Y-T3" H 6171 5302 60 0000 R BNN +F 2 "" H 6171 5302 60 0000 C CNN +F 3 "" H 6171 5302 60 0000 C CNN + 1 7040 5170 + -1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC173 +U 1 1 58023FB5 + 1 6930 3520 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C89 +U 1 1 58023FB4 +F 0 "C89" H 6226 3536.5 60 0000 L BNN +F 1 "" H 6226 3311 60 0000 L BNN +F 2 "" H 6226 3311 60 0000 C CNN +F 3 "" H 6226 3311 60 0000 C CNN + 1 6710 3520 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R26 +U 1 1 58023FB3 +F 0 "R26" H 7535 4170.1 60 0000 R TNN +F 1 "" H 7535 4268 60 0000 R TNN +F 2 "" H 7535 4268 60 0000 C CNN +F 3 "" H 7535 4268 60 0000 C CNN + 1 7370 3960 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 C93 +U 1 1 58023FB2 +F 0 "C93" H 7260 5500 60 0000 R TNN +F 1 "" H 7260 5610 60 0000 R TNN +F 2 "" H 7260 5610 60 0000 C CNN +F 3 "" H 7260 5610 60 0000 C CNN + 1 7370 5500 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 C90 +U 1 1 58023FB1 +F 0 "C90" H 7040 5500 60 0000 R TNN +F 1 "" H 7040 5610 60 0000 R TNN +F 2 "" H 7040 5610 60 0000 C CNN +F 3 "" H 7040 5610 60 0000 C CNN + 1 6710 5500 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0603 C87 +U 1 1 58023FB0 +F 0 "C87" H 4854.65618 7902.4 60 0000 L BNN + 1 5170 7810 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C88 +U 1 1 58023FAF +F 0 "C88" H 5610 7920 60 0000 L BNN +F 1 "" H 5610 7810 60 0000 L BNN +F 2 "" H 5610 7810 60 0000 C CNN +F 3 "" H 5610 7810 60 0000 C CNN + 1 5500 7810 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_11-cache.lib b/rev03-KiCad/rev02_11-cache.lib new file mode 100644 index 0000000..e9f53bd --- /dev/null +++ b/rev03-KiCad/rev02_11-cache.lib @@ -0,0 +1,264 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# 3V3_BATT +# +DEF 3V3_BATT #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "3V3_BATT" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X 3V3_BATT 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# ATTINY828R-AU +# +DEF ATTINY828R-AU IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -2200 -1540 -2200 1320 +P 2 0 1 10 2200 -1540 -2200 -1540 +P 2 0 1 10 2200 1320 2200 -1540 +P 2 0 1 10 -2200 1320 2200 1320 +X AVCC 18 -2420 1100 220 R 70 70 0 1 W +X VCC 4 -2420 990 220 R 70 70 0 1 W +X (PCINT0/ADC0)_PA0 9 -2420 770 220 R 70 70 0 1 P +X (PCINT1/ADC1/AIN0)_PA1 10 -2420 660 220 R 70 70 0 1 P +X (PCINT2/ADC2/AIN1)_PA2 11 -2420 550 220 R 70 70 0 1 P +X (PCINT3/ADC3)_PA3 12 -2420 440 220 R 70 70 0 1 P +X (PCINT4/ADC4)_PA4 13 -2420 330 220 R 70 70 0 1 P +X (PC!INT5/ADC5)_PA5 14 -2420 220 220 R 70 70 0 1 P +X (PCINT6/ADC6)_PA6 15 -2420 110 220 R 70 70 0 1 P +X (PCINT7/ADC7)_PA7 16 -2420 0 220 R 70 70 0 1 P +X PB0_(PCINT8/ADC8) 17 -2420 -220 220 R 70 70 0 1 P +X PB1_(PCINT9/ADC9) 19 -2420 -330 220 R 70 70 0 1 P +X PB2_(PCINT10/ADC10) 20 -2420 -440 220 R 70 70 0 1 P +X PB3_(PCINT11/ADC11) 22 -2420 -550 220 R 70 70 0 1 P +X PB4_(PCINT12/ADC12) 23 -2420 -660 220 R 70 70 0 1 P +X PB5_(PCINT13/ADC13) 24 -2420 -770 220 R 70 70 0 1 P +X PB6_(PCINT14/ADC14) 25 -2420 -880 220 R 70 70 0 1 P +X PB7_(PCINT15/ADC15) 26 -2420 -990 220 R 70 70 0 1 P +X GND_2 5 -2420 -1210 220 R 70 70 0 1 P +X GND 21 -2420 -1320 220 R 70 70 0 1 P +X PC0_(PCINT16/ADC16/TOCC0/SS/XCK) 31 2420 1100 220 L 70 70 0 1 P +X PC1_(PCINT17/ADC17/TOCC1/INT0/CLKO) 32 2420 990 220 L 70 70 0 1 P +X (PCINT18/ADC18/TOCC2/RXD/INT1)_PC2 1 2420 880 220 L 70 70 0 1 P +X (PCINT19/ADC19/TOCC3/TXD)_PC3 2 2420 770 220 L 70 70 0 1 P +X (PCINT20/ADC20/TOCC4)_PC4 3 2420 660 220 L 70 70 0 1 P +X (PCINT21/ADC21/TOCC5/ICP1/T0)_PC5 6 2420 550 220 L 70 70 0 1 P +X (PCINT22/ADC22/CLKI/TOCC6)_PC6 7 2420 440 220 L 70 70 0 1 P +X (PCINT23/ADC23/TOCC7/T1)_PC7 8 2420 330 220 L 70 70 0 1 P +X PD0_(PCINT24/ADC24/SDA/MOSI) 27 2420 110 220 L 70 70 0 1 P +X PD1_(PCINT25/ADC25/MISO) 28 2420 0 220 L 70 70 0 1 P +X PD2_(!PCINT26/ADC26/RESET/DW) 29 2420 -110 220 L 70 70 0 1 P +X PD3_(PCINT27/ADC27/SCL/SCK) 30 2420 -220 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# AVR_SPI_PRG_62X3_LOCK +# +DEF AVR_SPI_PRG_62X3_LOCK IC 0 40 Y Y 1 F N +F0 "JP" -187 253 60 H V L BNN +F1 "AVR_SPI_PRG_62X3_LOCK" -1056 -440 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 330 -220 -220 -220 +P 2 0 1 10 330 220 330 -220 +P 2 0 1 10 -220 220 330 220 +P 2 0 1 10 -220 -220 -220 220 +X 1 1 -330 110 330 R 70 1 0 1 P +X 2 2 440 110 330 L 70 1 0 1 P +X 3 3 -330 0 330 R 70 1 0 1 P +X 4 4 440 0 330 L 70 1 0 1 P +X 5 5 -330 -110 330 R 70 1 0 1 P +X 6 6 440 -110 330 L 70 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" -451 -55 60 H V L BNN +F1 "C-EUC0402" -495 -165 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0805 +# +DEF C-EUC0805 IC 0 40 Y Y 1 F N +F0 "C" -352 0 60 H V L BNN +F1 "C-EUC0805" -330 -110 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# LEDCHIP-LED0603 +# +DEF LEDCHIP-LED0603 IC 0 40 Y Y 1 F N +F0 "LED" 748 -33 60 H V L BNN +F1 "LEDCHIP-LED0603" 1309 -44 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -110 55 0 +P 2 0 1 10 -55 0 0 -110 +P 2 0 1 10 0 -110 55 -110 +P 2 0 1 10 -55 -110 0 -110 +P 2 0 1 10 0 0 55 0 +P 2 0 1 10 -55 0 0 0 +P 2 0 1 10 0 -110 0 0 +P 2 0 1 10 -154 -88 -88 -33 +P 2 0 1 10 -143 -143 -88 -77 +P 4 0 1 10 -154 -88 -132 -55 -110 -77 -154 -88 F +P 4 0 1 10 -143 -143 -132 -99 -110 -121 -143 -143 F +X C 2 0 -220 110 U 1 1 0 1 P +X A 1 0 110 110 D 1 1 0 1 P +ENDDRAW +ENDDEF +# +# M03LOCK +# +DEF M03LOCK IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -110 -220 165 -220 +P 2 0 1 10 110 110 55 110 +P 2 0 1 10 110 0 55 0 +P 2 0 1 10 110 -110 55 -110 +P 2 0 1 10 -110 -220 -110 220 +P 2 0 1 10 165 220 165 -220 +P 2 0 1 10 165 220 -110 220 +X 1 1 330 -110 220 L 70 1 0 1 P +X 2 2 330 0 220 L 70 1 0 1 P +X 3 3 330 110 220 L 70 1 0 1 P +ENDDRAW +ENDDEF +# +# M10LOCK +# +DEF M10LOCK IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -880 275 -880 +P 2 0 1 10 220 -550 165 -550 +P 2 0 1 10 220 -660 165 -660 +P 2 0 1 10 220 -770 165 -770 +P 2 0 1 10 0 -880 0 330 +P 2 0 1 10 275 330 275 -880 +P 2 0 1 10 275 330 0 330 +P 2 0 1 10 220 -330 165 -330 +P 2 0 1 10 220 -440 165 -440 +P 2 0 1 10 220 -220 165 -220 +P 2 0 1 10 220 -110 165 -110 +P 2 0 1 10 220 0 165 0 +P 2 0 1 10 220 110 165 110 +P 2 0 1 10 220 220 165 220 +X 1 1 440 -770 220 L 70 1 0 1 P +X 2 2 440 -660 220 L 70 1 0 1 P +X 3 3 440 -550 220 L 70 1 0 1 P +X 4 4 440 -440 220 L 70 1 0 1 P +X 5 5 440 -330 220 L 70 1 0 1 P +X 6 6 440 -220 220 L 70 1 0 1 P +X 7 7 440 -110 220 L 70 1 0 1 P +X 8 8 440 0 220 L 70 1 0 1 P +X 9 9 440 110 220 L 70 1 0 1 P +X 10 10 440 220 220 L 70 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" -99 -187 60 H V L BNN +F1 "R-EU_R0402" -99 99 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# TACTILE_SWITCH +# +DEF TACTILE_SWITCH IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "TACTILE_SWITCH" -330 517 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 440 220 -440 220 +P 2 0 1 10 440 -220 440 220 +P 2 0 1 10 -440 -220 440 -220 +P 2 0 1 10 -440 220 -440 -220 +P 2 0 1 10 0 110 -220 0 +P 2 0 1 10 330 0 110 0 +P 2 0 1 10 330 -220 330 0 +P 2 0 1 10 -330 0 -330 220 +P 2 0 1 10 -220 0 -330 0 +P 2 0 1 10 330 0 330 220 +P 2 0 1 10 -330 -220 -330 0 +A -220 0 22 0 1200 1 1 10 N -198 0 -231 19 +A -220 0 22 1200 -1200 1 1 10 N -231 19 -231 -19 +A -220 0 22 -1200 0 1 1 10 N -231 -19 -198 0 +A 110 0 22 0 1200 1 1 10 N 132 0 98 19 +A 110 0 22 1200 -1200 1 1 10 N 98 19 98 -19 +A 110 0 22 -1200 0 1 1 10 N 98 -19 132 0 +X A1 A1 -330 440 220 D 70 1 0 1 P +X A2 A2 -330 -440 220 U 70 1 0 1 P +X B1 B1 330 440 220 D 70 1 0 1 P +X B2 B2 330 -440 220 U 70 1 0 1 P +X G1 G1 660 110 220 L 70 1 0 1 W +X G2 G2 660 -110 220 L 70 1 0 1 W +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_11.sch b/rev03-KiCad/rev02_11.sch new file mode 100644 index 0000000..510d214 --- /dev/null +++ b/rev03-KiCad/rev02_11.sch @@ -0,0 +1,753 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 13 27 +Title "rev02_11" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 5060 2310 0 126 ~ 12 +AVR Tiny Tamper Detect MCU +Text Notes 14300 3223 0 84 ~ 12 +Panic button +Text Notes 14520 5610 0 84 ~ 12 +Expansion GPIO +Text Notes 13948 803 0 60 ~ 12 +Connector for external 3V3 battery.\nPlace a jumper between pins 1-2\nto "emulate" having a battery present. +Text Notes 4510 6600 0 60 ~ 12 +AVR_GPIO* AVR_LED* and AVR_PANIC can be swapped. +Text Notes 15015 10131 0 84 ~ 12 +AVR Tamper circuit +Text Notes 6490 3058 0 60 ~ 12 +U10 +Text Notes 6468 6248 0 60 ~ 12 +ATTINY828R-AU +Text Notes 10670 3927 0 60 ~ 12 +R30 +Text Label 10659 4026 0 70 ~ +15k +Text Label 1727 3861 0 70 ~ +10uF +Text Label 2882 3850 0 70 ~ +0.1uF +Text Label 2442 3740 0 70 ~ +0.1uF +Text Notes 15730 5830 2 60 ~ 12 +M10LOCK +Text Notes 15730 7205 2 60 ~ 12 +JP5 +Text Notes 14520 3410 0 60 ~ 12 +S2 +Text Notes 15730 1320 2 60 ~ 12 +M03LOCK +Text Notes 15730 1903 2 60 ~ 12 +JP4 +Text Label 13618 6666 0 70 ~ +0.1uF +Text Label 13695 4224 0 70 ~ +15k +$Comp +L 3V3_BATT #PWR?58023FAE +U 1 1 58023FAE +P 3850 2860 +F 0 "3V3_BATT_3" H 3850 2860 20 0000 C CNN +F 1 "+3V3_BATT" H 3850 2790 30 0000 C CNN +F 2 "" H 3850 2860 70 0000 C CNN +F 3 "" H 3850 2860 70 0000 C CNN + 1 3850 2860 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023FAD +U 1 1 58023FAD +P 3850 6270 +F 0 "GND_79" H 3850 6270 20 0000 C CNN +F 1 "+GND" H 3850 6200 30 0000 C CNN +F 2 "" H 3850 6270 70 0000 C CNN +F 3 "" H 3850 6270 70 0000 C CNN + 1 3850 6270 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023FAC +U 1 1 58023FAC +P 11990 5170 +F 0 "3V3_BATT_4" H 11990 5170 20 0000 C CNN +F 1 "+3V3_BATT" H 11990 5100 30 0000 C CNN +F 2 "" H 11990 5170 70 0000 C CNN +F 3 "" H 11990 5170 70 0000 C CNN + 1 11990 5170 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023FAB +U 1 1 58023FAB +P 10560 3410 +F 0 "3V3_BATT_5" H 10560 3410 20 0000 C CNN +F 1 "+3V3_BATT" H 10560 3340 30 0000 C CNN +F 2 "" H 10560 3410 70 0000 C CNN +F 3 "" H 10560 3410 70 0000 C CNN + 1 10560 3410 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023FAA +U 1 1 58023FAA +P 11990 6270 +F 0 "GND_80" H 11990 6270 20 0000 C CNN +F 1 "+GND" H 11990 6200 30 0000 C CNN +F 2 "" H 11990 6270 70 0000 C CNN +F 3 "" H 11990 6270 70 0000 C CNN + 1 11990 6270 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023FA9 +U 1 1 58023FA9 +P 2420 4180 +F 0 "GND_81" H 2420 4180 20 0000 C CNN +F 1 "+GND" H 2420 4110 30 0000 C CNN +F 2 "" H 2420 4180 70 0000 C CNN +F 3 "" H 2420 4180 70 0000 C CNN + 1 2420 4180 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023FA8 +U 1 1 58023FA8 +P 15730 9020 +F 0 "GND_82" H 15730 9020 20 0000 C CNN +F 1 "+GND" H 15730 8950 30 0000 C CNN +F 2 "" H 15730 9020 70 0000 C CNN +F 3 "" H 15730 9020 70 0000 C CNN + 1 15730 9020 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023FA7 +U 1 1 58023FA7 +P 15070 7150 +F 0 "GND_83" H 15070 7150 20 0000 C CNN +F 1 "+GND" H 15070 7080 30 0000 C CNN +F 2 "" H 15070 7150 70 0000 C CNN +F 3 "" H 15070 7150 70 0000 C CNN + 1 15070 7150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023FA6 +U 1 1 58023FA6 +P 15620 4730 +F 0 "GND_84" H 15620 4730 20 0000 C CNN +F 1 "+GND" H 15620 4660 30 0000 C CNN +F 2 "" H 15620 4730 70 0000 C CNN +F 3 "" H 15620 4730 70 0000 C CNN + 1 15620 4730 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023FA5 +U 1 1 58023FA5 +P 15070 1980 +F 0 "GND_85" H 15070 1980 20 0000 C CNN +F 1 "+GND" H 15070 1910 30 0000 C CNN +F 2 "" H 15070 1980 70 0000 C CNN +F 3 "" H 15070 1980 70 0000 C CNN + 1 15070 1980 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023FA4 +U 1 1 58023FA4 +P 14520 1320 +F 0 "3V3_BATT_6" H 14520 1320 20 0000 C CNN +F 1 "+3V3_BATT" H 14520 1250 30 0000 C CNN +F 2 "" H 14520 1320 70 0000 C CNN +F 3 "" H 14520 1320 70 0000 C CNN + 1 14520 1320 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023FA3 +U 1 1 58023FA3 +P 15070 1320 +F 0 "VCCO_3V3_19" H 15070 1320 20 0000 C CNN +F 1 "+VCCO_3V3" H 15070 1250 30 0000 C CNN +F 2 "" H 15070 1320 70 0000 C CNN +F 3 "" H 15070 1320 70 0000 C CNN + 1 15070 1320 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023FA2 +U 1 1 58023FA2 +P 14080 7150 +F 0 "GND_86" H 14080 7150 20 0000 C CNN +F 1 "+GND" H 14080 7080 30 0000 C CNN +F 2 "" H 14080 7150 70 0000 C CNN +F 3 "" H 14080 7150 70 0000 C CNN + 1 14080 7150 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023FA1 +U 1 1 58023FA1 +P 14080 3740 +F 0 "3V3_BATT_7" H 14080 3740 20 0000 C CNN +F 1 "+3V3_BATT" H 14080 3670 30 0000 C CNN +F 2 "" H 14080 3740 70 0000 C CNN +F 3 "" H 14080 3740 70 0000 C CNN + 1 14080 3740 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4290 5720 3850 5720 +Wire Wire Line + 3850 5720 3850 5830 +Wire Wire Line + 3850 5830 3850 6270 +Wire Wire Line + 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9130 4510 +Text Label 9284 4510 0 70 ~ +MKM_AVR_MISO +Wire Wire Line + 15290 8470 14960 8470 +Wire Wire Line + 14520 8470 13871 8470 +Text Label 13871 8470 0 70 ~ +AVR_LED1 +Wire Wire Line + 4290 3740 3487 3740 +Text Label 3487 3740 0 70 ~ +AVR_LED1 +Wire Wire Line + 15070 8580 14619 8580 +Wire Wire Line + 14179 8580 13871 8580 +Text Label 13871 8580 0 70 ~ +AVR_LED2 +Wire Wire Line + 4290 3850 3487 3850 +Text Label 3487 3850 0 70 ~ +AVR_LED2 +Wire Wire Line + 15290 8690 14960 8690 +Wire Wire Line + 14520 8690 13871 8690 +Text Label 13871 8690 0 70 ~ +AVR_LED3 +Wire Wire Line + 4290 3960 3498 3960 +Text Label 3498 3960 0 70 ~ +AVR_LED3 +Wire Wire Line + 15070 8800 14619 8800 +Wire Wire Line + 14179 8800 13871 8800 +Text Label 13871 8800 0 70 ~ +AVR_LED4 +Wire Wire Line + 4290 4070 3487 4070 +Text Label 3487 4070 0 70 ~ +AVR_LED4 +Wire Wire Line + 15290 6160 14850 6160 +Text Label 14850 6160 0 70 ~ +AVR_GPIO_0 +Wire Wire Line + 9350 3410 9130 3410 +Text Label 9350 3410 0 70 ~ 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15290 6930 14850 6930 +Text Label 14850 6930 0 70 ~ +AVR_GPIO_7 +Wire Wire Line + 9350 4180 9130 4180 +Text Label 9350 4180 0 70 ~ +AVR_GPIO_7 +Wire Wire Line + 14520 4510 14080 4510 +Wire Wire Line + 14080 4510 13750 4510 +Wire Wire Line + 14080 4290 14080 4510 +Text Label 13750 4510 0 70 ~ +AVR_PANIC +Connection ~ 14080 4510 +Wire Wire Line + 4290 4180 3487 4180 +Text Label 3487 4180 0 70 ~ +AVR_PANIC +Wire Wire Line + 15290 1540 15070 1540 +Wire Wire Line + 15070 1320 15070 1540 +Wire Wire Line + 4290 4730 3487 4730 +Text Label 3487 4730 0 70 ~ +AVR_GPIO_ARM_0 +Wire Wire Line + 4290 4840 3487 4840 +Text Label 3487 4840 0 70 ~ +AVR_GPIO_ARM_1 +Wire Wire Line + 4290 5170 3487 5170 +Text Label 3487 5170 0 70 ~ +AVR_GPIO_FPGA_0 +Wire Wire Line + 4290 5280 3487 5280 +Text Label 3487 5280 0 70 ~ +AVR_GPIO_FPGA_1 +Wire Wire Line + 14080 5940 14080 6050 +Wire Wire Line + 15290 6050 14080 6050 +Wire Wire Line + 14080 6050 14080 6380 +Connection ~ 14080 6050 +Wire Wire Line + 4290 4510 3377 4510 +Text Label 3377 4510 0 70 ~ +MKM_CONTROL_FPGA_DIS +Wire Wire Line + 4290 4950 3487 4950 +Text Label 3487 4950 0 70 ~ +AVR_GPIO_ARM_2 +Wire Wire Line + 4290 5060 3487 5060 +Text Label 3487 5060 0 70 ~ +AVR_GPIO_ARM_3 +Wire Wire Line + 4290 5390 3487 5390 +Text Label 3487 5390 0 70 ~ +AVR_GPIO_FPGA_2 +Wire Wire Line + 4290 5500 3487 5500 +Text Label 3487 5500 0 70 ~ +AVR_GPIO_FPGA_3 +Text Label 14630 8371 0 70 ~ +330 +Text Label 14245 8371 0 70 ~ +330 +Text Label 15081 8360 0 70 ~ +330 +Text Label 14289 9086 0 70 ~ +330 +$Comp +L VCCO_3V3 #PWR?58023FA0 +U 1 1 58023FA0 +P 14080 5940 +F 0 "VCCO_3V3_20" H 14080 5940 20 0000 C CNN +F 1 "+VCCO_3V3" H 14080 5870 30 0000 C CNN +F 2 "" H 14080 5940 70 0000 C CNN +F 3 "" H 14080 5940 70 0000 C CNN + 1 14080 5940 + 1 0 0 -1 +$EndComp +$Comp +L ATTINY828R-AU IC180 +U 1 1 58023F9F + 1 6710 4510 + 1 0 0 -1 +$EndComp +$Comp +L LEDCHIP-LED0603 LED10 +U 1 1 58023F9E +F 0 "LED10" V 15147 8048.68328 60 0000 R TNN +F 1 "LTST-C191KRKT" V 15136 7491 60 0000 R TNN +F 2 "" H 15136 7491 60 0000 C CNN +F 3 "" H 15136 7491 60 0000 C CNN + 1 15180 8800 + 0 -1 -1 0 +$EndComp +$Comp +L M10LOCK IC182 +U 1 1 58023F9D + 1 15730 6820 + -1 0 0 1 +$EndComp +$Comp +L TACTILE_SWITCH IC183 +U 1 1 58023F9C +F 1 "EVQPT9A15" H 14520 4587 60 0000 L BNN +F 2 "" H 14520 4587 60 0000 C CNN +F 3 "" H 14520 4587 60 0000 C CNN + 1 14850 4070 + 1 0 0 -1 +$EndComp +$Comp +L M03LOCK IC184 +U 1 1 58023F9B + 1 15620 1650 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 C105 +U 1 1 58023F9A +F 0 "C105" H 13629 6435 60 0000 L BNN +F 1 "" H 13585 6325 60 0000 L BNN +F 2 "" H 13585 6325 60 0000 C CNN +F 3 "" H 13585 6325 60 0000 C CNN + 1 14080 6490 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R82 +U 1 1 58023F99 +F 0 "R82" V 14048.1 4452.78889 60 0000 R TNN +F 1 "" V 13926 4455 60 0000 R TNN +F 2 "" H 13926 4455 60 0000 C CNN +F 3 "" H 13926 4455 60 0000 C CNN + 1 14080 4070 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 R96 +U 1 1 58023F98 +F 0 "R96" H 14839 8272 60 0000 R TNN +F 1 "" H 14839 8371 60 0000 R TNN +F 2 "" H 14839 8371 60 0000 C CNN +F 3 "" H 14839 8371 60 0000 C CNN + 1 14740 8470 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R95 +U 1 1 58023F97 +F 0 "R95" H 14542 8272 60 0000 R TNN +F 1 "" H 14498 8481 60 0000 R TNN +F 2 "" H 14498 8481 60 0000 C CNN +F 3 "" H 14498 8481 60 0000 C CNN + 1 14399 8580 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R31 +U 1 1 58023F96 +F 0 "R31" H 14388 8261 60 0000 R TNN +F 1 "" H 14839 8591 60 0000 R TNN +F 2 "" H 14839 8591 60 0000 C CNN +F 3 "" H 14839 8591 60 0000 C CNN + 1 14740 8690 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R97 +U 1 1 58023F95 +F 0 "R97" H 14498 8987 60 0000 R TNN +F 1 "" H 14498 8701 60 0000 R TNN +F 2 "" H 14498 8701 60 0000 C CNN +F 3 "" H 14498 8701 60 0000 C CNN + 1 14399 8800 + -1 0 0 1 +$EndComp +$Comp +L AVR_SPI_PRG_62X3_LOCK JP3 +U 1 1 58023F94 +F 0 "JP3" H 11253 5863 60 0000 L BNN +F 1 "AVR_SPI_PRG_62X3_LOCK" H 10384 5170 60 0000 L BNN +F 2 "" H 10384 5170 60 0000 C CNN +F 3 "" H 10384 5170 60 0000 C CNN + 1 11440 5610 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC192 +U 1 1 58023F93 + 1 10560 3960 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC0805 C102 +U 1 1 58023F92 +F 0 "C102" H 1738 3740 60 0000 L BNN +F 1 "" H 1760 3630 60 0000 L BNN +F 2 "" H 1760 3630 60 0000 C CNN +F 3 "" H 1760 3630 60 0000 C CNN + 1 2090 3740 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C104 +U 1 1 58023F91 +F 0 "C104" H 2893 3740 60 0000 L BNN +F 1 "" H 2860 3630 60 0000 L BNN +F 2 "" H 2860 3630 60 0000 C CNN +F 3 "" H 2860 3630 60 0000 C CNN + 1 2750 3740 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C103 +U 1 1 58023F90 +F 0 "C103" H 2453 3839 60 0000 L BNN +F 1 "" H 2453 3773 60 0000 L BNN +F 2 "" H 2453 3773 60 0000 C CNN +F 3 "" H 2453 3773 60 0000 C CNN + 1 2420 3740 + 1 0 0 -1 +$EndComp +$Comp +L LEDCHIP-LED0603 LED11 +U 1 1 58023F8F +F 0 "LED11" V 15367 7938.68328 60 0000 R TNN +F 1 "LTST-C193TBKT-5A" V 15356 7381 60 0000 R TNN +F 2 "" H 15356 7381 60 0000 C CNN +F 3 "" H 15356 7381 60 0000 C CNN + 1 15400 8470 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED9 +U 1 1 58023F8E +F 0 "LED9" V 15147 7821 60 0000 R TNN +F 1 "LTST-C191KGKT" V 15125 7282 60 0000 R TNN +F 2 "" H 15125 7282 60 0000 C CNN +F 3 "" H 15125 7282 60 0000 C CNN + 1 15180 8580 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED12 +U 1 1 58023F8D +F 0 "LED12" V 15367 8158.68328 60 0000 R TNN +F 1 "LTST-C191KSKT" V 15356 7612 60 0000 R TNN +F 2 "" H 15356 7612 60 0000 C CNN +F 3 "" H 15356 7612 60 0000 C CNN + 1 15400 8690 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_12-cache.lib b/rev03-KiCad/rev02_12-cache.lib new file mode 100644 index 0000000..f2d093b --- /dev/null +++ b/rev03-KiCad/rev02_12-cache.lib @@ -0,0 +1,160 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# 3V3_BATT +# +DEF 3V3_BATT #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "3V3_BATT" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X 3V3_BATT 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# 23K640-I/SN +# +DEF 23K640-I/SN IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -550 -880 -550 660 +P 2 0 1 10 550 -880 -550 -880 +P 2 0 1 10 550 660 550 -880 +P 2 0 1 10 -550 660 550 660 +X VCC 8 -770 440 220 R 70 70 0 1 W +X ~CS 1 -770 220 220 R 70 70 0 1 P +X SO 2 770 440 220 L 70 70 0 1 O +X NC 3 -770 -330 220 R 70 70 0 1 P +X SCK 6 -770 0 220 R 70 70 0 1 P +X ~HOLD 7 -770 -110 220 R 70 70 0 1 P +X SI 5 -770 110 220 R 70 70 0 1 P +X VSS 4 -770 -550 220 R 70 70 0 1 W +ENDDRAW +ENDDEF +# +# 74*244DW_1 +# +DEF 74*244DW_1 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "74*244DW_1" -330 462 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 330 -440 -330 -440 +P 2 0 1 10 330 330 330 -440 +P 2 0 1 10 -330 330 330 330 +P 2 0 1 10 -330 -440 -330 330 +X G 1 -550 -330 220 R 70 70 0 1 P +X A1 2 -550 220 220 R 70 70 0 1 P +X A2 4 -550 110 220 R 70 70 0 1 P +X A3 6 -550 0 220 R 70 70 0 1 P +X A4 8 -550 -110 220 R 70 70 0 1 P +X Y4 12 550 -110 220 L 70 70 0 1 T +X Y3 14 550 0 220 L 70 70 0 1 T +X Y2 16 550 110 220 L 70 70 0 1 T +X Y1 18 550 220 220 L 70 70 0 1 T +ENDDRAW +ENDDEF +# +# 74*244DW_2 +# +DEF 74*244DW_2 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "74*244DW_2" -319 462 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 330 -440 -330 -440 +P 2 0 1 10 330 330 330 -440 +P 2 0 1 10 -330 330 330 330 +P 2 0 1 10 -330 -440 -330 330 +X G 19 -550 -330 220 R 70 70 0 1 P +X A1 11 -550 220 220 R 70 70 0 1 P +X A2 13 -550 110 220 R 70 70 0 1 P +X A3 15 -550 0 220 R 70 70 0 1 P +X A4 17 -550 -110 220 R 70 70 0 1 P +X Y4 3 550 -110 220 L 70 70 0 1 T +X Y3 5 550 0 220 L 70 70 0 1 T +X Y2 7 550 110 220 L 70 70 0 1 T +X Y1 9 550 220 220 L 70 70 0 1 T +ENDDRAW +ENDDEF +# +# 74*244DW_3 +# +DEF 74*244DW_3 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "74*244DW_3" 198 -22 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +X GND 10 0 -330 220 U 70 1 0 1 W +X VCC 20 0 330 220 D 70 1 0 1 W +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" 110 110 60 H V L BNN +F1 "C-EUC0402" 110 0 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# JP1Q +# +DEF JP1Q IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 165 0 110 +P 2 0 1 10 0 220 0 165 +P 2 0 1 10 0 -165 0 -110 +P 2 0 1 10 0 -220 0 -165 +P 2 0 1 10 77 220 -88 220 +P 2 0 1 10 77 -220 77 220 +P 2 0 1 10 -88 -220 77 -220 +P 2 0 1 10 -88 220 -88 -220 +X 1 1 0 -330 110 U 70 1 0 1 P +X 2 2 0 330 110 D 70 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" -385 77 60 H V L BNN +F1 "R-EU_R0402" -440 -44 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_12.sch b/rev03-KiCad/rev02_12.sch new file mode 100644 index 0000000..fa07462 --- /dev/null +++ b/rev03-KiCad/rev02_12.sch @@ -0,0 +1,440 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 14 27 +Title "rev02_12" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 13970 5060 0 42 ~ 12 +CS pull-up to disable MKM by\ndefault (allows programming\nof AVR) +Text Notes 12540 3080 0 84 ~ 12 +Master Key Memory +Text Notes 3740 1870 0 84 ~ 12 +SPI mux controlling access to the MKM.\nNormally, the FPGA has R/W access to the MKM but on a\ntamper event the tamper detect MCU (AVR) will grab access\nto the MKM and erase the contents. +Text Notes 8580 5610 0 42 ~ 12 +Make AVR unable to read the\nMKM by installing this jumper +Text Notes 4290 5390 0 42 ~ 12 +AVR access default\ndisabled through pull-up +Text Notes 4180 6600 0 42 ~ 12 +FPGA access default\nenabled through pull-down +Text Notes 14993 10153 0 84 ~ 12 +Master Key Memory +Text Notes 13079 4334 0 60 ~ 12 +U12 +Text Notes 12936 6094 0 60 ~ 12 +23K640-I/SN +Text Label 11594 4213 0 70 ~ +4.7k +Text Label 10714 4224 0 70 ~ +4.7k +Text Label 2739 4290 0 70 ~ +0.1uF +Text Label 12760 3740 0 70 ~ +0.1uF +Text Notes 8250 5720 1 60 ~ 12 +JP6 +Text Notes 5632 4092 0 60 ~ 12 +R80 +Text Label 5621 4191 0 70 ~ +4.7k +Text Notes 5797 6677 2 60 ~ 12 +R81 +Text Label 5621 6886 0 70 ~ +4.7k +Text Notes 6050 4488 0 60 ~ 12 +IC4 +$Comp +L GND #PWR?58023F8C +U 1 1 58023F8C +P 12430 6050 +F 0 "GND_87" H 12430 6050 20 0000 C CNN +F 1 "+GND" H 12430 5980 30 0000 C CNN +F 2 "" H 12430 6050 70 0000 C CNN +F 3 "" H 12430 6050 70 0000 C CNN + 1 12430 6050 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023F8B +U 1 1 58023F8B +P 12430 3520 +F 0 "3V3_BATT_8" H 12430 3520 20 0000 C CNN +F 1 "+3V3_BATT" H 12430 3450 30 0000 C CNN +F 2 "" H 12430 3520 70 0000 C CNN +F 3 "" H 12430 3520 70 0000 C CNN + 1 12430 3520 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023F8A +U 1 1 58023F8A +P 3630 3410 +F 0 "3V3_BATT_9" H 3630 3410 20 0000 C CNN +F 1 "+3V3_BATT" H 3630 3340 30 0000 C CNN +F 2 "" H 3630 3410 70 0000 C CNN +F 3 "" H 3630 3410 70 0000 C CNN + 1 3630 3410 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023F89 +U 1 1 58023F89 +P 11880 3520 +F 0 "3V3_BATT_10" H 11880 3520 20 0000 C CNN +F 1 "+3V3_BATT" H 11880 3450 30 0000 C CNN +F 2 "" H 11880 3520 70 0000 C CNN +F 3 "" H 11880 3520 70 0000 C CNN + 1 11880 3520 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F88 +U 1 1 58023F88 +P 12650 4070 +F 0 "GND_88" H 12650 4070 20 0000 C CNN +F 1 "+GND" H 12650 4000 30 0000 C CNN +F 2 "" H 12650 4070 70 0000 C CNN +F 3 "" H 12650 4070 70 0000 C CNN + 1 12650 4070 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F87 +U 1 1 58023F87 +P 8360 5940 +F 0 "GND_89" H 8360 5940 20 0000 C CNN +F 1 "+GND" H 8360 5870 30 0000 C CNN +F 2 "" H 8360 5940 70 0000 C CNN +F 3 "" H 8360 5940 70 0000 C CNN + 1 8360 5940 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F86 +U 1 1 58023F86 +P 3630 4620 +F 0 "GND_90" H 3630 4620 20 0000 C CNN +F 1 "+GND" H 3630 4550 30 0000 C CNN +F 2 "" H 3630 4620 70 0000 C CNN +F 3 "" H 3630 4620 70 0000 C CNN + 1 3630 4620 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F85 +U 1 1 58023F85 +P 5500 7150 +F 0 "GND_91" H 5500 7150 20 0000 C CNN +F 1 "+GND" H 5500 7080 30 0000 C CNN +F 2 "" H 5500 7150 70 0000 C CNN +F 3 "" H 5500 7150 70 0000 C CNN + 1 5500 7150 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023F84 +U 1 1 58023F84 +P 5500 3410 +F 0 "3V3_BATT_11" H 5500 3410 20 0000 C CNN +F 1 "+3V3_BATT" H 5500 3340 30 0000 C CNN +F 2 "" H 5500 3410 70 0000 C CNN +F 3 "" H 5500 3410 70 0000 C CNN + 1 5500 3410 + 1 0 0 -1 +$EndComp +$Comp +L 3V3_BATT #PWR?58023F83 +U 1 1 58023F83 +P 11110 3542 +F 0 "3V3_BATT_12" H 11110 3542 20 0000 C CNN +F 1 "+3V3_BATT" H 11110 3472 30 0000 C CNN +F 2 "" H 11110 3542 70 0000 C CNN +F 3 "" H 11110 3542 70 0000 C CNN + 1 11110 3542 + 1 0 0 -1 +$EndComp +Wire Wire Line + 12430 5610 12430 6050 +Wire Wire Line + 12540 5610 12430 5610 +Wire Wire Line + 12650 3960 12650 4070 +Wire Wire Line + 8360 5830 8360 5940 +Wire Wire Line + 3630 4510 3630 4620 +Wire Wire Line + 3630 4400 3630 4510 +Wire Wire Line + 3190 4290 3190 4510 +Wire Wire Line + 3630 4510 3190 4510 +Wire Wire Line + 5500 7040 5500 7150 +Wire Wire Line + 12540 5170 11880 5170 +Wire Wire Line + 11880 4400 11880 5170 +Wire Wire Line + 12540 5060 11110 5060 +Text Label 11110 5060 0 70 ~ +MKM_SCK +Wire Wire Line + 7150 4730 6930 4730 +Wire Wire Line + 7150 4730 7150 5940 +Wire Wire Line + 7150 5940 6930 5940 +Wire Wire Line + 7700 4730 7150 4730 +Text Label 7700 4730 0 70 ~ +MKM_SCK +Wire Wire Line + 12540 4950 11110 4950 +Text Label 11110 4950 0 70 ~ +MKM_MOSI +Wire Wire Line + 7260 6050 6930 6050 +Wire Wire Line + 7260 4840 7260 6050 +Wire Wire Line + 7260 4840 6930 4840 +Wire Wire Line + 7700 4840 7260 4840 +Text Label 7700 4840 0 70 ~ +MKM_MOSI +Wire Wire Line + 12540 4840 11550 4840 +Text Label 11154 4840 0 70 ~ +MKM_CS_N +Wire Wire Line + 7040 5830 6930 5830 +Wire Wire Line + 7040 4620 7040 5830 +Wire Wire Line + 7040 4620 6930 4620 +Wire Wire Line + 7700 4620 7040 4620 +Text Label 7700 4620 0 70 ~ +MKM_CS_N +Wire Wire Line + 14465 4620 14080 4620 +Text Label 14080 4620 0 70 ~ +MKM_MISO +Wire Wire Line + 5830 6160 5720 6160 +Wire Wire Line + 5720 4950 5720 6160 +Wire Wire Line + 5830 4950 5720 4950 +Wire Wire Line + 5720 4950 5280 4950 +Text Label 5280 4950 0 70 ~ +MKM_MISO +Wire Wire Line + 12540 4620 12430 4620 +Wire Wire Line + 12430 3630 12430 4620 +Wire Wire Line + 12430 3520 12430 3630 +Wire Wire Line + 12650 3630 12430 3630 +Wire Wire Line + 3630 3410 3630 3630 +Wire Wire Line + 3630 3630 3190 3630 +Wire Wire Line + 3190 3630 3190 3960 +Wire Wire Line + 3630 3630 3630 3740 +Wire Wire Line + 11880 3520 11880 3960 +Wire Wire Line + 5500 3410 5500 3960 +Wire Wire Line + 11110 3542 11110 3982 +Wire Wire Line + 5500 5170 5005 5170 +Wire Wire Line + 5830 5170 5500 5170 +Wire Wire Line + 5500 4400 5500 5170 +Text Label 5005 5170 0 70 ~ +MKM_CONTROL_AVR_ENA +Wire Wire Line + 5830 4730 5280 4730 +Text Label 5280 4730 0 70 ~ +MKM_AVR_SCK +Wire Wire Line + 5830 5830 5071 5830 +Text Label 5071 5830 0 70 ~ +MKM_FPGA_CS_N +Wire Wire Line + 5830 4620 5280 4620 +Text Label 5280 4620 0 70 ~ +MKM_AVR_CS_N +Wire Wire Line + 5830 6050 5071 6050 +Text Label 5071 6050 0 70 ~ +MKM_FPGA_MOSI +Wire Wire Line + 5830 4840 5280 4840 +Text Label 5280 4840 0 70 ~ +MKM_AVR_MOSI +Wire Wire Line + 7150 6160 6930 6160 +Text Label 7150 6160 0 70 ~ +MKM_FPGA_MISO +Wire Wire Line + 8360 4950 6930 4950 +Wire Wire Line + 8580 4950 8360 4950 +Wire Wire Line + 8360 4950 8360 5170 +Text Label 8580 4950 0 70 ~ +MKM_AVR_MISO +Wire Wire Line + 5830 5940 5071 5940 +Text Label 5071 5940 0 70 ~ +MKM_FPGA_SCK +Wire Wire Line + 5830 6380 5500 6380 +Wire Wire Line + 5500 6380 5500 6600 +Wire Wire Line + 5500 6380 4928 6380 +Text Label 4928 6380 0 70 ~ +MKM_CONTROL_FPGA_DIS +Wire Wire Line + 11110 4840 11110 4422 +Wire Wire Line + 11550 4840 11110 4840 +$Comp +L 23K640-I/SN IC199 +U 1 1 58023F82 + 1 13310 5060 + 1 0 0 -1 +$EndComp +$Comp +L 74*244DW_2 IC200 +U 1 1 58023F81 +F 1 "MC74AC244DW*" H 6061 6512 60 0000 L BNN +F 2 "" H 6061 6512 60 0000 C CNN +F 3 "" H 6061 6512 60 0000 C CNN + 1 6380 6050 + 1 0 0 -1 +$EndComp +$Comp +L 74*244DW_3 IC201 +U 1 1 58023F80 +F 1 "MC74AC244DW*" H 3828 4048 60 0000 L BNN +F 2 "" H 3828 4048 60 0000 C CNN +F 3 "" H 3828 4048 60 0000 C CNN + 1 3630 4070 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R33 +U 1 1 58023F7F +F 0 "R33" V 11815.1 3905 60 0000 L BNN +F 1 "" V 11924 3850 60 0000 L BNN +F 2 "" H 11924 3850 60 0000 C CNN +F 3 "" H 11924 3850 60 0000 C CNN + 1 11880 4180 + 0 1 1 0 +$EndComp +$Comp +L R-EU_R0402 R34 +U 1 1 58023F7E +F 0 "R34" V 11188.1 4584.78889 60 0000 R TNN +F 1 "" V 11066 4642 60 0000 R TNN +F 2 "" H 11066 4642 60 0000 C CNN +F 3 "" H 11066 4642 60 0000 C CNN + 1 11110 4202 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC0402 C106 +U 1 1 58023F7D +F 0 "C106" H 2750 3960 60 0000 L BNN +F 1 "" H 2750 4070 60 0000 L BNN +F 2 "" H 2750 4070 60 0000 C CNN +F 3 "" H 2750 4070 60 0000 C CNN + 1 3190 4070 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C107 +U 1 1 58023F7C +F 0 "C107" H 12760 3850 60 0000 L BNN +F 1 "" H 12760 3740 60 0000 L BNN +F 2 "" H 12760 3740 60 0000 C CNN +F 3 "" H 12760 3740 60 0000 C CNN + 1 12650 3740 + 1 0 0 -1 +$EndComp +$Comp +L JP1Q IC206 +U 1 1 58023F7B + 1 8360 5500 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC207 +U 1 1 58023F7A + 1 5500 4180 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC208 +U 1 1 58023F79 + 1 5500 6820 + 0 1 1 0 +$EndComp +$Comp +L 74*244DW_1 IC209 +U 1 1 58023F78 +F 1 "MC74AC244DW*" H 6050 5302 60 0000 L BNN +F 2 "" H 6050 5302 60 0000 C CNN +F 3 "" H 6050 5302 60 0000 C CNN + 1 6380 4840 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_13-cache.lib b/rev03-KiCad/rev02_13-cache.lib new file mode 100644 index 0000000..95fe7d0 --- /dev/null +++ b/rev03-KiCad/rev02_13-cache.lib @@ -0,0 +1,177 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# 2N7002 +# +DEF 2N7002 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "2N7002" -242 165 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -44 -110 -110 -110 +P 2 0 1 10 0 0 0 33 +P 2 0 1 10 0 -33 0 0 +P 2 0 1 10 0 55 0 154 +P 2 0 1 10 33 0 88 22 +P 2 0 1 10 33 0 88 -33 +P 2 0 1 10 33 0 0 0 +P 2 0 1 10 110 0 33 0 +P 2 0 1 10 110 -110 110 0 +P 2 0 1 10 0 -165 0 -66 +P 2 0 1 10 -44 -110 -44 110 +X D 3 220 110 220 L 1 1 0 1 P +X S 2 220 -110 220 L 1 1 0 1 P +X G 1 -220 -110 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# LEDCHIP-LED0603 +# +DEF LEDCHIP-LED0603 IC 0 40 Y Y 1 F N +F0 "LED" 132 66 60 H V L BNN +F1 "LEDCHIP-LED0603" 132 -143 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -110 55 0 +P 2 0 1 10 -55 0 0 -110 +P 2 0 1 10 0 -110 55 -110 +P 2 0 1 10 -55 -110 0 -110 +P 2 0 1 10 0 0 55 0 +P 2 0 1 10 -55 0 0 0 +P 2 0 1 10 0 -110 0 0 +P 2 0 1 10 -154 -99 -88 -33 +P 2 0 1 10 -143 -143 -88 -88 +P 4 0 1 10 -154 -99 -132 -55 -110 -77 -154 -99 F +P 4 0 1 10 -143 -143 -132 -110 -110 -132 -143 -143 F +X C 2 0 -220 110 U 1 1 0 1 P +X A 1 0 110 110 D 1 1 0 1 P +ENDDRAW +ENDDEF +# +# MA08-1 +# +DEF MA08-1 IC 0 40 Y Y 1 F N +F0 "SV" -198 -693 60 H V L BNN +F1 "MA08-1" 44 -693 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -55 -440 165 -440 +P 2 0 1 10 110 -110 55 -110 +P 2 0 1 10 110 -220 55 -220 +P 2 0 1 10 110 -330 55 -330 +P 2 0 1 10 110 110 55 110 +P 2 0 1 10 110 0 55 0 +P 2 0 1 10 110 440 55 440 +P 2 0 1 10 110 330 55 330 +P 2 0 1 10 110 220 55 220 +P 2 0 1 10 -55 -440 -55 550 +P 2 0 1 10 165 550 165 -440 +P 2 0 1 10 165 550 -55 550 +X 1 1 330 -330 220 L 70 1 0 1 P +X 2 2 330 -220 220 L 70 1 0 1 P +X 3 3 330 -110 220 L 70 1 0 1 P +X 4 4 330 0 220 L 70 1 0 1 P +X 5 5 330 110 220 L 70 1 0 1 P +X 6 6 330 220 220 L 70 1 0 1 P +X 7 7 330 330 220 L 70 1 0 1 P +X 8 8 330 440 220 L 70 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" 165 -55 60 H V L BNN +F1 "R-EU_R0402" 165 -143 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0603 +# +DEF R-EU_R0603 IC 0 40 Y Y 1 F N +F0 "R" -121 407 60 H V L BNN +F1 "R-EU_R0603" 77 407 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_1 +# +DEF XC7A200TFBG484_1 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 880 -440 880 +P 2 0 1 10 0 -880 0 880 +P 2 0 1 10 -440 -880 0 -880 +X VCCBATT_0 E12 220 770 220 L 70 70 0 1 P +X VCCO_0 F12 220 660 220 L 70 70 0 1 P +X VCCO_0 T12 220 550 220 L 70 70 0 1 P +X CFGBVS_0 U8 220 440 220 L 70 70 0 1 P +X DONE_0 G11 220 330 220 L 70 70 0 1 P +X INIT_B_0 U12 220 220 220 L 70 70 0 1 C +X PROGRAM_B_0 N12 220 110 220 L 70 70 0 1 P +X CCLK_0 L12 220 0 220 L 70 70 0 1 P +X M0_0 U11 220 -110 220 L 70 70 0 1 P +X M1_0 U10 220 -220 220 L 70 70 0 1 P +X M2_0 U9 220 -330 220 L 70 70 0 1 P +X TCK_0 V12 220 -440 220 L 70 70 0 1 P +X TDI_0 R13 220 -550 220 L 70 70 0 1 P +X TDO_0 U13 220 -660 220 L 70 70 0 1 O +X TMS_0 T13 220 -770 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_13.sch b/rev03-KiCad/rev02_13.sch new file mode 100644 index 0000000..bc0668e --- /dev/null +++ b/rev03-KiCad/rev02_13.sch @@ -0,0 +1,632 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 15 27 +Title "rev02_13" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 1210 3630 0 60 ~ 12 +*) Configuration Interface +Text Notes 1100 8470 0 60 ~ 12 +M[2:0] == 3'b001 => Master SPI +Text Notes 770 7040 0 60 ~ 12 +*) Since VCCO is 3.3V, CFGBVS must be tied High.\n*) Battery is not used\n*) PROG_B is dedicated input -- can be driven by STM32 directly\n*) INIT_B is bi-directional open-drain, must be driven with MOSFET to ground +Text Notes 4070 9680 0 60 ~ 12 +*) "Not DONE" LED, should be of red color +Text Notes 9449 10131 0 54 ~ 12 +FPGA configuration interface +Text Notes 1760 9218 0 60 ~ 12 +R35 +Text Label 1749 9317 0 70 ~ +1k +Text Notes 2640 9207 0 60 ~ 12 +R36 +Text Label 2629 9306 0 70 ~ +1k +Text Label 3564 8404 0 70 ~ +1k +Text Label 6985 4081 0 70 ~ +4.7k +Text Label 5995 4092 0 70 ~ +4.7k +Text Notes 7095 4961 0 60 ~ 12 +Q4 +Text Label 7425 5643 0 70 ~ +4.7k +Text Label 5324 8503 0 70 ~ +330 +Text Notes 5654 9416 2 60 ~ 12 +R39 +Text Label 5698 9515 0 70 ~ +100 +Text Notes 8646 8569 0 60 ~ 12 +C108 +Text Label 8646 8679 0 70 ~ +0.1uF +Text Label 10505 7513 0 70 ~ +10k +Text Label 10505 7623 0 70 ~ +10k +Text Label 10505 7733 0 70 ~ +10k +Text Label 3454 4279 0 70 ~ +0 +Text Label 3454 4345 0 70 ~ +0 +Text Label 3454 4422 0 70 ~ +0 +Text Notes 1760 3927 0 60 ~ 12 +U13 +Text Notes 1155 5830 0 60 ~ 12 +XC7A200TFBG484 +$Comp +L GND #PWR?58023F77 +U 1 1 58023F77 +P 2420 5830 +F 0 "GND_92" H 2420 5830 20 0000 C CNN +F 1 "+GND" H 2420 5760 30 0000 C CNN +F 2 "" H 2420 5830 70 0000 C CNN +F 3 "" H 2420 5830 70 0000 C CNN + 1 2420 5830 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F76 +U 1 1 58023F76 +P 1650 9680 +F 0 "GND_93" H 1650 9680 20 0000 C CNN +F 1 "+GND" H 1650 9610 30 0000 C CNN +F 2 "" H 1650 9680 70 0000 C CNN +F 3 "" H 1650 9680 70 0000 C CNN + 1 1650 9680 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F75 +U 1 1 58023F75 +P 2530 9680 +F 0 "GND_94" H 2530 9680 20 0000 C CNN +F 1 "+GND" H 2530 9610 30 0000 C CNN +F 2 "" H 2530 9680 70 0000 C CNN +F 3 "" H 2530 9680 70 0000 C CNN + 1 2530 9680 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F74 +U 1 1 58023F74 +P 6380 5940 +F 0 "GND_95" H 6380 5940 20 0000 C CNN +F 1 "+GND" H 6380 5870 30 0000 C CNN +F 2 "" H 6380 5940 70 0000 C CNN +F 3 "" H 6380 5940 70 0000 C CNN + 1 6380 5940 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F73 +U 1 1 58023F73 +P 7260 5940 +F 0 "GND_96" H 7260 5940 20 0000 C CNN +F 1 "+GND" H 7260 5870 30 0000 C CNN +F 2 "" H 7260 5940 70 0000 C CNN +F 3 "" H 7260 5940 70 0000 C CNN + 1 7260 5940 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F72 +U 1 1 58023F72 +P 10010 9130 +F 0 "GND_97" H 10010 9130 20 0000 C CNN +F 1 "+GND" H 10010 9060 30 0000 C CNN +F 2 "" H 10010 9130 70 0000 C CNN +F 3 "" H 10010 9130 70 0000 C CNN + 1 10010 9130 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F71 +U 1 1 58023F71 +P 8470 9130 +F 0 "GND_98" H 8470 9130 20 0000 C CNN +F 1 "+GND" H 8470 9060 30 0000 C CNN +F 2 "" H 8470 9130 70 0000 C CNN +F 3 "" H 8470 9130 70 0000 C CNN + 1 8470 9130 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F70 +U 1 1 58023F70 +P 3410 7920 +F 0 "VCCO_3V3_21" H 3410 7920 20 0000 C CNN +F 1 "+VCCO_3V3" H 3410 7850 30 0000 C CNN +F 2 "" H 3410 7920 70 0000 C CNN +F 3 "" H 3410 7920 70 0000 C CNN + 1 3410 7920 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F6F +U 1 1 58023F6F +P 5170 7920 +F 0 "VCCO_3V3_22" H 5170 7920 20 0000 C CNN +F 1 "+VCCO_3V3" H 5170 7850 30 0000 C CNN +F 2 "" H 5170 7920 70 0000 C CNN +F 3 "" H 5170 7920 70 0000 C CNN + 1 5170 7920 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F6E +U 1 1 58023F6E +P 8470 7920 +F 0 "VCCO_3V3_23" H 8470 7920 20 0000 C CNN +F 1 "+VCCO_3V3" H 8470 7850 30 0000 C CNN +F 2 "" H 8470 7920 70 0000 C CNN +F 3 "" H 8470 7920 70 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-1 +$EndComp +$Comp +L R-EU_R0402 IC221 +U 1 1 58023F5F + 1 2530 9240 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 R37 +U 1 1 58023F5E +F 0 "R37" V 3474.9 8195 60 0000 R TNN +F 1 "" V 3267 8195 60 0000 R TNN +F 2 "" H 3267 8195 60 0000 C CNN +F 3 "" H 3267 8195 60 0000 C CNN + 1 3410 8360 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 R41 +U 1 1 58023F5D +F 0 "R41" V 6898.1 3902.78889 60 0000 R TNN +F 1 "" V 6666 3960 60 0000 R TNN +F 2 "" H 6666 3960 60 0000 C CNN +F 3 "" H 6666 3960 60 0000 C CNN + 1 6820 4070 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 R40 +U 1 1 58023F5C +F 0 "R40" V 6458.1 4452.78889 60 0000 R TNN +F 1 "" V 6226 4510 60 0000 R TNN +F 2 "" H 6226 4510 60 0000 C CNN +F 3 "" H 6226 4510 60 0000 C CNN + 1 6380 4070 + 0 -1 -1 0 +$EndComp +$Comp +L 2N7002 IC225 +U 1 1 58023F5B +F 1 "2N7002P,235" H 7062 5115 60 0000 R BNN +F 2 "" H 7062 5115 60 0000 C CNN +F 3 "" H 7062 5115 60 0000 C CNN + 1 6820 4950 + -1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 R42 +U 1 1 58023F5A +F 0 "R42" V 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\ No newline at end of file diff --git a/rev03-KiCad/rev02_14-cache.lib b/rev03-KiCad/rev02_14-cache.lib new file mode 100644 index 0000000..ce25ed7 --- /dev/null +++ b/rev03-KiCad/rev02_14-cache.lib @@ -0,0 +1,144 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:46 +#encoding utf-8 +# FPGA_VCCAUX_1V8 +# +DEF FPGA_VCCAUX_1V8 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FPGA_VCCAUX_1V8" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FPGA_VCCAUX_1V8 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_11 +# +DEF XC7A200TFBG484_11 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 330 -440 330 +P 2 0 1 10 0 -330 0 330 +P 2 0 1 10 -440 -330 0 -330 +X MGTAVCC D6 220 220 220 L 70 70 0 1 P +X MGTAVCC D10 220 110 220 L 70 70 0 1 P +X MGTAVCC E8 220 0 220 L 70 70 0 1 P +X MGTAVCC F7 220 -110 220 L 70 70 0 1 P +X MGTAVCC F9 220 -220 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_12 +# +DEF XC7A200TFBG484_12 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 330 -440 330 +P 2 0 1 10 0 -440 0 330 +P 2 0 1 10 -440 -440 0 -440 +X MGTAVTT B5 220 220 220 L 70 70 0 1 P +X MGTAVTT B7 220 110 220 L 70 70 0 1 P +X MGTAVTT B9 220 0 220 L 70 70 0 1 P +X MGTAVTT B11 220 -110 220 L 70 70 0 1 P +X MGTAVTT C4 220 -220 220 L 70 70 0 1 P +X MGTAVTT C8 220 -330 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_13 +# +DEF XC7A200TFBG484_13 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 110 -440 110 +P 2 0 1 10 0 -220 0 110 +P 2 0 1 10 -440 -220 0 -220 +X DXP_0 N10 220 0 220 L 70 70 0 1 P +X DXN_0 N9 220 -110 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_17 +# +DEF XC7A200TFBG484_17 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 330 -440 330 +P 2 0 1 10 0 -440 0 330 +P 2 0 1 10 -440 -440 0 -440 +X VCCADC_0 K10 220 220 220 L 70 70 0 1 P +X VP_0 L10 220 110 220 L 70 70 0 1 P +X VN_0 M9 220 0 220 L 70 70 0 1 P +X VREFP_0 M10 220 -110 220 L 70 70 0 1 P +X VREFN_0 L9 220 -220 220 L 70 70 0 1 P +X GNDADC_0 K9 220 -330 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_8 +# +DEF XC7A200TFBG484_8 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 1210 -440 1210 +P 2 0 1 10 0 -1210 0 1210 +P 2 0 1 10 -440 -1210 0 -1210 +X MGTRREF_216 F8 220 1100 220 L 70 70 0 1 P +X MGTPRXN0_216 C11 220 990 220 L 70 70 0 1 P +X MGTPRXN1_216 A10 220 880 220 L 70 70 0 1 P +X MGTPRXN2_216 C9 220 770 220 L 70 70 0 1 P +X MGTPRXN3_216 A8 220 660 220 L 70 70 0 1 P +X MGTPRXP0_216 D11 220 550 220 L 70 70 0 1 P +X MGTPRXP1_216 B10 220 440 220 L 70 70 0 1 P +X MGTPRXP2_216 D9 220 330 220 L 70 70 0 1 P +X MGTPRXP3_216 B8 220 220 220 L 70 70 0 1 P +X MGTPTXN0_216 C7 220 110 220 L 70 70 0 1 P +X MGTPTXN1_216 A6 220 0 220 L 70 70 0 1 P +X MGTPTXN2_216 C5 220 -110 220 L 70 70 0 1 P +X MGTPTXN3_216 A4 220 -220 220 L 70 70 0 1 P +X MGTPTXP0_216 D7 220 -330 220 L 70 70 0 1 P +X MGTPTXP1_216 B6 220 -440 220 L 70 70 0 1 P +X MGTPTXP2_216 D5 220 -550 220 L 70 70 0 1 P +X MGTPTXP3_216 B4 220 -660 220 L 70 70 0 1 P +X MGTREFCLK0P_216 F10 220 -770 220 L 70 70 0 1 P +X MGTREFCLK0N_216 E10 220 -880 220 L 70 70 0 1 P +X MGTREFCLK1P_216 F6 220 -990 220 L 70 70 0 1 P +X MGTREFCLK1N_216 E6 220 -1100 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_14.sch b/rev03-KiCad/rev02_14.sch new file mode 100644 index 0000000..7cbe3a2 --- /dev/null +++ b/rev03-KiCad/rev02_14.sch @@ -0,0 +1,165 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 16 27 +Title "rev02_14" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 8250 3630 0 60 ~ 12 +*) Temperature Sensor [NOT USED] +Text Notes 5720 3630 0 60 ~ 12 +*) XADC [NOT USED] +Text Notes 1210 3520 0 60 ~ 12 +*) Transceivers [NOT USED] +Text Notes 9691 10153 0 84 ~ 12 +FPGA unused +Text Notes 6776 4389 0 60 ~ 12 +C109 +Text Label 7062 4378 0 70 ~ +0.1uF +$Comp +L GND #PWR?58023F57 +U 1 1 58023F57 +P 9570 4400 +F 0 "GND_99" H 9570 4400 20 0000 C CNN +F 1 "+GND" H 9570 4330 30 0000 C CNN +F 2 "" H 9570 4400 70 0000 C CNN +F 3 "" H 9570 4400 70 0000 C CNN + 1 9570 4400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F56 +U 1 1 58023F56 +P 6270 4840 +F 0 "GND_100" H 6270 4840 20 0000 C CNN +F 1 "+GND" H 6270 4770 30 0000 C CNN +F 2 "" H 6270 4840 70 0000 C CNN +F 3 "" H 6270 4840 70 0000 C CNN + 1 6270 4840 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F55 +U 1 1 58023F55 +P 6710 4840 +F 0 "GND_101" H 6710 4840 20 0000 C CNN +F 1 "+GND" H 6710 4770 30 0000 C CNN +F 2 "" H 6710 4840 70 0000 C CNN +F 3 "" H 6710 4840 70 0000 C CNN + 1 6710 4840 + 1 0 0 -1 +$EndComp +$Comp +L FPGA_VCCAUX_1V8 #PWR?58023F54 +U 1 1 58023F54 +P 6710 3850 +F 0 "FPGA_VCCAUX_1V8" H 6710 3850 20 0000 C CNN +F 1 "+FPGA_VCCAUX_1V8" H 6710 3780 30 0000 C CNN +F 2 "" H 6710 3850 70 0000 C CNN +F 3 "" H 6710 3850 70 0000 C CNN + 1 6710 3850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6270 4620 6050 4620 +Wire Wire Line + 6270 4620 6270 4840 +Wire Wire Line + 6270 4510 6050 4510 +Wire Wire Line + 6270 4510 6270 4620 +Wire Wire Line + 6270 4400 6050 4400 +Wire Wire Line + 6270 4400 6270 4510 +Wire Wire Line + 6710 4620 6710 4840 +Wire Wire Line + 9570 4180 9350 4180 +Wire Wire Line + 9570 4180 9570 4400 +Wire Wire Line + 9570 4070 9350 4070 +Wire Wire Line + 9570 4070 9570 4180 +Wire Wire Line + 6710 4070 6050 4070 +Wire Wire Line + 6710 4070 6710 4290 +Wire Wire Line + 6710 3850 6710 4070 +$Comp +L C-EUC0402 IC229 +U 1 1 58023F53 + 1 6710 4400 + 1 0 0 -1 +$EndComp +$Comp +L XC7A200TFBG484_8 IC230 +U 1 1 58023F52 + 1 2090 7590 + 1 0 0 -1 +$EndComp +$Comp +L XC7A200TFBG484_11 IC231 +U 1 1 58023F51 + 1 2090 4400 + 1 0 0 -1 +$EndComp +$Comp +L XC7A200TFBG484_12 IC232 +U 1 1 58023F50 + 1 2090 5500 + 1 0 0 -1 +$EndComp +$Comp +L XC7A200TFBG484_13 IC233 +U 1 1 58023F4F + 1 9130 4070 + 1 0 0 -1 +$EndComp +$Comp +L XC7A200TFBG484_17 IC234 +U 1 1 58023F4E + 1 5830 4290 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_15-cache.lib b/rev03-KiCad/rev02_15-cache.lib new file mode 100644 index 0000000..6236c4f --- /dev/null +++ b/rev03-KiCad/rev02_15-cache.lib @@ -0,0 +1,231 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# 74*244DW_1 +# +DEF 74*244DW_1 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "74*244DW_1" -341 -583 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 330 -440 -330 -440 +P 2 0 1 10 330 330 330 -440 +P 2 0 1 10 -330 330 330 330 +P 2 0 1 10 -330 -440 -330 330 +X G 1 -550 -330 220 R 70 70 0 1 P +X A1 2 -550 220 220 R 70 70 0 1 P +X A2 4 -550 110 220 R 70 70 0 1 P +X A3 6 -550 0 220 R 70 70 0 1 P +X A4 8 -550 -110 220 R 70 70 0 1 P +X Y4 12 550 -110 220 L 70 70 0 1 T +X Y3 14 550 0 220 L 70 70 0 1 T +X Y2 16 550 110 220 L 70 70 0 1 T +X Y1 18 550 220 220 L 70 70 0 1 T +ENDDRAW +ENDDEF +# +# 74*244DW_2 +# +DEF 74*244DW_2 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "74*244DW_2" -330 -594 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 330 -440 -330 -440 +P 2 0 1 10 330 330 330 -440 +P 2 0 1 10 -330 330 330 330 +P 2 0 1 10 -330 -440 -330 330 +X G 19 -550 -330 220 R 70 70 0 1 P +X A1 11 -550 220 220 R 70 70 0 1 P +X A2 13 -550 110 220 R 70 70 0 1 P +X A3 15 -550 0 220 R 70 70 0 1 P +X A4 17 -550 -110 220 R 70 70 0 1 P +X Y4 3 550 -110 220 L 70 70 0 1 T +X Y3 5 550 0 220 L 70 70 0 1 T +X Y2 7 550 110 220 L 70 70 0 1 T +X Y1 9 550 220 220 L 70 70 0 1 T +ENDDRAW +ENDDEF +# +# 74*244DW_3 +# +DEF 74*244DW_3 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "74*244DW_3" 220 -22 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +X GND 10 0 -330 220 U 70 1 0 1 W +X VCC 20 0 330 220 D 70 1 0 1 W +ENDDRAW +ENDDEF +# +# ASF* +# +DEF ASF* IC 0 40 Y Y 1 F N +F0 "Q" -363 -473 60 H V L BNN +F1 "ASF*" -572 363 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -330 -330 -330 330 +P 2 0 1 10 -330 -330 330 -330 +P 2 0 1 10 330 0 330 -330 +P 2 0 1 10 330 220 330 0 +P 2 0 1 10 330 330 330 220 +P 2 0 1 10 330 330 -330 330 +P 2 0 1 10 110 110 -55 220 +P 2 0 1 10 275 0 110 110 +P 2 0 1 10 -55 -220 275 0 +P 2 0 1 10 -55 -143 -55 -220 +P 2 0 1 10 -55 132 -55 -143 +P 2 0 1 10 -55 220 -55 132 +P 2 0 1 10 -55 132 -165 132 +P 2 0 1 10 -55 -143 -165 -143 +P 2 0 1 10 330 0 275 0 +P 2 0 1 10 110 220 330 220 +P 2 0 1 10 110 110 110 220 +P 2 0 1 10 -209 11 -209 -22 +P 2 0 1 10 -121 11 -209 11 +P 2 0 1 10 -121 -22 -121 11 +P 2 0 1 10 -121 -22 -209 -22 +P 2 0 1 10 -165 -44 -220 -44 +P 2 0 1 10 -110 -44 -165 -44 +P 2 0 1 10 -165 132 -165 44 +P 2 0 1 10 -165 -44 -165 -143 +P 2 0 1 10 -110 44 -220 44 +X GND 2 -550 -220 220 R 70 1 0 1 W +X VCC 4 -550 220 220 R 70 1 0 1 W +X FO 3 550 0 220 L 70 1 0 1 O +X OE 1 550 220 220 L 70 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" 66 11 60 H V L BNN +F1 "C-EUC0402" 66 -209 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# M03X2NO_SILK +# +DEF M03X2NO_SILK IC 0 40 Y Y 1 F N +F0 "JP" -231 -341 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 220 220 -220 220 +P 2 0 1 10 220 110 220 220 +P 2 0 1 10 220 0 220 110 +P 2 0 1 10 220 -110 220 0 +P 2 0 1 10 220 -220 220 -110 +P 2 0 1 10 -220 -220 220 -220 +P 2 0 1 10 -220 -110 -220 -220 +P 2 0 1 10 -220 0 -220 -110 +P 2 0 1 10 -220 110 -220 0 +P 2 0 1 10 -220 220 -220 110 +P 2 0 1 10 -121 110 -220 110 +P 2 0 1 10 -121 0 -220 0 +P 2 0 1 10 -121 -110 -220 -110 +P 2 0 1 10 121 -110 220 -110 +P 2 0 1 10 121 0 220 0 +P 2 0 1 10 121 110 220 110 +A -77 110 44 0 1200 1 1 10 N -33 110 -99 148 +A -77 110 44 1200 -1200 1 1 10 N -99 148 -99 71 +A -77 110 44 -1200 0 1 1 10 N -99 71 -33 110 +A 77 110 44 0 1200 1 1 10 N 121 110 54 148 +A 77 110 44 1200 -1200 1 1 10 N 54 148 54 71 +A 77 110 44 -1200 0 1 1 10 N 54 71 121 110 +A 77 0 44 0 1200 1 1 10 N 121 0 54 38 +A 77 0 44 1200 -1200 1 1 10 N 54 38 54 -38 +A 77 0 44 -1200 0 1 1 10 N 54 -38 121 0 +A 77 -110 44 0 1200 1 1 10 N 121 -110 54 -71 +A 77 -110 44 1200 -1200 1 1 10 N 54 -71 54 -148 +A 77 -110 44 -1200 0 1 1 10 N 54 -148 121 -110 +A -77 -110 44 0 1200 1 1 10 N -33 -110 -99 -71 +A -77 -110 44 1200 -1200 1 1 10 N -99 -71 -99 -148 +A -77 -110 44 -1200 0 1 1 10 N -99 -148 -33 -110 +A -77 0 44 0 1200 1 1 10 N -33 0 -99 38 +A -77 0 44 1200 -1200 1 1 10 N -99 38 -99 -38 +A -77 0 44 -1200 0 1 1 10 N -99 -38 -33 0 +X 1 1 -330 110 110 R 1 1 0 1 P +X 3 3 -330 0 110 R 1 1 0 1 P +X 5 5 -330 -110 110 R 1 1 0 1 P +X 6 6 330 -110 110 L 1 1 0 1 P +X 4 4 330 0 110 L 1 1 0 1 P +X 2 2 330 110 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# N25Q128A13ES +# +DEF N25Q128A13ES IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "N25Q128A13ES" -330 407 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 605 385 -550 385 +P 2 0 1 10 605 -165 605 385 +P 2 0 1 10 -550 -165 605 -165 +P 2 0 1 10 -550 385 -550 -165 +X ~S 1 -770 275 220 R 70 70 0 1 P +X DQ1 2 -770 165 220 R 70 70 0 1 P +X ~W/VPP/DQ2 3 -770 55 220 R 70 70 0 1 P +X VSS 4 -770 -55 220 R 70 70 0 1 P +X VCC 8 825 275 220 L 70 70 0 1 P +X ~HOLD/DQ3 7 825 165 220 L 70 70 0 1 P +X C 6 825 55 220 L 70 70 0 1 P +X DQ0 5 825 -55 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_15.sch b/rev03-KiCad/rev02_15.sch new file mode 100644 index 0000000..0d191a0 --- /dev/null +++ b/rev03-KiCad/rev02_15.sch @@ -0,0 +1,578 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 17 27 +Title "rev02_15" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 7810 4290 0 60 ~ 12 +*) HOLD feature not used\n*) PROM is write-protected by default, to disable\nwrite protection (such as during firmware update),\njumper must be inserted +Text Notes 5280 8360 0 84 ~ 12 +FPGA clock +Text Notes 7810 3520 0 84 ~ 12 +FPGA config memory, 128 Mbit +Text Notes 1386 3223 0 84 ~ 12 +SPI mux to let ARM override access to\nFPGA config memory (to reprogram FPGA) +Text Notes 462 5742 0 42 ~ 12 +Install this jumper to allow\nARM to configure the FPGA +Text Notes 3839 4235 0 42 ~ 12 +ARM access default\ndisabled through pull-up +Text Notes 3509 7513 0 42 ~ 12 +FPGA access default\nenabled through pull-down +Text Notes 473 6094 0 42 ~ 12 +Install this jumper to allow\nARM to configure the FPGA +Text Notes 9372 10131 0 60 ~ 12 +FPGA supporting components +Text Notes 8690 5698 0 60 ~ 12 +IC3 +Text Notes 8470 5390 0 60 ~ 12 +R51 +Text Label 8459 5489 0 70 ~ +4.7k +Text Notes 7480 6490 0 60 ~ 12 +R50 +Text Label 7480 6578 0 70 ~ +4.7k +Text Notes 4906 9449 0 60 ~ 12 +C111 +Text Notes 4906 9669 0 60 ~ 12 +0.01uF +Text Notes 6215 8547 2 60 ~ 12 +R49 +Text Label 6039 8866 0 70 ~ +0 +Text Label 10626 6677 0 70 ~ +0.1uF +Text Label 1452 4774 0 70 ~ +0.1uF +Text Notes 3817 4004 0 60 ~ 12 +R46 +Text Label 3817 4092 0 70 ~ +4.7k +Text Notes 3531 7172 2 60 ~ 12 +R47 +Text Label 3344 7381 0 70 ~ +4.7k +Text Notes 7095 9416 2 60 ~ 12 +R4 +Text Label 7194 9526 0 70 ~ +0 +Text Notes 4246 4961 0 60 ~ 12 +IC2 +$Comp +L GND #PWR?58023F4D +U 1 1 58023F4D +P 8360 6930 +F 0 "GND_102" H 8360 6930 20 0000 C CNN +F 1 "+GND" H 8360 6860 30 0000 C CNN +F 2 "" H 8360 6930 70 0000 C CNN +F 3 "" H 8360 6930 70 0000 C CNN + 1 8360 6930 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F4C +U 1 1 58023F4C +P 7370 6930 +F 0 "GND_103" H 7370 6930 20 0000 C CNN +F 1 "+GND" H 7370 6860 30 0000 C CNN +F 2 "" H 7370 6930 70 0000 C CNN +F 3 "" H 7370 6930 70 0000 C CNN + 1 7370 6930 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F4B +U 1 1 58023F4B +P 11000 6930 +F 0 "GND_104" H 11000 6930 20 0000 C CNN +F 1 "+GND" H 11000 6860 30 0000 C CNN +F 2 "" H 11000 6930 70 0000 C CNN +F 3 "" H 11000 6930 70 0000 C CNN + 1 11000 6930 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F4A +U 1 1 58023F4A +P 5500 9900 +F 0 "GND_105" H 5500 9900 20 0000 C CNN +F 1 "+GND" H 5500 9830 30 0000 C CNN +F 2 "" H 5500 9900 70 0000 C CNN +F 3 "" H 5500 9900 70 0000 C CNN + 1 5500 9900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F49 +U 1 1 58023F49 +P 4840 9900 +F 0 "GND_106" H 4840 9900 20 0000 C CNN +F 1 "+GND" H 4840 9830 30 0000 C CNN +F 2 "" H 4840 9900 70 0000 C CNN +F 3 "" H 4840 9900 70 0000 C CNN + 1 4840 9900 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F48 +U 1 1 58023F48 +P 7370 4620 +F 0 "VCCO_3V3_27" H 7370 4620 20 0000 C CNN +F 1 "+VCCO_3V3" H 7370 4550 30 0000 C CNN +F 2 "" H 7370 4620 70 0000 C CNN +F 3 "" H 7370 4620 70 0000 C CNN + 1 7370 4620 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F47 +U 1 1 58023F47 +P 4840 8690 +F 0 "VCCO_3V3_28" H 4840 8690 20 0000 C CNN +F 1 "+VCCO_3V3" H 4840 8620 30 0000 C CNN +F 2 "" H 4840 8690 70 0000 C CNN +F 3 "" H 4840 8690 70 0000 C CNN + 1 4840 8690 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F46 +U 1 1 58023F46 +P 1826 3993 +F 0 "VCCO_3V3_29" H 1826 3993 20 0000 C CNN +F 1 "+VCCO_3V3" H 1826 3923 30 0000 C CNN +F 2 "" H 1826 3993 70 0000 C CNN +F 3 "" H 1826 3993 70 0000 C CNN + 1 1826 3993 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F45 +U 1 1 58023F45 +P 1826 5093 +F 0 "GND_107" H 1826 5093 20 0000 C CNN +F 1 "+GND" H 1826 5023 30 0000 C CNN +F 2 "" H 1826 5093 70 0000 C CNN +F 3 "" H 1826 5093 70 0000 C CNN + 1 1826 5093 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F44 +U 1 1 58023F44 +P 3696 3630 +F 0 "VCCO_3V3_30" H 3696 3630 20 0000 C CNN +F 1 "+VCCO_3V3" H 3696 3560 30 0000 C CNN +F 2 "" H 3696 3630 70 0000 C CNN +F 3 "" H 3696 3630 70 0000 C CNN + 1 3696 3630 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F43 +U 1 1 58023F43 +P 3256 7623 +F 0 "GND_108" H 3256 7623 20 0000 C CNN +F 1 "+GND" H 3256 7553 30 0000 C CNN +F 2 "" H 3256 7623 70 0000 C CNN +F 3 "" H 3256 7623 70 0000 C CNN + 1 3256 7623 + 1 0 0 -1 +$EndComp +Wire Wire Line + 8360 6160 8360 6930 +Wire Wire Line + 8470 6160 8360 6160 +Wire Wire Line + 7370 6710 7370 6930 +Wire Wire Line + 11000 6600 11000 6930 +Wire Wire Line + 5500 9570 5500 9900 +Wire Wire Line + 5610 9570 5500 9570 +Wire Wire Line + 4840 9680 4840 9900 +Wire Wire Line + 1826 4983 1826 5093 +Wire Wire Line + 1826 4873 1826 4983 +Wire Wire Line + 1386 4763 1386 4983 +Wire Wire Line + 1826 4983 1386 4983 +Wire Wire Line + 3256 7513 3256 7623 +Wire Wire Line + 8360 4950 8360 5170 +Wire Wire Line + 8360 4950 7370 4950 +Wire Wire Line + 7370 4620 7370 4950 +Wire Wire Line + 10340 5830 10065 5830 +Wire Wire Line + 10340 4950 10340 5830 +Wire Wire Line + 10340 4950 8360 4950 +Wire Wire Line + 10340 5940 10065 5940 +Wire Wire Line + 10340 5830 10340 5940 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5456 5313 5126 5313 +Wire Wire Line + 5676 5313 5456 5313 +Text Label 5676 5313 0 70 ~ +FPGA_PROM_MOSI +Wire Wire Line + 8470 5830 8360 5830 +Wire Wire Line + 8360 5610 8360 5830 +Wire Wire Line + 8360 5830 7590 5830 +Text Label 7590 5830 0 70 ~ +FPGA_PROM_CS_N +Wire Wire Line + 5236 6303 5126 6303 +Wire Wire Line + 5236 5093 5236 6303 +Wire Wire Line + 5236 5093 5126 5093 +Wire Wire Line + 5676 5093 5236 5093 +Text Label 5676 5093 0 70 ~ +FPGA_PROM_CS_N +Wire Wire Line + 8470 5940 7590 5940 +Text Label 7590 5940 0 70 ~ +FPGA_PROM_MISO +Wire Wire Line + 4026 5423 3916 5423 +Wire Wire Line + 3916 5423 3278 5423 +Wire Wire Line + 4026 6633 3916 6633 +Wire Wire Line + 3916 5423 3916 6633 +Text Label 3278 5423 0 70 ~ +FPGA_PROM_MISO +Wire Wire Line + 8470 6050 7370 6050 +Wire Wire Line + 7370 6050 7370 6270 +Text Label 7590 6050 0 70 ~ +FPGA_PROM_W_N +Wire Wire Line + 7700 9350 7370 9350 +Text Label 7370 9350 0 70 ~ +FPGA_GCLK +Wire Wire Line + 6820 9130 6710 9130 +Wire Wire Line + 6820 8690 6820 9130 +Wire Wire Line + 6820 8690 6380 8690 +Wire Wire Line + 4026 6413 3399 6413 +Text Label 3399 6413 0 70 ~ +FPGA_CFG_SCLK +Wire Wire Line + 4026 6523 3399 6523 +Text Label 3399 6523 0 70 ~ +FPGA_CFG_MOSI +Wire Wire Line + 4026 6303 3399 6303 +Text Label 3399 6303 0 70 ~ +FPGA_CFG_CS_N +Wire Wire Line + 5676 6633 5126 6633 +Text Label 5676 6633 0 70 ~ +FPGA_CFG_MISO +Wire Wire Line + 4026 5093 3278 5093 +Text Label 3278 5093 0 70 ~ +ARM_FPGA_CFG_CS_N +Wire Wire Line + 4026 5313 3278 5313 +Text Label 3278 5313 0 70 ~ +ARM_FPGA_CFG_MOSI +Wire Wire Line + 5676 5423 5126 5423 +Text Label 5676 5423 0 70 ~ +ARM_FPGA_CFG_MISO +Wire Wire Line + 4026 5203 3278 5203 +Text Label 3278 5203 0 70 ~ +ARM_FPGA_CFG_SCLK +Text Label 3696 4961 1 70 ~ +SPI_A_TRISTATE +Text Label 3366 6853 0 70 ~ +SPI_B_TRISTATE +Text Label 473 5973 0 70 ~ +FPGA_CFG_CTRL_FPGA_DIS +Wire Wire Line + 6930 9350 6710 9350 +Text Notes 5852 9603 0 54 ~ 12 +GND +Text Notes 5852 9163 0 54 ~ 12 +VCC +Text Notes 6336 9526 0 54 ~ 12 +FO +Text Notes 6325 9130 0 54 ~ 12 +OE +Text Notes 2079 5632 0 60 ~ 12 +1 +Text Notes 2409 5632 0 60 ~ 12 +2 +Text Notes 2079 5742 0 60 ~ 12 +3 +Text Notes 2409 5742 0 60 ~ 12 +4 +Text Notes 2079 5852 0 60 ~ 12 +5 +Text Notes 2409 5852 0 60 ~ 12 +6 +Wire Wire Line + 3696 4290 3696 5643 +Wire Wire Line + 3256 6853 3256 7073 +Wire Wire Line + 4026 6853 3256 6853 +Wire Wire Line + 3256 5753 3256 6853 +Wire Wire Line + 2596 5753 3256 5753 +Wire Wire Line + 1716 5973 473 5973 +Wire Wire Line + 1716 5753 1716 5973 +Wire Wire Line + 1936 5753 1716 5753 +Wire Wire Line + 1804 6413 462 6413 +Wire Wire Line + 1804 5863 1804 6413 +Wire Wire Line + 1936 5863 1804 5863 +Wire Wire Line + 2981 5863 2596 5863 +Wire Wire Line + 2981 3762 2981 5863 +Wire Wire Line + 3696 3762 2981 3762 +Text Label 462 6413 0 70 ~ +FPGA_PROM_W_N +Wire Wire Line + 3696 5643 2596 5643 +Wire Wire Line + 4026 5643 3696 5643 +Wire Wire Line + 473 5643 1936 5643 +Text Label 473 5643 0 70 ~ +FPGA_CFG_CTRL_ARM_ENA +Connection ~ 3696 3762 +$Comp +L N25Q128A13ES IC235 +U 1 1 58023F42 +F 1 "N25Q128A13ESE*" H 8910 6512 60 0000 L BNN +F 2 "" H 8910 6512 60 0000 C CNN +F 3 "" H 8910 6512 60 0000 C CNN + 1 9240 6105 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC236 +U 1 1 58023F41 + 1 7150 9350 + -1 0 0 1 +$EndComp +$Comp +L 74*244DW_1 IC237 +U 1 1 58023F40 +F 1 "MC74AC244DW*" H 4235 4730 60 0000 L BNN +F 2 "" H 4235 4730 60 0000 C CNN +F 3 "" H 4235 4730 60 0000 C CNN + 1 4576 5313 + 1 0 0 -1 +$EndComp +$Comp +L 74*244DW_2 IC238 +U 1 1 58023F3F +F 1 "MC74AC244DW*" H 4246 5929 60 0000 L BNN +F 2 "" H 4246 5929 60 0000 C CNN +F 3 "" H 4246 5929 60 0000 C CNN + 1 4576 6523 + 1 0 0 -1 +$EndComp +$Comp +L 74*244DW_3 IC239 +U 1 1 58023F3E +F 1 "MC74AC244DW*" H 2046 4521 60 0000 L BNN +F 2 "" H 2046 4521 60 0000 C CNN +F 3 "" H 2046 4521 60 0000 C CNN + 1 1826 4543 + 1 0 0 -1 +$EndComp +$Comp +L ASF* Q5 +U 1 1 58023F3D +F 0 "Q5" H 5797 8877 60 0000 L BNN +F 1 "ASFL1-50.000MHZ-EK-T" H 5588 9713 60 0000 L BNN +F 2 "" H 5588 9713 60 0000 C CNN +F 3 "" H 5588 9713 60 0000 C CNN + 1 6160 9350 + 1 0 0 -1 +$EndComp +$Comp +L M03X2NO_SILK JP7 +U 1 1 58023F3C +F 0 "JP7" H 2035 5412 60 0000 L BNN + 1 2266 5753 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC242 +U 1 1 58023F3B + 1 8360 5390 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC243 +U 1 1 58023F3A + 1 7370 6490 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC0402 IC244 +U 1 1 58023F39 + 1 4840 9460 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC245 +U 1 1 58023F38 + 1 6160 8690 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 C112 +U 1 1 58023F37 +F 0 "C112" H 10626 6176.5 60 0000 L BNN +F 1 "" H 10516 6061 60 0000 L BNN +F 2 "" H 10516 6061 60 0000 C CNN +F 3 "" H 10516 6061 60 0000 C CNN + 1 11000 6380 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C110 +U 1 1 58023F36 +F 0 "C110" H 1452 4559.5 60 0000 L BNN +F 1 "" H 1452 4334 60 0000 L BNN +F 2 "" H 1452 4334 60 0000 C CNN +F 3 "" H 1452 4334 60 0000 C CNN + 1 1386 4543 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC248 +U 1 1 58023F35 + 1 3696 4070 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC249 +U 1 1 58023F34 + 1 3256 7293 + 0 1 1 0 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_16-cache.lib b/rev03-KiCad/rev02_16-cache.lib new file mode 100644 index 0000000..8e16109 --- /dev/null +++ b/rev03-KiCad/rev02_16-cache.lib @@ -0,0 +1,157 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_4 +# +DEF XC7A200TFBG484_4 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 3080 -440 3080 +P 2 0 1 10 0 -3190 0 3080 +P 2 0 1 10 -440 -3190 0 -3190 +X VCCO_15 G19 220 2970 220 L 70 70 0 1 P +X VCCO_15 H16 220 2860 220 L 70 70 0 1 P +X VCCO_15 J13 220 2750 220 L 70 70 0 1 P +X VCCO_15 K20 220 2640 220 L 70 70 0 1 P +X VCCO_15 L17 220 2530 220 L 70 70 0 1 P +X VCCO_15 N21 220 2420 220 L 70 70 0 1 P +X IO_0_15 J16 220 2310 220 L 70 70 0 1 P +X IO_L1P_T0_AD0P_15 H13 220 2200 220 L 70 70 0 1 P +X IO_L1N_T0_AD0N_15 G13 220 2090 220 L 70 70 0 1 P +X IO_L2P_T0_AD8P_15 G15 220 1980 220 L 70 70 0 1 P +X IO_L2N_T0_AD8N_15 G16 220 1870 220 L 70 70 0 1 P +X IO_L3P_T0_DQS_AD1P_15 J14 220 1760 220 L 70 70 0 1 P +X IO_L3N_T0_DQS_AD1N_15 H14 220 1650 220 L 70 70 0 1 P +X IO_L4P_T0_15 G17 220 1540 220 L 70 70 0 1 P +X IO_L4N_T0_15 G18 220 1430 220 L 70 70 0 1 P +X IO_L5P_T0_AD9P_15 J15 220 1320 220 L 70 70 0 1 P +X IO_L5N_T0_AD9N_15 H15 220 1210 220 L 70 70 0 1 P +X IO_L6P_T0_15 H17 220 1100 220 L 70 70 0 1 P +X IO_L6N_T0_VREF_15 H18 220 990 220 L 70 70 0 1 P +X IO_L7P_T1_AD2P_15 J22 220 880 220 L 70 70 0 1 P +X IO_L7N_T1_AD2N_15 H22 220 770 220 L 70 70 0 1 P +X IO_L8P_T1_AD10P_15 H20 220 660 220 L 70 70 0 1 P +X IO_L8N_T1_AD10N_15 G20 220 550 220 L 70 70 0 1 P +X IO_L9P_T1_DQS_AD3P_15 K21 220 440 220 L 70 70 0 1 P +X IO_L9N_T1_DQS_AD3N_15 K22 220 330 220 L 70 70 0 1 P +X IO_L10P_T1_AD11P_15 M21 220 220 220 L 70 70 0 1 P +X IO_L10N_T1_AD11N_15 L21 220 110 220 L 70 70 0 1 P +X IO_L11P_T1_SRCC_15 J20 220 0 220 L 70 70 0 1 P +X IO_L11N_T1_SRCC_15 J21 220 -110 220 L 70 70 0 1 P +X IO_L12P_T1_MRCC_15 J19 220 -220 220 L 70 70 0 1 P +X IO_L12N_T1_MRCC_15 H19 220 -330 220 L 70 70 0 1 P +X IO_L13P_T2_MRCC_15 K18 220 -440 220 L 70 70 0 1 P +X IO_L13N_T2_MRCC_15 K19 220 -550 220 L 70 70 0 1 P +X IO_L14P_T2_SRCC_15 L19 220 -660 220 L 70 70 0 1 P +X IO_L14N_T2_SRCC_15 L20 220 -770 220 L 70 70 0 1 P +X IO_L15P_T2_DQS_15 N22 220 -880 220 L 70 70 0 1 P +X IO_L15N_T2_DQS_ADV_B_15 M22 220 -990 220 L 70 70 0 1 P +X IO_L16P_T2_A28_15 M18 220 -1100 220 L 70 70 0 1 P +X IO_L16N_T2_A27_15 L18 220 -1210 220 L 70 70 0 1 P +X IO_L17P_T2_A26_15 N18 220 -1320 220 L 70 70 0 1 P +X IO_L17N_T2_A25_15 N19 220 -1430 220 L 70 70 0 1 P +X IO_L18P_T2_A24_15 N20 220 -1540 220 L 70 70 0 1 P +X IO_L18N_T2_A23_15 M20 220 -1650 220 L 70 70 0 1 P +X IO_L19P_T3_A22_15 K13 220 -1760 220 L 70 70 0 1 P +X IO_L19N_T3_A21_VREF_15 K14 220 -1870 220 L 70 70 0 1 P +X IO_L20P_T3_A20_15 M13 220 -1980 220 L 70 70 0 1 P +X IO_L20N_T3_A19_15 L13 220 -2090 220 L 70 70 0 1 P +X IO_L21P_T3_DQS_15 K17 220 -2200 220 L 70 70 0 1 P +X IO_L21N_T3_DQS_A18_15 J17 220 -2310 220 L 70 70 0 1 P +X IO_L22P_T3_A17_15 L14 220 -2420 220 L 70 70 0 1 P +X IO_L22N_T3_A16_15 L15 220 -2530 220 L 70 70 0 1 P +X IO_L23P_T3_FOE_B_15 L16 220 -2640 220 L 70 70 0 1 P +X IO_L23N_T3_FWE_B_15 K16 220 -2750 220 L 70 70 0 1 P +X IO_L24P_T3_RS1_15 M15 220 -2860 220 L 70 70 0 1 P +X IO_L24N_T3_RS0_15 M16 220 -2970 220 L 70 70 0 1 P +X IO_25_15 M17 220 -3080 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_7 +# +DEF XC7A200TFBG484_7 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 3080 -440 3080 +P 2 0 1 10 0 -3190 0 3080 +P 2 0 1 10 -440 -3190 0 -3190 +X VCCO_35 C1 220 2970 220 L 70 70 0 1 P +X VCCO_35 F2 220 2860 220 L 70 70 0 1 P +X VCCO_35 H6 220 2750 220 L 70 70 0 1 P +X VCCO_35 J3 220 2640 220 L 70 70 0 1 P +X VCCO_35 M4 220 2530 220 L 70 70 0 1 P +X VCCO_35 N1 220 2420 220 L 70 70 0 1 P +X IO_0_35 F4 220 2310 220 L 70 70 0 1 P +X IO_L1P_T0_AD4P_35 B1 220 2200 220 L 70 70 0 1 P +X IO_L1N_T0_AD4N_35 A1 220 2090 220 L 70 70 0 1 P +X IO_L2P_T0_AD12P_35 C2 220 1980 220 L 70 70 0 1 P +X IO_L2N_T0_AD12N_35 B2 220 1870 220 L 70 70 0 1 P +X IO_L3P_T0_DQS_AD5P_35 E1 220 1760 220 L 70 70 0 1 P +X IO_L3N_T0_DQS_AD5N_35 D1 220 1650 220 L 70 70 0 1 P +X IO_L4P_T0_35 E2 220 1540 220 L 70 70 0 1 P +X IO_L4N_T0_35 D2 220 1430 220 L 70 70 0 1 P +X IO_L5P_T0_AD13P_35 G1 220 1320 220 L 70 70 0 1 P +X IO_L5N_T0_AD13N_35 F1 220 1210 220 L 70 70 0 1 P +X IO_L6P_T0_35 F3 220 1100 220 L 70 70 0 1 P +X IO_L6N_T0_VREF_35 E3 220 990 220 L 70 70 0 1 P +X IO_L7P_T1_AD6P_35 K1 220 880 220 L 70 70 0 1 P +X IO_L7N_T1_AD6N_35 J1 220 770 220 L 70 70 0 1 P +X IO_L8P_T1_AD14P_35 H2 220 660 220 L 70 70 0 1 P +X IO_L8N_T1_AD14N_35 G2 220 550 220 L 70 70 0 1 P +X IO_L9P_T1_DQS_AD7P_35 K2 220 440 220 L 70 70 0 1 P +X IO_L9N_T1_DQS_AD7N_35 J2 220 330 220 L 70 70 0 1 P +X IO_L10P_T1_AD15P_35 J5 220 220 220 L 70 70 0 1 P +X IO_L10N_T1_AD15N_35 H5 220 110 220 L 70 70 0 1 P +X IO_L11P_T1_SRCC_35 H3 220 0 220 L 70 70 0 1 P +X IO_L11N_T1_SRCC_35 G3 220 -110 220 L 70 70 0 1 P +X IO_L12P_T1_MRCC_35 H4 220 -220 220 L 70 70 0 1 P +X IO_L12N_T1_MRCC_35 G4 220 -330 220 L 70 70 0 1 P +X IO_L13P_T2_MRCC_35 K4 220 -440 220 L 70 70 0 1 P +X IO_L13N_T2_MRCC_35 J4 220 -550 220 L 70 70 0 1 P +X IO_L14P_T2_SRCC_35 L3 220 -660 220 L 70 70 0 1 P +X IO_L14N_T2_SRCC_35 K3 220 -770 220 L 70 70 0 1 P +X IO_L15P_T2_DQS_35 M1 220 -880 220 L 70 70 0 1 P +X IO_L15N_T2_DQS_35 L1 220 -990 220 L 70 70 0 1 P +X IO_L16P_T2_35 M3 220 -1100 220 L 70 70 0 1 P +X IO_L16N_T2_35 M2 220 -1210 220 L 70 70 0 1 P +X IO_L17P_T2_35 K6 220 -1320 220 L 70 70 0 1 P +X IO_L17N_T2_35 J6 220 -1430 220 L 70 70 0 1 P +X IO_L18P_T2_35 L5 220 -1540 220 L 70 70 0 1 P +X IO_L18N_T2_35 L4 220 -1650 220 L 70 70 0 1 P +X IO_L19P_T3_35 N4 220 -1760 220 L 70 70 0 1 P +X IO_L19N_T3_VREF_35 N3 220 -1870 220 L 70 70 0 1 P +X IO_L20P_T3_35 R1 220 -1980 220 L 70 70 0 1 P +X IO_L20N_T3_35 P1 220 -2090 220 L 70 70 0 1 P +X IO_L21P_T3_DQS_35 P5 220 -2200 220 L 70 70 0 1 P +X IO_L21N_T3_DQS_35 P4 220 -2310 220 L 70 70 0 1 P +X IO_L22P_T3_35 P2 220 -2420 220 L 70 70 0 1 P +X IO_L22N_T3_35 N2 220 -2530 220 L 70 70 0 1 P +X IO_L23P_T3_35 M6 220 -2640 220 L 70 70 0 1 P +X IO_L23N_T3_35 M5 220 -2750 220 L 70 70 0 1 P +X IO_L24P_T3_35 P6 220 -2860 220 L 70 70 0 1 P +X IO_L24N_T3_35 N5 220 -2970 220 L 70 70 0 1 P +X IO_25_35 L6 220 -3080 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_16.sch b/rev03-KiCad/rev02_16.sch new file mode 100644 index 0000000..0006881 --- /dev/null +++ b/rev03-KiCad/rev02_16.sch @@ -0,0 +1,137 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 18 27 +Title "rev02_16" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 1650 3410 0 60 ~ 12 +*) Middle Right Bank +Text Notes 5280 3300 0 60 ~ 12 +*) Upper Left Bank +Text Notes 2640 4180 0 60 ~ 12 +*) Completely unused banks\nstill must be powered +Text Notes 6490 4070 0 60 ~ 12 +*) Completely unused banks\nstill must be powered +Text Notes 9460 10153 0 84 ~ 12 +FPGA unused banks +$Comp +L VCCO_3V3 #PWR?58023F33 +U 1 1 58023F33 +P 2530 3630 +F 0 "VCCO_3V3_31" H 2530 3630 20 0000 C CNN +F 1 "+VCCO_3V3" H 2530 3560 30 0000 C CNN +F 2 "" H 2530 3630 70 0000 C CNN +F 3 "" H 2530 3630 70 0000 C CNN + 1 2530 3630 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F32 +U 1 1 58023F32 +P 6380 3520 +F 0 "VCCO_3V3_32" H 6380 3520 20 0000 C CNN +F 1 "+VCCO_3V3" H 6380 3450 30 0000 C CNN +F 2 "" H 6380 3520 70 0000 C CNN +F 3 "" H 6380 3520 70 0000 C CNN + 1 6380 3520 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2530 3850 2310 3850 +Wire Wire Line + 2530 3850 2530 3960 +Wire Wire Line + 2530 3960 2530 4070 +Wire Wire Line + 2530 4070 2530 4180 +Wire Wire Line + 2530 4180 2310 4180 +Wire Wire Line + 2530 4070 2310 4070 +Wire Wire Line + 2530 3960 2310 3960 +Wire Wire Line + 2530 3630 2530 3850 +Wire Wire Line + 2530 4400 2310 4400 +Wire Wire Line + 2530 4290 2530 4400 +Wire Wire Line + 2530 4180 2530 4290 +Wire Wire Line + 2530 4290 2310 4290 +Wire Wire Line + 6380 3740 6160 3740 +Wire Wire Line + 6380 3740 6380 3850 +Wire Wire Line + 6380 3850 6380 3960 +Wire Wire Line + 6380 3960 6380 4070 +Wire Wire Line + 6380 4070 6160 4070 +Wire Wire Line + 6380 3960 6160 3960 +Wire Wire Line + 6380 3850 6160 3850 +Wire Wire Line + 6380 3520 6380 3740 +Wire Wire Line + 6380 4290 6160 4290 +Wire Wire Line + 6380 4180 6380 4290 +Wire Wire Line + 6380 4070 6380 4180 +Wire Wire Line + 6380 4180 6160 4180 +$Comp +L XC7A200TFBG484_4 IC250 +U 1 1 58023F31 + 1 2090 6820 + 1 0 0 -1 +$EndComp +$Comp +L XC7A200TFBG484_7 IC251 +U 1 1 58023F30 + 1 5940 6710 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_17-cache.lib b/rev03-KiCad/rev02_17-cache.lib new file mode 100644 index 0000000..1d0160d --- /dev/null +++ b/rev03-KiCad/rev02_17-cache.lib @@ -0,0 +1,141 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_2 +# +DEF XC7A200TFBG484_2 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 2200 -440 2200 +P 2 0 1 10 0 -2310 0 2200 +P 2 0 1 10 -440 -2310 0 -2310 +X VCCO_13 V16 220 2090 220 L 70 70 0 1 P +X VCCO_13 W13 220 1980 220 L 70 70 0 1 P +X VCCO_13 Y10 220 1870 220 L 70 70 0 1 P +X VCCO_13 AA17 220 1760 220 L 70 70 0 1 P +X VCCO_13 AB14 220 1650 220 L 70 70 0 1 P +X IO_0_13 Y17 220 1540 220 L 70 70 0 1 P +X IO_L1P_T0_13 Y16 220 1430 220 L 70 70 0 1 P +X IO_L1N_T0_13 AA16 220 1320 220 L 70 70 0 1 P +X IO_L2P_T0_13 AB16 220 1210 220 L 70 70 0 1 P +X IO_L2N_T0_13 AB17 220 1100 220 L 70 70 0 1 P +X IO_L3P_T0_DQS_13 AA13 220 990 220 L 70 70 0 1 P +X IO_L3N_T0_DQS_13 AB13 220 880 220 L 70 70 0 1 P +X IO_L4P_T0_13 AA15 220 770 220 L 70 70 0 1 P +X IO_L4N_T0_13 AB15 220 660 220 L 70 70 0 1 P +X IO_L5P_T0_13 Y13 220 550 220 L 70 70 0 1 P +X IO_L5N_T0_13 AA14 220 440 220 L 70 70 0 1 P +X IO_L6P_T0_13 W14 220 330 220 L 70 70 0 1 P +X IO_L6N_T0_VREF_13 Y14 220 220 220 L 70 70 0 1 P +X IO_L7P_T1_13 AB11 220 110 220 L 70 70 0 1 P +X IO_L7N_T1_13 AB12 220 0 220 L 70 70 0 1 P +X IO_L8P_T1_13 AA9 220 -110 220 L 70 70 0 1 P +X IO_L8N_T1_13 AB10 220 -220 220 L 70 70 0 1 P +X IO_L9P_T1_DQS_13 AA10 220 -330 220 L 70 70 0 1 P +X IO_L9N_T1_DQS_13 AA11 220 -440 220 L 70 70 0 1 P +X IO_L10P_T1_13 V10 220 -550 220 L 70 70 0 1 P +X IO_L10N_T1_13 W10 220 -660 220 L 70 70 0 1 P +X IO_L11P_T1_SRCC_13 Y11 220 -770 220 L 70 70 0 1 P +X IO_L11N_T1_SRCC_13 Y12 220 -880 220 L 70 70 0 1 P +X IO_L12P_T1_MRCC_13 W11 220 -990 220 L 70 70 0 1 P +X IO_L12N_T1_MRCC_13 W12 220 -1100 220 L 70 70 0 1 P +X IO_L13P_T2_MRCC_13 V13 220 -1210 220 L 70 70 0 1 P +X IO_L13N_T2_MRCC_13 V14 220 -1320 220 L 70 70 0 1 P +X IO_L14P_T2_SRCC_13 U15 220 -1430 220 L 70 70 0 1 P +X IO_L14N_T2_SRCC_13 V15 220 -1540 220 L 70 70 0 1 P +X IO_L15P_T2_DQS_13 T14 220 -1650 220 L 70 70 0 1 P +X IO_L15N_T2_DQS_13 T15 220 -1760 220 L 70 70 0 1 P +X IO_L16P_T2_13 W15 220 -1870 220 L 70 70 0 1 P +X IO_L16N_T2_13 W16 220 -1980 220 L 70 70 0 1 P +X IO_L17P_T2_13 T16 220 -2090 220 L 70 70 0 1 P +X IO_L17N_T2_13 U16 220 -2200 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_6 +# +DEF XC7A200TFBG484_6 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 3080 -440 3080 +P 2 0 1 10 0 -3190 0 3080 +P 2 0 1 10 -440 -3190 0 -3190 +X VCCO_34 R5 220 2970 220 L 70 70 0 1 P +X VCCO_34 T2 220 2860 220 L 70 70 0 1 P +X VCCO_34 V6 220 2750 220 L 70 70 0 1 P +X VCCO_34 W3 220 2640 220 L 70 70 0 1 P +X VCCO_34 AA7 220 2530 220 L 70 70 0 1 P +X VCCO_34 AB4 220 2420 220 L 70 70 0 1 P +X IO_0_34 T3 220 2310 220 L 70 70 0 1 P +X IO_L1P_T0_34 T1 220 2200 220 L 70 70 0 1 P +X IO_L1N_T0_34 U1 220 2090 220 L 70 70 0 1 P +X IO_L2P_T0_34 U2 220 1980 220 L 70 70 0 1 P +X IO_L2N_T0_34 V2 220 1870 220 L 70 70 0 1 P +X IO_L3P_T0_DQS_34 R3 220 1760 220 L 70 70 0 1 P +X IO_L3N_T0_DQS_34 R2 220 1650 220 L 70 70 0 1 P +X IO_L4P_T0_34 W2 220 1540 220 L 70 70 0 1 P +X IO_L4N_T0_34 Y2 220 1430 220 L 70 70 0 1 P +X IO_L5P_T0_34 W1 220 1320 220 L 70 70 0 1 P +X IO_L5N_T0_34 Y1 220 1210 220 L 70 70 0 1 P +X IO_L6P_T0_34 U3 220 1100 220 L 70 70 0 1 P +X IO_L6N_T0_VREF_34 V3 220 990 220 L 70 70 0 1 P +X IO_L7P_T1_34 AA1 220 880 220 L 70 70 0 1 P +X IO_L7N_T1_34 AB1 220 770 220 L 70 70 0 1 P +X IO_L8P_T1_34 AB3 220 660 220 L 70 70 0 1 P +X IO_L8N_T1_34 AB2 220 550 220 L 70 70 0 1 P +X IO_L9P_T1_DQS_34 Y3 220 440 220 L 70 70 0 1 P +X IO_L9N_T1_DQS_34 AA3 220 330 220 L 70 70 0 1 P +X IO_L10P_T1_34 AA5 220 220 220 L 70 70 0 1 P +X IO_L10N_T1_34 AB5 220 110 220 L 70 70 0 1 P +X IO_L11P_T1_SRCC_34 Y4 220 0 220 L 70 70 0 1 P +X IO_L11N_T1_SRCC_34 AA4 220 -110 220 L 70 70 0 1 P +X IO_L12P_T1_MRCC_34 V4 220 -220 220 L 70 70 0 1 P +X IO_L12N_T1_MRCC_34 W4 220 -330 220 L 70 70 0 1 P +X IO_L13P_T2_MRCC_34 R4 220 -440 220 L 70 70 0 1 P +X IO_L13N_T2_MRCC_34 T4 220 -550 220 L 70 70 0 1 P +X IO_L14P_T2_SRCC_34 T5 220 -660 220 L 70 70 0 1 P +X IO_L14N_T2_SRCC_34 U5 220 -770 220 L 70 70 0 1 P +X IO_L15P_T2_DQS_34 W6 220 -880 220 L 70 70 0 1 P +X IO_L15N_T2_DQS_34 W5 220 -990 220 L 70 70 0 1 P +X IO_L16P_T2_34 U6 220 -1100 220 L 70 70 0 1 P +X IO_L16N_T2_34 V5 220 -1210 220 L 70 70 0 1 P +X IO_L17P_T2_34 R6 220 -1320 220 L 70 70 0 1 P +X IO_L17N_T2_34 T6 220 -1430 220 L 70 70 0 1 P +X IO_L18P_T2_34 Y6 220 -1540 220 L 70 70 0 1 P +X IO_L18N_T2_34 AA6 220 -1650 220 L 70 70 0 1 P +X IO_L19P_T3_34 V7 220 -1760 220 L 70 70 0 1 P +X IO_L19N_T3_VREF_34 W7 220 -1870 220 L 70 70 0 1 P +X IO_L20P_T3_34 AB7 220 -1980 220 L 70 70 0 1 P +X IO_L20N_T3_34 AB6 220 -2090 220 L 70 70 0 1 P +X IO_L21P_T3_DQS_34 V9 220 -2200 220 L 70 70 0 1 P +X IO_L21N_T3_DQS_34 V8 220 -2310 220 L 70 70 0 1 P +X IO_L22P_T3_34 AA8 220 -2420 220 L 70 70 0 1 P +X IO_L22N_T3_34 AB8 220 -2530 220 L 70 70 0 1 P +X IO_L23P_T3_34 Y8 220 -2640 220 L 70 70 0 1 P +X IO_L23N_T3_34 Y7 220 -2750 220 L 70 70 0 1 P +X IO_L24P_T3_34 W9 220 -2860 220 L 70 70 0 1 P +X IO_L24N_T3_34 Y9 220 -2970 220 L 70 70 0 1 P +X IO_25_34 U7 220 -3080 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_17.sch b/rev03-KiCad/rev02_17.sch new file mode 100644 index 0000000..4059b8f --- /dev/null +++ b/rev03-KiCad/rev02_17.sch @@ -0,0 +1,363 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 19 27 +Title "rev02_17" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 6655 3850 0 60 ~ 12 +*) Bottom Bank +Text Notes 1100 3410 0 60 ~ 12 +*) Lower Left Bank +Text Notes 9328 4554 0 60 ~ 12 +FMC_A[...] signals can be swapped +Text Notes 8954 7535 0 60 ~ 12 +<-- FMC_CLK signal _MUST_ go\ninto either W11 or V13 (i.e. into\none of the two positive (master)\nsides of the two available\nMRCC differential pairs) +Text Notes 3586 4576 0 60 ~ 12 +FMC_D[...] signals can be swapped +Text Notes 3190 8470 0 60 ~ 12 +<-- FMC_* control signals\n can be swapped +Text Notes 9438 10153 0 84 ~ 12 +FPGA FMC interface +$Comp +L VCCO_3V3 #PWR?58023F2F +U 1 1 58023F2F +P 2200 3740 +F 0 "VCCO_3V3_33" H 2200 3740 20 0000 C CNN +F 1 "+VCCO_3V3" H 2200 3670 30 0000 C CNN +F 2 "" H 2200 3740 70 0000 C CNN +F 3 "" H 2200 3740 70 0000 C CNN + 1 2200 3740 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023F2E +U 1 1 58023F2E +P 7700 4070 +F 0 "VCCO_3V3_34" H 7700 4070 20 0000 C CNN +F 1 "+VCCO_3V3" H 7700 4000 30 0000 C CNN +F 2 "" H 7700 4070 70 0000 C CNN +F 3 "" H 7700 4070 70 0000 C CNN + 1 7700 4070 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2200 4510 1980 4510 +Wire Wire Line + 2200 4400 2200 4510 +Wire Wire Line + 2200 4290 2200 4400 +Wire Wire Line + 2200 4180 2200 4290 +Wire Wire Line + 2200 4070 2200 4180 +Wire Wire Line + 2200 3960 2200 4070 +Wire Wire Line + 2200 3960 1980 3960 +Wire Wire Line + 2200 4070 1980 4070 +Wire Wire Line + 2200 4180 1980 4180 +Wire Wire Line + 2200 4290 1980 4290 +Wire Wire Line + 2200 4400 1980 4400 +Wire Wire Line + 2200 3740 2200 3960 +Wire Wire Line + 7700 4400 7425 4400 +Wire Wire Line + 7700 4070 7700 4400 +Wire Wire Line + 7700 4510 7425 4510 +Wire Wire Line + 7700 4400 7700 4510 +Wire Wire Line + 7700 4620 7425 4620 +Wire Wire Line + 7700 4510 7700 4620 +Wire Wire Line + 7700 4730 7425 4730 +Wire Wire Line + 7700 4620 7700 4730 +Wire Wire Line + 7700 4840 7425 4840 +Wire Wire Line + 7700 4730 7700 4840 +Wire Wire Line + 8679 7480 7425 7480 +Text Label 7920 7480 0 70 ~ +FMC_CLK +Wire Wire Line + 3245 4620 1980 4620 +Wire Wire Line + 3245 4730 1980 4730 +Wire Wire Line + 3245 4840 1980 4840 +Text Label 2442 4840 0 70 ~ +FMC_D2 +Wire Wire Line + 3245 4950 1980 4950 +Text Label 2442 4950 0 70 ~ +FMC_D3 +Wire Wire Line + 3245 5060 1980 5060 +Text Label 7920 6380 0 70 ~ +FMC_D4 +Text Label 7920 6930 0 70 ~ +FMC_D5 +Text Label 7920 7260 0 70 ~ +FMC_D6 +Wire Wire Line + 3245 5390 1980 5390 +Text Label 7920 7370 0 70 ~ +FMC_D7 +Wire Wire Line + 3245 5610 1980 5610 +Wire Wire Line + 3245 5720 1980 5720 +Wire Wire Line + 3245 5830 1980 5830 +Wire Wire Line + 3245 5940 1980 5940 +Wire Wire Line + 3245 6050 1980 6050 +Text Label 2442 6050 0 70 ~ +FMC_D13 +Wire Wire Line + 3245 6160 1980 6160 +Text Label 2442 6160 0 70 ~ +FMC_D14 +Wire Wire Line + 3245 6270 1980 6270 +Text Label 2442 6380 0 70 ~ +FMC_D15 +Wire Wire Line + 3245 6380 1980 6380 +Text Label 2442 6270 0 70 ~ +FMC_D16 +Wire Wire Line + 3245 6490 1980 6490 +Text Label 2442 6490 0 70 ~ +FMC_D17 +Wire Wire Line + 3245 6600 1980 6600 +Text Label 2442 6600 0 70 ~ +FMC_D18 +Wire Wire Line + 3245 6710 1980 6710 +Text Label 2442 6710 0 70 ~ +FMC_D19 +Wire Wire Line + 3245 6820 1980 6820 +Text Label 2442 6820 0 70 ~ +FMC_D20 +Wire Wire Line + 3245 6930 1980 6930 +Text Label 2442 6930 0 70 ~ +FMC_D21 +Wire Wire Line + 3245 7040 1980 7040 +Text Label 2442 7040 0 70 ~ +FMC_D22 +Wire Wire Line + 3245 7150 1980 7150 +Text Label 2442 7150 0 70 ~ +FMC_D23 +Wire Wire Line + 3245 7370 1980 7370 +Text Label 2442 7370 0 70 ~ +FMC_D25 +Text Label 2442 8140 0 70 ~ +FMC_NE1 +Wire Wire Line + 3256 8470 1980 8470 +Text Label 2442 8470 0 70 ~ +FMC_NWAIT +Wire Wire Line + 3256 8580 1980 8580 +Text Label 2442 8580 0 70 ~ +FMC_NWE +Wire Wire Line + 8690 4950 7425 4950 +Text Label 7920 4950 0 70 ~ +FMC_A0 +Wire Wire Line + 8690 5060 7425 5060 +Text Label 7920 5280 0 70 ~ +FMC_A1 +Wire Wire Line + 8690 5170 7425 5170 +Text Label 7920 5170 0 70 ~ +FMC_A2 +Wire Wire Line + 8690 5280 7425 5280 +Text Label 7920 5060 0 70 ~ +FMC_A3 +Wire Wire Line + 8690 5390 7425 5390 +Text Label 7920 5390 0 70 ~ +FMC_A4 +Wire Wire Line + 8690 5500 7425 5500 +Text Label 7920 5500 0 70 ~ +FMC_A5 +Wire Wire Line + 8690 5610 7425 5610 +Text Label 7920 5610 0 70 ~ +FMC_A6 +Wire Wire Line + 8690 5720 7425 5720 +Text Label 7920 5720 0 70 ~ +FMC_A7 +Wire Wire Line + 8690 5830 7425 5830 +Text Label 7920 5830 0 70 ~ +FMC_A8 +Wire Wire Line + 8690 5940 7425 5940 +Text Label 7920 5940 0 70 ~ +FMC_A9 +Wire Wire Line + 8690 6050 7425 6050 +Text Label 7920 6050 0 70 ~ +FMC_A10 +Wire Wire Line + 8690 6160 7425 6160 +Text Label 7920 6270 0 70 ~ +FMC_A11 +Wire Wire Line + 8690 6270 7425 6270 +Text Label 7920 6710 0 70 ~ +FMC_A12 +Wire Wire Line + 8690 6380 7425 6380 +Text Label 2442 5060 0 70 ~ +FMC_A13 +Wire Wire Line + 8690 6490 7425 6490 +Text Label 7920 6490 0 70 ~ +FMC_A14 +Wire Wire Line + 8690 6600 7425 6600 +Text Label 2442 9460 0 70 ~ +FMC_A15 +Wire Wire Line + 8690 6710 7425 6710 +Text Label 7920 6600 0 70 ~ +FMC_A16 +Text Label 2442 9350 0 70 ~ +FMC_A17 +Wire Wire Line + 8690 6930 7425 6930 +Text Label 2442 9680 0 70 ~ +FMC_A18 +Wire Wire Line + 8690 7150 7425 7150 +Wire Wire Line + 8690 7260 7425 7260 +Wire Wire Line + 8690 7370 7425 7370 +Wire Wire Line + 8690 7590 7425 7590 +Wire Wire Line + 8690 7700 7425 7700 +Wire Wire Line + 8690 7810 7425 7810 +Wire Bus Line + 9977 4400 9317 4400 +Text Label 9317 4400 0 70 ~ +FMC_A[0..25] +Wire Bus Line + 4246 4400 3586 4400 +Text Label 3586 4400 0 70 ~ +FMC_D[0..31] +Wire Wire Line + 3267 9460 1980 9460 +Wire Wire Line + 3267 9020 1980 9020 +Text Label 2442 8910 0 70 ~ +FMC_D0 +Wire Wire Line + 3267 8910 1980 8910 +Text Label 2442 9020 0 70 ~ +FMC_D1 +Wire Wire Line + 3267 9680 1980 9680 +Wire Wire Line + 3267 9350 1980 9350 +Text Label 7920 7150 0 70 ~ +FMC_D24 +Text Label 7920 7590 0 70 ~ +FMC_D26 +Text Label 7920 6160 0 70 ~ +FMC_D27 +Text Label 7920 8470 0 70 ~ +FMC_NOE +Wire Wire Line + 8701 8470 7425 8470 +Wire Wire Line + 3245 8140 1980 8140 +Text Label 2453 5390 0 70 ~ +MKM_FPGA_CS_N +Text Label 2453 5940 0 70 ~ +MKM_FPGA_SCK +Text Label 2453 5610 0 70 ~ +MKM_FPGA_MOSI +Text Label 2453 5720 0 70 ~ +MKM_FPGA_MISO +Text Label 2442 5830 0 70 ~ +FPGA_GPIO_LED_0 +Text Label 2453 4730 0 70 ~ +FPGA_GPIO_LED_1 +$Comp +L XC7A200TFBG484_2 IC252 +U 1 1 58023F2D + 1 7205 6490 + 1 0 0 -1 +$EndComp +$Comp +L XC7A200TFBG484_6 IC253 +U 1 1 58023F2C + 1 1760 6930 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_18-cache.lib b/rev03-KiCad/rev02_18-cache.lib new file mode 100644 index 0000000..7f988ab --- /dev/null +++ b/rev03-KiCad/rev02_18-cache.lib @@ -0,0 +1,136 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCC_5V0 +# +DEF VCC_5V0 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCC_5V0" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCC_5V0 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# BLM31PG330SN1_1206 +# +DEF BLM31PG330SN1_1206 IC 0 40 Y Y 1 F N +F0 "FB" -165 220 60 H V L BNN +F1 "BLM31PG330SN1_1206" -187 -99 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -110 55 110 165 0 1 10 f +X 1 1 -220 110 110 R 70 1 0 1 P +X 2 2 220 110 110 L 70 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC1210 +# +DEF C-EUC1210 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# EN6347QI +# +DEF EN6347QI IC 0 40 Y Y 1 F N +F0 "U" -396 1199 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +X NC 1 880 -330 220 L 70 70 0 1 P +X NC 2 880 -330 220 L 70 70 0 1 P +X NC 3 880 -330 220 L 70 70 0 1 P +X NC 4 880 -330 220 L 70 70 0 1 P +X NC 12 880 -330 220 L 70 70 0 1 P +X NC 22 880 -330 220 L 70 70 0 1 P +X NC 23 880 -330 220 L 70 70 0 1 P +X NC 24 880 -330 220 L 70 70 0 1 P +X NC 25 880 -330 220 L 70 70 0 1 P +X NC 34 880 -330 220 L 70 70 0 1 P +X NC 35 880 -330 220 L 70 70 0 1 P +X NC 36 880 -330 220 L 70 70 0 1 P +X NC 37 880 -330 220 L 70 70 0 1 P +X NC 38 880 -330 220 L 70 70 0 1 P +X PGND 14 220 -1210 220 U 1 70 0 1 W +X PGND 15 220 -1210 220 U 1 70 0 1 W +X PGND 16 220 -1210 220 U 1 70 0 1 W +X PGND 17 220 -1210 220 U 1 70 0 1 W +X PGND 18 220 -1210 220 U 1 70 0 1 W +X PGND PAD39 220 -1210 220 U 1 70 0 1 W +P 2 0 1 10 660 1100 -660 1100 +P 2 0 1 10 660 -990 660 1100 +P 2 0 1 10 -660 -990 660 -990 +P 2 0 1 10 -660 1100 -660 -990 +X PVIN 21 -880 770 220 R 70 70 0 1 W +X ENABLE 27 -880 330 220 R 70 70 0 1 P +X AVIN 33 -880 550 220 R 70 70 0 1 W +X AGND 32 -330 -1210 220 U 70 70 0 1 W +X PGND 13 220 -1210 220 U 1 70 0 1 W +X VOUT 7 880 770 220 L 70 70 0 1 W +X VFB 31 880 110 220 L 70 70 0 1 P +X LLM/SYNC 26 -880 -110 220 R 70 70 0 1 P +X SS 30 -880 -770 220 R 70 70 0 1 P +X POK 28 880 -770 220 L 70 70 0 1 O +X RLLM 29 -880 -330 220 R 70 70 0 1 P +X PVIN 20 -880 880 220 R 70 70 0 1 W +X PVIN 19 -880 990 220 R 70 70 0 1 W +X VOUT 6 880 880 220 L 70 70 0 1 W +X VOUT 5 880 990 220 L 70 70 0 1 W +X VOUT 10 880 440 220 L 70 70 0 1 W +X VOUT 9 880 550 220 L 70 70 0 1 W +X VOUT 8 880 660 220 L 70 70 0 1 W +X VOUT 11 880 330 220 L 70 70 0 1 W +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_18.sch b/rev03-KiCad/rev02_18.sch new file mode 100644 index 0000000..61e2c24 --- /dev/null +++ b/rev03-KiCad/rev02_18.sch @@ -0,0 +1,728 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 20 27 +Title "rev02_18" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 5170 3410 0 60 ~ 12 +*) FPGA Power Subsystem -- AUX and I/O +Text Notes 8250 4510 0 60 ~ 12 +*) VCCAUX = 0.75V x (1 + 205 / 147) = 1.796V\n*) VCCO = 0.75V x (1 + 205 / 59) = 3.356\n*) Minimal load current is 2 mA:\n1.8V / 470 Ohm = ~~4mA\n3.3V / 470 Ohm = ~~7mA\n*) Light-load mode is enabled +Text Notes 7370 8250 0 60 ~ 12 +This is the 3V3 rail that powers\nboth the FPGA and the ARM as well\nas various other components. +Text Notes 9295 10142 0 66 ~ 12 +FPGA voltage regulators +Text Notes 1276 4609 0 60 ~ 12 +C113 +Text Notes 1276 4829 0 60 ~ 12 +22~uF +Text Notes 1881 5885 0 60 ~ 12 +R53 +Text Label 1881 5995 0 70 ~ +62k +Text Notes 1859 4587 0 60 ~ 12 +R52 +Text Label 1848 4686 0 70 ~ +4.7k +Text Notes 4444 4499 0 60 ~ 12 +R56 +Text Label 4444 4598 0 70 ~ +205k +Text Notes 4840 5170 0 60 ~ 12 +R57 +Text Label 4829 5269 0 70 ~ +147k +Text Notes 6193 5016 0 60 ~ 12 +R60 +Text Label 6193 5115 0 70 ~ +470 +Text Notes 1276 8129 0 60 ~ 12 +C114 +Text Notes 1276 8349 0 60 ~ 12 +22~uF +Text Notes 1903 9383 0 60 ~ 12 +R55 +Text Label 1903 9493 0 70 ~ +62k +Text Notes 1826 8129 0 60 ~ 12 +R54 +Text Label 1815 8261 0 70 ~ +4.7k +Text Notes 4444 7997 0 60 ~ 12 +R58 +Text Label 4444 8085 0 70 ~ +205k +Text Notes 4477 8668 0 60 ~ 12 +R59 +Text Label 4477 8756 0 70 ~ +59k +Text Notes 6160 8459 0 60 ~ 12 +R61 +Text Label 6160 8558 0 70 ~ +470 +Text Notes 2376 5929 0 60 ~ 12 +C115 +Text Notes 2376 6149 0 60 ~ 12 +0.047~uF +Text Notes 2376 9449 0 60 ~ 12 +C116 +Text Notes 2376 9669 0 60 ~ 12 +0.047~uF +Text Notes 5126 7909 0 60 ~ 12 +C118 +Text Notes 5126 8129 0 60 ~ 12 +27pF +Text Notes 5126 4389 0 60 ~ 12 +C117 +Text Notes 5126 4609 0 60 ~ 12 +27pF +Text Notes 5566 4939 0 60 ~ 12 +C119 +Text Notes 5566 5159 0 60 ~ 12 +47uF +Text Notes 5566 8459 0 60 ~ 12 +C120 +Text Notes 5566 8679 0 60 ~ 12 +47uF +$Comp +L GND #PWR?58023F2B +U 1 1 58023F2B +P 3080 6270 +F 0 "GND_109" H 3080 6270 20 0000 C CNN +F 1 "+GND" H 3080 6200 30 0000 C CNN +F 2 "" H 3080 6270 70 0000 C CNN +F 3 "" H 3080 6270 70 0000 C CNN + 1 3080 6270 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F2A +U 1 1 58023F2A +P 3630 6270 +F 0 "GND_110" H 3630 6270 20 0000 C CNN +F 1 "+GND" H 3630 6200 30 0000 C CNN +F 2 "" H 3630 6270 70 0000 C CNN +F 3 "" H 3630 6270 70 0000 C CNN + 1 3630 6270 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F29 +U 1 1 58023F29 +P 2310 6270 +F 0 "GND_111" H 2310 6270 20 0000 C CNN +F 1 "+GND" H 2310 6200 30 0000 C CNN +F 2 "" H 2310 6270 70 0000 C CNN +F 3 "" H 2310 6270 70 0000 C CNN + 1 2310 6270 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F28 +U 1 1 58023F28 +P 1210 5060 +F 0 "GND_112" H 1210 5060 20 0000 C CNN +F 1 "+GND" H 1210 4990 30 0000 C CNN +F 2 "" H 1210 5060 70 0000 C CNN +F 3 "" H 1210 5060 70 0000 C CNN + 1 1210 5060 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F27 +U 1 1 58023F27 +P 1760 6270 +F 0 "GND_113" H 1760 6270 20 0000 C CNN +F 1 "+GND" H 1760 6200 30 0000 C CNN +F 2 "" H 1760 6270 70 0000 C CNN +F 3 "" H 1760 6270 70 0000 C CNN + 1 1760 6270 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F26 +U 1 1 58023F26 +P 4730 5500 +F 0 "GND_114" H 4730 5500 20 0000 C CNN +F 1 "+GND" H 4730 5430 30 0000 C CNN +F 2 "" H 4730 5500 70 0000 C CNN +F 3 "" H 4730 5500 70 0000 C CNN + 1 4730 5500 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F25 +U 1 1 58023F25 +P 5500 5500 +F 0 "GND_115" H 5500 5500 20 0000 C CNN +F 1 "+GND" H 5500 5430 30 0000 C CNN +F 2 "" H 5500 5500 70 0000 C CNN +F 3 "" H 5500 5500 70 0000 C CNN + 1 5500 5500 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F24 +U 1 1 58023F24 +P 6050 5500 +F 0 "GND_116" H 6050 5500 20 0000 C CNN +F 1 "+GND" H 6050 5430 30 0000 C CNN +F 2 "" H 6050 5500 70 0000 C CNN +F 3 "" H 6050 5500 70 0000 C CNN + 1 6050 5500 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F23 +U 1 1 58023F23 +P 3080 9790 +F 0 "GND_117" H 3080 9790 20 0000 C CNN +F 1 "+GND" H 3080 9720 30 0000 C CNN +F 2 "" H 3080 9790 70 0000 C CNN +F 3 "" H 3080 9790 70 0000 C CNN + 1 3080 9790 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F22 +U 1 1 58023F22 +P 3630 9790 +F 0 "GND_118" H 3630 9790 20 0000 C CNN +F 1 "+GND" H 3630 9720 30 0000 C CNN +F 2 "" H 3630 9790 70 0000 C CNN +F 3 "" H 3630 9790 70 0000 C CNN + 1 3630 9790 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F21 +U 1 1 58023F21 +P 2310 9790 +F 0 "GND_119" H 2310 9790 20 0000 C CNN +F 1 "+GND" H 2310 9720 30 0000 C CNN +F 2 "" H 2310 9790 70 0000 C CNN +F 3 "" H 2310 9790 70 0000 C CNN + 1 2310 9790 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F20 +U 1 1 58023F20 +P 1210 8580 +F 0 "GND_120" H 1210 8580 20 0000 C CNN +F 1 "+GND" H 1210 8510 30 0000 C CNN +F 2 "" H 1210 8580 70 0000 C CNN +F 3 "" H 1210 8580 70 0000 C CNN + 1 1210 8580 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F1F +U 1 1 58023F1F +P 1760 9790 +F 0 "GND_121" H 1760 9790 20 0000 C CNN +F 1 "+GND" H 1760 9720 30 0000 C CNN +F 2 "" H 1760 9790 70 0000 C CNN +F 3 "" H 1760 9790 70 0000 C CNN + 1 1760 9790 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F1E +U 1 1 58023F1E +P 4730 9020 +F 0 "GND_122" H 4730 9020 20 0000 C CNN +F 1 "+GND" H 4730 8950 30 0000 C CNN +F 2 "" H 4730 9020 70 0000 C CNN +F 3 "" H 4730 9020 70 0000 C CNN + 1 4730 9020 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F1D +U 1 1 58023F1D +P 5500 9020 +F 0 "GND_123" H 5500 9020 20 0000 C CNN +F 1 "+GND" H 5500 8950 30 0000 C CNN +F 2 "" H 5500 9020 70 0000 C CNN +F 3 "" H 5500 9020 70 0000 C CNN + 1 5500 9020 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F1C +U 1 1 58023F1C +P 6050 9020 +F 0 "GND_124" H 6050 9020 20 0000 C CNN +F 1 "+GND" H 6050 8950 30 0000 C CNN +F 2 "" H 6050 9020 70 0000 C CNN +F 3 "" H 6050 9020 70 0000 C CNN + 1 6050 9020 + 1 0 0 -1 +$EndComp +$Comp +L VCC_5V0 #PWR?58023F1B +U 1 1 58023F1B +P 1210 3960 +F 0 "VCC_5V0" H 1210 3960 20 0000 C CNN +F 1 "+VCC_5V0" H 1210 3890 30 0000 C CNN +F 2 "" H 1210 3960 70 0000 C CNN +F 3 "" H 1210 3960 70 0000 C CNN + 1 1210 3960 + 1 0 0 -1 +$EndComp +$Comp +L VCC_5V0 #PWR?58023F1A +U 1 1 58023F1A +P 1210 7480 +F 0 "VCC_5V0_2" H 1210 7480 20 0000 C CNN +F 1 "+VCC_5V0" H 1210 7410 30 0000 C CNN +F 2 "" H 1210 7480 70 0000 C CNN +F 3 "" H 1210 7480 70 0000 C CNN + 1 1210 7480 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3080 6160 3080 6270 +Wire Wire Line + 3630 6160 3630 6270 +Wire Wire Line + 2310 6160 2310 6270 +Wire Wire Line + 1210 4840 1210 5060 +Wire Wire Line + 1760 6160 1760 6270 +Wire Wire Line + 4730 5390 4730 5500 +Wire Wire Line + 5500 5170 5500 5500 +Wire Wire Line + 6050 5280 6050 5500 +Wire Wire Line + 3080 9680 3080 9790 +Wire Wire Line + 3630 9680 3630 9790 +Wire Wire Line + 2310 9680 2310 9790 +Wire Wire Line + 1210 8360 1210 8580 +Wire Wire Line + 1760 9680 1760 9790 +Wire Wire Line + 4730 8910 4730 9020 +Wire Wire Line + 5500 8690 5500 9020 +Wire Wire Line + 6050 8800 6050 9020 +Wire Wire Line + 7700 4180 6600 4180 +Text Label 6710 4180 0 70 ~ +FPGA_VCCAUX_1V8 +Wire Wire Line + 7700 7700 6600 7700 +Text Label 6710 7700 0 70 ~ +VCCO_3V3 +Wire Wire Line + 2310 5720 2310 5830 +Wire Wire Line + 2530 5720 2310 5720 +Wire Wire Line + 2530 4180 2310 4180 +Wire Wire Line + 2310 4180 1760 4180 +Wire Wire Line + 1760 4180 1210 4180 +Wire Wire Line + 1210 3960 1210 4180 +Wire Wire Line + 2530 4400 2310 4400 +Wire Wire Line + 2310 4180 2310 4400 +Wire Wire Line + 1210 4180 1210 4510 +Wire Wire Line + 1760 4180 1760 4400 +Connection ~ 2310 4180 +Connection ~ 1210 4180 +Connection ~ 1760 4180 +Wire Wire Line + 2530 7700 2310 7700 +Wire Wire Line + 2310 7700 1760 7700 +Wire Wire Line + 1760 7700 1210 7700 +Wire Wire Line + 1210 7480 1210 7700 +Wire Wire Line + 2530 7920 2310 7920 +Wire Wire Line + 2310 7700 2310 7920 +Wire Wire Line + 1210 7700 1210 8030 +Wire Wire Line + 1760 7700 1760 7920 +Connection ~ 2310 7700 +Connection ~ 1210 7700 +Connection ~ 1760 7700 +Wire Wire Line + 2530 4620 2090 4620 +Wire Wire Line + 2090 3465 2090 4620 +Text Label 2090 4114 1 70 ~ +PWR_ENA_VCCAUX +Wire Wire Line + 1760 5280 1760 5720 +Wire Wire Line + 2530 5280 1760 5280 +Wire Wire Line + 2530 5060 1760 5060 +Wire Wire Line + 1760 4840 1760 5060 +Wire Wire Line + 4730 4180 4290 4180 +Wire Wire Line + 4730 4180 4730 4290 +Wire Wire Line + 5060 4180 5060 4290 +Wire Wire Line + 5060 4180 4730 4180 +Wire Wire Line + 5500 4180 5500 4840 +Wire Wire Line + 5500 4180 5060 4180 +Wire Wire Line + 6050 4180 6050 4840 +Wire Wire Line + 6050 4180 5500 4180 +Wire Wire Line + 6160 4180 6050 4180 +Connection ~ 4730 4180 +Connection ~ 5060 4180 +Connection ~ 5500 4180 +Connection ~ 6050 4180 +Wire Wire Line + 4730 4730 4730 4840 +Wire Wire Line + 4730 4840 4290 4840 +Wire Wire Line + 5060 4620 5060 4840 +Wire Wire Line + 5060 4840 4730 4840 +Wire Wire Line + 4730 4840 4730 4950 +Connection ~ 4730 4840 +Wire Wire Line + 2310 9240 2310 9350 +Wire Wire Line + 2530 9240 2310 9240 +Wire Wire Line + 1760 8800 1760 9240 +Wire Wire Line + 2530 8800 1760 8800 +Wire Wire Line + 2530 8580 1760 8580 +Wire Wire Line + 1760 8360 1760 8580 +Wire Wire Line + 4411 7700 4290 7700 +Wire Wire Line + 4730 7700 4411 7700 +Wire Wire Line + 4730 7700 4730 7810 +Wire Wire Line + 5060 7700 5060 7810 +Wire Wire Line + 5060 7700 4730 7700 +Wire Wire Line + 5500 7700 5500 8360 +Wire Wire Line + 5500 7700 5060 7700 +Wire Wire Line + 6050 7700 6050 8360 +Wire Wire Line + 6050 7700 5500 7700 +Wire Wire Line + 6160 7700 6050 7700 +Connection ~ 4730 7700 +Connection ~ 5060 7700 +Connection ~ 5500 7700 +Connection ~ 6050 7700 +Wire Wire Line + 4730 8250 4730 8360 +Wire Wire Line + 4730 8360 4290 8360 +Wire Wire Line + 5060 8140 5060 8360 +Wire Wire Line + 5060 8360 4730 8360 +Wire Wire Line + 4730 8360 4730 8470 +Connection ~ 4730 8360 +Wire Wire Line + 2530 8140 2090 8140 +Wire Wire Line + 2090 7150 2090 8140 +Wire Wire Line + 2090 7150 1980 7150 +Text Label 1540 7150 0 70 ~ +PWR_ENA_VCCO +Wire Wire Line + 4400 5720 4290 5720 +Wire Wire Line + 4400 5720 4400 6050 +Text Label 4400 5720 3 70 ~ +POK_VCCAUX +Wire Wire Line + 4400 9240 4290 9240 +Wire Wire Line + 4400 9240 4400 9570 +Text Label 4400 9570 0 70 ~ +POK_VCCO +Text Notes 3399 3762 0 60 ~ 12 +EN6347QI +Wire Wire Line + 2530 4070 2530 3960 +Wire Wire Line + 2530 4180 2530 4070 +Wire Wire Line + 4290 4070 4290 3960 +Wire Wire Line + 4290 4180 4290 4070 +Wire Wire Line + 4290 4290 4290 4180 +Wire Wire Line + 4290 4400 4290 4290 +Wire Wire Line + 4290 4510 4290 4400 +Wire Wire Line + 4290 4620 4290 4510 +Text Notes 3399 7293 0 60 ~ 12 +EN6347QI +Wire Wire Line + 2310 7480 2530 7480 +Wire Wire Line + 2310 7590 2310 7480 +Wire Wire Line + 2310 7700 2310 7590 +Wire Wire Line + 2310 7590 2530 7590 +Wire Wire Line + 4411 7480 4290 7480 +Wire Wire Line + 4411 7590 4411 7480 +Wire Wire Line + 4411 7700 4411 7590 +Wire Wire Line + 4411 7590 4290 7590 +Wire Wire Line + 4411 7810 4290 7810 +Wire Wire Line + 4411 7700 4411 7810 +Wire Wire Line + 4411 7920 4290 7920 +Wire Wire Line + 4411 7810 4411 7920 +Wire Wire Line + 4411 8030 4290 8030 +Wire Wire Line + 4411 7920 4411 8030 +Wire Wire Line + 4411 8140 4290 8140 +Wire Wire Line + 4411 8030 4411 8140 +Wire Wire Line + 1540 7150 1980 7150 +Connection ~ 2310 7590 +Connection ~ 2530 4180 +Connection ~ 2530 4070 +Connection ~ 4290 4510 +Connection ~ 4290 4400 +Connection ~ 4290 4290 +Connection ~ 4290 4180 +Connection ~ 4290 4070 +Connection ~ 4411 8030 +Connection ~ 4411 7920 +Connection ~ 4411 7810 +Connection ~ 4411 7700 +Connection ~ 4411 7590 +$Comp +L C-EUC1210 IC254 +U 1 1 58023F19 + 1 1210 4620 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC255 +U 1 1 58023F18 + 1 1760 8140 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC256 +U 1 1 58023F17 + 1 4730 8030 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC257 +U 1 1 58023F16 + 1 4730 8690 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC258 +U 1 1 58023F15 + 1 6050 8580 + 0 -1 -1 0 +$EndComp +$Comp +L BLM31PG330SN1_1206 FB6 +U 1 1 58023F14 +F 0 "FB6" H 6215 8030 60 0000 L BNN +F 1 "BLM31PG330SN1" H 6193 7711 60 0000 L BNN +F 2 "" H 6193 7711 60 0000 C CNN +F 3 "" H 6193 7711 60 0000 C CNN + 1 6380 7810 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC260 +U 1 1 58023F13 + 1 2310 5940 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC261 +U 1 1 58023F12 + 1 2310 9460 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC262 +U 1 1 58023F11 + 1 5060 7920 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC263 +U 1 1 58023F10 + 1 5060 4400 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC264 +U 1 1 58023F0F + 1 5500 4950 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC265 +U 1 1 58023F0E + 1 1760 5940 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC1210 IC266 +U 1 1 58023F0D + 1 5500 8470 + 1 0 0 -1 +$EndComp +$Comp +L EN6347QI U14 +U 1 1 58023F0C +F 0 "U14" H 3014 6149 60 0000 L BNN + 1 3410 4950 + 1 0 0 -1 +$EndComp +$Comp +L EN6347QI U15 +U 1 1 58023F0B +F 0 "U15" H 3014 9669 60 0000 L BNN + 1 3410 8470 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC269 +U 1 1 58023F0A + 1 1760 4620 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC270 +U 1 1 58023F09 + 1 4730 4510 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC271 +U 1 1 58023F08 + 1 4730 5170 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC272 +U 1 1 58023F07 + 1 6050 5060 + 0 -1 -1 0 +$EndComp +$Comp +L BLM31PG330SN1_1206 FB5 +U 1 1 58023F06 +F 0 "FB5" H 6215 4510 60 0000 L BNN +F 1 "BLM31PG330SN1" H 6204 4191 60 0000 L BNN +F 2 "" H 6204 4191 60 0000 C CNN +F 3 "" H 6204 4191 60 0000 C CNN + 1 6380 4290 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC274 +U 1 1 58023F05 + 1 1210 8140 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC275 +U 1 1 58023F04 + 1 1760 9460 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_19-cache.lib b/rev03-KiCad/rev02_19-cache.lib new file mode 100644 index 0000000..135fae9 --- /dev/null +++ b/rev03-KiCad/rev02_19-cache.lib @@ -0,0 +1,192 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# LEDCHIP-LED0603 +# +DEF LEDCHIP-LED0603 IC 0 40 Y Y 1 F N +F0 "LED" 627 -44 60 H V L BNN +F1 "LEDCHIP-LED0603" 968 -44 60 V V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -110 55 0 +P 2 0 1 10 -55 0 0 -110 +P 2 0 1 10 0 -110 55 -110 +P 2 0 1 10 -55 -110 0 -110 +P 2 0 1 10 0 0 55 0 +P 2 0 1 10 -55 0 0 0 +P 2 0 1 10 0 -110 0 0 +P 2 0 1 10 -154 -88 -88 -33 +P 2 0 1 10 -143 -143 -88 -77 +P 4 0 1 10 -154 -88 -132 -55 -110 -77 -154 -88 F +P 4 0 1 10 -143 -143 -132 -99 -110 -121 -143 -143 F +X C 2 0 -220 110 U 1 1 0 1 P +X A 1 0 110 110 D 1 1 0 1 P +ENDDRAW +ENDDEF +# +# MA08-2 +# +DEF MA08-2 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -165 -440 165 -440 +P 2 0 1 10 110 -110 55 -110 +P 2 0 1 10 110 -220 55 -220 +P 2 0 1 10 110 -330 55 -330 +P 2 0 1 10 -55 -110 -110 -110 +P 2 0 1 10 -55 -220 -110 -220 +P 2 0 1 10 -55 -330 -110 -330 +P 2 0 1 10 110 110 55 110 +P 2 0 1 10 110 0 55 0 +P 2 0 1 10 -55 110 -110 110 +P 2 0 1 10 -55 0 -110 0 +P 2 0 1 10 110 440 55 440 +P 2 0 1 10 110 330 55 330 +P 2 0 1 10 110 220 55 220 +P 2 0 1 10 -55 440 -110 440 +P 2 0 1 10 -55 330 -110 330 +P 2 0 1 10 -55 220 -110 220 +P 2 0 1 10 -165 -440 -165 550 +P 2 0 1 10 165 550 165 -440 +P 2 0 1 10 165 550 -165 550 +X 1 1 330 -330 220 L 70 1 0 1 P +X 3 3 330 -220 220 L 70 1 0 1 P +X 5 5 330 -110 220 L 70 1 0 1 P +X 2 2 -330 -330 220 R 70 1 0 1 P +X 4 4 -330 -220 220 R 70 1 0 1 P +X 6 6 -330 -110 220 R 70 1 0 1 P +X 7 7 330 0 220 L 70 1 0 1 P +X 9 9 330 110 220 L 70 1 0 1 P +X 8 8 -330 0 220 R 70 1 0 1 P +X 10 10 -330 110 220 R 70 1 0 1 P +X 11 11 330 220 220 L 70 1 0 1 P +X 13 13 330 330 220 L 70 1 0 1 P +X 15 15 330 440 220 L 70 1 0 1 P +X 12 12 -330 220 220 R 70 1 0 1 P +X 14 14 -330 330 220 R 70 1 0 1 P +X 16 16 -330 440 220 R 70 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "R" -99 -187 60 H V L BNN +F1 "R-EU_R0402" -99 99 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_5 +# +DEF XC7A200TFBG484_5 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 3080 -440 3080 +P 2 0 1 10 0 -3190 0 3080 +P 2 0 1 10 -440 -3190 0 -3190 +X VCCO_16 A17 220 2970 220 L 70 70 0 1 P +X VCCO_16 B14 220 2860 220 L 70 70 0 1 P +X VCCO_16 C21 220 2750 220 L 70 70 0 1 P +X VCCO_16 D18 220 2640 220 L 70 70 0 1 P +X VCCO_16 E15 220 2530 220 L 70 70 0 1 P +X VCCO_16 F22 220 2420 220 L 70 70 0 1 P +X IO_0_16 F15 220 2310 220 L 70 70 0 1 P +X IO_L1P_T0_16 F13 220 2200 220 L 70 70 0 1 P +X IO_L1N_T0_16 F14 220 2090 220 L 70 70 0 1 P +X IO_L2P_T0_16 F16 220 1980 220 L 70 70 0 1 P +X IO_L2N_T0_16 E17 220 1870 220 L 70 70 0 1 P +X IO_L3P_T0_DQS_16 C14 220 1760 220 L 70 70 0 1 P +X IO_L3N_T0_DQS_16 C15 220 1650 220 L 70 70 0 1 P +X IO_L4P_T0_16 E13 220 1540 220 L 70 70 0 1 P +X IO_L4N_T0_16 E14 220 1430 220 L 70 70 0 1 P +X IO_L5P_T0_16 E16 220 1320 220 L 70 70 0 1 P +X IO_L5N_T0_16 D16 220 1210 220 L 70 70 0 1 P +X IO_L6P_T0_16 D14 220 1100 220 L 70 70 0 1 P +X IO_L6N_T0_VREF_16 D15 220 990 220 L 70 70 0 1 P +X IO_L7P_T1_16 B15 220 880 220 L 70 70 0 1 P +X IO_L7N_T1_16 B16 220 770 220 L 70 70 0 1 P +X IO_L8P_T1_16 C13 220 660 220 L 70 70 0 1 P +X IO_L8N_T1_16 B13 220 550 220 L 70 70 0 1 P +X IO_L9P_T1_DQS_16 A15 220 440 220 L 70 70 0 1 P +X IO_L9N_T1_DQS_16 A16 220 330 220 L 70 70 0 1 P +X IO_L10P_T1_16 A13 220 220 220 L 70 70 0 1 P +X IO_L10N_T1_16 A14 220 110 220 L 70 70 0 1 P +X IO_L11P_T1_SRCC_16 B17 220 0 220 L 70 70 0 1 P +X IO_L11N_T1_SRCC_16 B18 220 -110 220 L 70 70 0 1 P +X IO_L12P_T1_MRCC_16 D17 220 -220 220 L 70 70 0 1 P +X IO_L12N_T1_MRCC_16 C17 220 -330 220 L 70 70 0 1 P +X IO_L13P_T2_MRCC_16 C18 220 -440 220 L 70 70 0 1 P +X IO_L13N_T2_MRCC_16 C19 220 -550 220 L 70 70 0 1 P +X IO_L14P_T2_SRCC_16 E19 220 -660 220 L 70 70 0 1 P +X IO_L14N_T2_SRCC_16 D19 220 -770 220 L 70 70 0 1 P +X IO_L15P_T2_DQS_16 F18 220 -880 220 L 70 70 0 1 P +X IO_L15N_T2_DQS_16 E18 220 -990 220 L 70 70 0 1 P +X IO_L16P_T2_16 B20 220 -1100 220 L 70 70 0 1 P +X IO_L16N_T2_16 A20 220 -1210 220 L 70 70 0 1 P +X IO_L17P_T2_16 A18 220 -1320 220 L 70 70 0 1 P +X IO_L17N_T2_16 A19 220 -1430 220 L 70 70 0 1 P +X IO_L18P_T2_16 F19 220 -1540 220 L 70 70 0 1 P +X IO_L18N_T2_16 F20 220 -1650 220 L 70 70 0 1 P +X IO_L19P_T3_16 D20 220 -1760 220 L 70 70 0 1 P +X IO_L19N_T3_VREF_16 C20 220 -1870 220 L 70 70 0 1 P +X IO_L20P_T3_16 C22 220 -1980 220 L 70 70 0 1 P +X IO_L20N_T3_16 B22 220 -2090 220 L 70 70 0 1 P +X IO_L21P_T3_DQS_16 B21 220 -2200 220 L 70 70 0 1 P +X IO_L21N_T3_DQS_16 A21 220 -2310 220 L 70 70 0 1 P +X IO_L22P_T3_16 E22 220 -2420 220 L 70 70 0 1 P +X IO_L22N_T3_16 D22 220 -2530 220 L 70 70 0 1 P +X IO_L23P_T3_16 E21 220 -2640 220 L 70 70 0 1 P +X IO_L23N_T3_16 D21 220 -2750 220 L 70 70 0 1 P +X IO_L24P_T3_16 G21 220 -2860 220 L 70 70 0 1 P +X IO_L24N_T3_16 G22 220 -2970 220 L 70 70 0 1 P +X IO_25_16 F21 220 -3080 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_19.sch b/rev03-KiCad/rev02_19.sch new file mode 100644 index 0000000..fde475a --- /dev/null +++ b/rev03-KiCad/rev02_19.sch @@ -0,0 +1,617 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 21 27 +Title "rev02_19" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 1100 3300 0 60 ~ 12 +*) Upper Right Bank +Text Notes 3619 7161 0 60 ~ 12 +*) FPGA_GCLK signal _MUST_ go into either D17 or C18\n(i.e. into one of the two positive (master) sides\nof the two available MRCC differential pairs) +Text Notes 3586 7535 0 60 ~ 12 +*) FPGA_GPIO_* and FPGA_IRQ_N_* signals can be swapped +Text Notes 7623 3201 0 60 ~ 12 +*) Signals, that are allowed to be swapped, can be be swapped\nwith each other and/or moved to different pins within their bank. +Text Notes 3630 6050 0 60 ~ 12 +NOTE: One of the FPGA_GPIO_* pins\nshould be connected to one of the\nMRCC pins.\nThe non-MRCC GPIO signals should be\nlength matched to within 500 ps of\nthe MRCC signal. +Text Notes 9724 10153 0 84 ~ 12 +FPGA GPIO +Text Notes 9845 3850 2 60 ~ 12 +MA08-2 +Text Notes 9845 4983 2 60 ~ 12 +SV2 +Text Notes 9845 5940 2 60 ~ 12 +MA08-2 +Text Notes 9845 7073 2 60 ~ 12 +SV3 +Text Notes 7986 4499 0 60 ~ 12 +C121 +Text Label 8052 4609 0 70 ~ +0.1uF +Text Notes 7986 6589 0 60 ~ 12 +C122 +Text Label 8063 6699 0 70 ~ +0.1uF +$Comp +L GND #PWR?58023F03 +U 1 1 58023F03 +P 7920 5060 +F 0 "GND_125" H 7920 5060 20 0000 C CNN +F 1 "+GND" H 7920 4990 30 0000 C CNN +F 2 "" H 7920 5060 70 0000 C CNN +F 3 "" H 7920 5060 70 0000 C CNN + 1 7920 5060 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F02 +U 1 1 58023F02 +P 9240 5060 +F 0 "GND_126" H 9240 5060 20 0000 C CNN +F 1 "+GND" H 9240 4990 30 0000 C CNN +F 2 "" H 9240 5060 70 0000 C CNN +F 3 "" H 9240 5060 70 0000 C CNN + 1 9240 5060 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F01 +U 1 1 58023F01 +P 10120 5060 +F 0 "GND_127" H 10120 5060 20 0000 C CNN +F 1 "+GND" H 10120 4990 30 0000 C CNN +F 2 "" H 10120 5060 70 0000 C CNN +F 3 "" H 10120 5060 70 0000 C CNN + 1 10120 5060 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023F00 +U 1 1 58023F00 +P 7920 7150 +F 0 "GND_128" H 7920 7150 20 0000 C CNN +F 1 "+GND" H 7920 7080 30 0000 C CNN +F 2 "" H 7920 7150 70 0000 C CNN +F 3 "" H 7920 7150 70 0000 C CNN + 1 7920 7150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023EFF +U 1 1 58023EFF +P 9240 7150 +F 0 "GND_129" H 9240 7150 20 0000 C CNN +F 1 "+GND" H 9240 7080 30 0000 C CNN +F 2 "" H 9240 7150 70 0000 C CNN +F 3 "" H 9240 7150 70 0000 C CNN + 1 9240 7150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023EFE +U 1 1 58023EFE +P 10120 7150 +F 0 "GND_130" H 10120 7150 20 0000 C CNN +F 1 "+GND" H 10120 7080 30 0000 C CNN +F 2 "" H 10120 7150 70 0000 C CNN +F 3 "" H 10120 7150 70 0000 C CNN + 1 10120 7150 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023EFD +U 1 1 58023EFD +P 2310 3520 +F 0 "VCCO_3V3_35" H 2310 3520 20 0000 C CNN +F 1 "+VCCO_3V3" H 2310 3450 30 0000 C CNN +F 2 "" H 2310 3520 70 0000 C CNN +F 3 "" H 2310 3520 70 0000 C CNN + 1 2310 3520 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023EFC +U 1 1 58023EFC +P 7920 3630 +F 0 "VCCO_3V3_36" H 7920 3630 20 0000 C CNN +F 1 "+VCCO_3V3" H 7920 3560 30 0000 C CNN +F 2 "" H 7920 3630 70 0000 C CNN +F 3 "" H 7920 3630 70 0000 C CNN + 1 7920 3630 + 1 0 0 -1 +$EndComp +$Comp +L VCCO_3V3 #PWR?58023EFB +U 1 1 58023EFB +P 7920 5720 +F 0 "VCCO_3V3_37" H 7920 5720 20 0000 C CNN +F 1 "+VCCO_3V3" H 7920 5650 30 0000 C CNN +F 2 "" H 7920 5720 70 0000 C CNN +F 3 "" H 7920 5720 70 0000 C CNN + 1 7920 5720 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023EFA +U 1 1 58023EFA +P 10230 8910 +F 0 "GND_131" H 10230 8910 20 0000 C CNN +F 1 "+GND" H 10230 8840 30 0000 C CNN +F 2 "" H 10230 8910 70 0000 C CNN +F 3 "" H 10230 8910 70 0000 C CNN + 1 10230 8910 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7920 4730 7920 5060 +Wire Wire Line + 9240 4620 9240 5060 +Wire Wire Line + 9350 4620 9240 4620 +Wire Wire Line + 9350 4290 9240 4290 +Wire Wire Line + 9240 4290 9240 4620 +Wire Wire Line + 10120 4620 10010 4620 +Wire Wire Line + 10120 4620 10120 5060 +Wire Wire Line + 10120 4290 10010 4290 +Wire Wire Line + 10120 4290 10120 4620 +Wire Wire Line + 7920 6820 7920 7150 +Wire Wire Line + 9240 6710 9240 7150 +Wire Wire Line + 9350 6710 9240 6710 +Wire Wire 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+Wire Wire Line + 9240 3850 7920 3850 +Wire Wire Line + 7920 3630 7920 3850 +Wire Wire Line + 7920 3850 7920 4400 +Wire Wire Line + 9350 4180 9240 4180 +Wire Wire Line + 9240 4070 9240 4180 +Wire Wire Line + 9240 3850 9240 4070 +Wire Wire Line + 10120 4070 10010 4070 +Wire Wire Line + 10120 3850 10120 4070 +Wire Wire Line + 10120 3850 9240 3850 +Wire Wire Line + 10120 4180 10010 4180 +Wire Wire Line + 10120 4070 10120 4180 +Wire Wire Line + 9350 4070 9240 4070 +Wire Wire Line + 9240 5940 7920 5940 +Wire Wire Line + 7920 5720 7920 5940 +Wire Wire Line + 7920 5940 7920 6490 +Wire Wire Line + 9350 6270 9240 6270 +Wire Wire Line + 9240 6160 9240 6270 +Wire Wire Line + 9240 5940 9240 6160 +Wire Wire Line + 10120 6160 10010 6160 +Wire Wire Line + 10120 5940 10120 6160 +Wire Wire Line + 10120 5940 9240 5940 +Wire Wire Line + 10120 6270 10010 6270 +Wire Wire Line + 10120 6160 10120 6270 +Wire Wire Line + 9350 6160 9240 6160 +Wire Wire Line + 3410 7810 2090 7810 +Text Label 2310 7810 0 70 ~ +AVR_GPIO_FPGA_0 +Wire Wire Line + 3410 7920 2090 7920 +Text Label 2310 7920 0 70 ~ +AVR_GPIO_FPGA_1 +Wire Wire Line + 3410 4620 2090 4620 +Text Label 2310 4620 0 70 ~ +FPGA_IRQ_N_0 +Wire Wire Line + 3410 4730 2090 4730 +Text Label 2310 4730 0 70 ~ +FPGA_IRQ_N_1 +Wire Wire Line + 3410 4840 2090 4840 +Text Label 2310 4840 0 70 ~ +FPGA_IRQ_N_2 +Wire Wire Line + 3410 4950 2090 4950 +Text Label 2310 4950 0 70 ~ +FPGA_IRQ_N_3 +Wire Wire Line + 3410 5060 2090 5060 +Text Label 2310 5280 0 70 ~ +FPGA_GPIO_A_0 +Wire Wire Line + 9350 4400 8360 4400 +Text Label 8360 4400 0 70 ~ +FPGA_GPIO_A_0 +Wire Wire Line + 3410 5170 2090 5170 +Text Label 2310 5170 0 70 ~ +FPGA_GPIO_A_1 +Wire Wire Line + 11000 4400 10010 4400 +Text Label 10230 4400 0 70 ~ +FPGA_GPIO_A_1 +Wire Wire Line + 3410 5280 2090 5280 +Text Label 2310 6490 0 70 ~ +FPGA_GPIO_A_2 +Wire Wire Line + 9350 4510 8360 4510 +Text Label 8360 4510 0 70 ~ +FPGA_GPIO_A_2 +Text Label 2310 6600 0 70 ~ +FPGA_GPIO_A_3 +Wire Wire Line + 11000 4510 10010 4510 +Text Label 10230 4510 0 70 ~ +FPGA_GPIO_A_3 +Text Label 2310 6050 0 70 ~ +FPGA_GPIO_A_4 +Wire Wire Line + 9350 4730 8360 4730 +Text Label 8360 4730 0 70 ~ +FPGA_GPIO_A_4 +Wire Wire Line + 3410 5610 2090 5610 +Text Label 2310 6160 0 70 ~ +FPGA_GPIO_A_5 +Wire Wire Line + 11000 4730 10010 4730 +Text Label 10230 4730 0 70 ~ +FPGA_GPIO_A_5 +Text Label 2321 6270 0 70 ~ +FPGA_GPIO_A_6 +Wire Wire Line + 9350 4840 8360 4840 +Text Label 8360 4840 0 70 ~ +FPGA_GPIO_A_6 +Wire Wire Line + 3410 5830 2090 5830 +Text Label 2310 5830 0 70 ~ +FPGA_GPIO_A_7 +Wire Wire Line + 11000 4840 10010 4840 +Text Label 10230 4840 0 70 ~ +FPGA_GPIO_A_7 +Wire Wire Line + 3410 5940 2090 5940 +Text Label 2321 6380 0 70 ~ +FPGA_GPIO_B_0 +Wire Wire Line + 9350 6490 8360 6490 +Text Label 8360 6490 0 70 ~ +FPGA_GPIO_B_0 +Wire Wire Line + 3410 6050 2090 6050 +Text Label 2310 5060 0 70 ~ +FPGA_GPIO_B_1 +Wire Wire Line + 11000 6490 10010 6490 +Text Label 10230 6490 0 70 ~ +FPGA_GPIO_B_1 +Wire Wire Line + 3410 6160 2090 6160 +Text Label 2310 5940 0 70 ~ +FPGA_GPIO_B_2 +Wire Wire Line + 9350 6600 8360 6600 +Text Label 8360 6600 0 70 ~ +FPGA_GPIO_B_2 +Wire Wire Line + 3410 6270 2090 6270 +Text Label 2321 5610 0 70 ~ +FPGA_GPIO_B_3 +Wire Wire Line + 11000 6600 10010 6600 +Text Label 10230 6600 0 70 ~ +FPGA_GPIO_B_3 +Wire Wire Line + 3410 6380 2090 6380 +Text Label 2310 7150 0 70 ~ +FPGA_GPIO_B_4 +Wire Wire Line + 9350 6820 8360 6820 +Text Label 8360 6820 0 70 ~ +FPGA_GPIO_B_4 +Wire Wire Line + 3410 6490 2090 6490 +Text Label 2310 9020 0 70 ~ +FPGA_GPIO_B_5 +Wire Wire Line + 11000 6820 10010 6820 +Text Label 10230 6820 0 70 ~ +FPGA_GPIO_B_5 +Wire Wire Line + 3410 6600 2090 6600 +Text Label 2310 8580 0 70 ~ +FPGA_GPIO_B_6 +Wire Wire Line + 9350 6930 8360 6930 +Text Label 8360 6930 0 70 ~ +FPGA_GPIO_B_6 +Text Label 2310 8690 0 70 ~ +FPGA_GPIO_B_7 +Wire Wire Line + 11000 6930 10010 6930 +Text Label 10230 6930 0 70 ~ +FPGA_GPIO_B_7 +Wire Wire Line + 3410 6930 2090 6930 +Text Label 2310 6930 0 70 ~ +FPGA_GCLK +Wire Wire Line + 8679 8470 8030 8470 +Text Label 8030 8470 0 70 ~ +FPGA_GPIO_LED_2 +Wire Wire Line + 9020 8360 8030 8360 +Text Label 8030 8360 0 70 ~ +FPGA_GPIO_LED_3 +Wire Wire Line + 8679 8690 8030 8690 +Text Label 8030 8690 0 70 ~ +FPGA_GPIO_LED_0 +Wire Wire Line + 9020 8580 8030 8580 +Text Label 8030 8580 0 70 ~ +FPGA_GPIO_LED_1 +Wire Wire Line + 9790 8690 9119 8690 +Wire Wire Line + 9570 8580 9460 8580 +Wire Wire Line + 9790 8470 9119 8470 +Wire Wire Line + 9570 8360 9460 8360 +Wire Wire Line + 3410 6820 2090 6820 +Text Label 2310 6820 0 70 ~ +FPGA_ENTROPY_DISABLE +Wire Wire Line + 3410 8030 2090 8030 +Text Label 2310 8030 0 70 ~ +AVR_GPIO_FPGA_2 +Wire Wire Line + 3410 8140 2090 8140 +Text Label 2310 8140 0 70 ~ +AVR_GPIO_FPGA_3 +Text Label 9130 8261 0 70 ~ +330 +Text Label 8745 8261 0 70 ~ +330 +Text Label 9581 8250 0 70 ~ +330 +Text Label 8789 8976 0 70 ~ +330 +Wire Wire Line + 3410 7150 2090 7150 +Wire Wire Line + 3410 8580 2090 8580 +Wire Wire Line + 3410 8690 2090 8690 +Wire Wire Line + 3410 9020 2090 9020 +$Comp +L MA08-2 IC276 +U 1 1 58023EF9 + 1 9680 4400 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R99 +U 1 1 58023EF8 +F 0 "R99" H 9339 8162 60 0000 R TNN +F 1 "" H 9339 8261 60 0000 R TNN +F 2 "" H 9339 8261 60 0000 C CNN +F 3 "" H 9339 8261 60 0000 C CNN + 1 9240 8360 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R98 +U 1 1 58023EF7 +F 0 "R98" H 9042 8162 60 0000 R TNN +F 1 "" H 8998 8371 60 0000 R TNN +F 2 "" H 8998 8371 60 0000 C CNN +F 3 "" H 8998 8371 60 0000 C CNN + 1 8899 8470 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R64 +U 1 1 58023EF6 +F 0 "R64" H 8888 8151 60 0000 R TNN +F 1 "" H 9339 8481 60 0000 R TNN +F 2 "" H 9339 8481 60 0000 C CNN +F 3 "" H 9339 8481 60 0000 C CNN + 1 9240 8580 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0402 R100 +U 1 1 58023EF5 +F 0 "R100" H 8998 8877 60 0000 R TNN +F 1 "" H 8998 8591 60 0000 R TNN +F 2 "" H 8998 8591 60 0000 C CNN +F 3 "" H 8998 8591 60 0000 C CNN + 1 8899 8690 + -1 0 0 1 +$EndComp +$Comp +L MA08-2 IC281 +U 1 1 58023EF4 + 1 9680 6490 + -1 0 0 1 +$EndComp +$Comp +L C-EUC0402 IC282 +U 1 1 58023EF3 + 1 7920 4510 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC283 +U 1 1 58023EF2 + 1 7920 6600 + 1 0 0 -1 +$EndComp +$Comp +L LEDCHIP-LED0603 LED17 +U 1 1 58023EF1 +F 0 "LED17" V 9856 8279.68328 60 0000 R TNN +F 1 "LTST-C193TBKT-5A" V 9856 7942 60 0000 R TNN +F 2 "" H 9856 7942 60 0000 C CNN +F 3 "" H 9856 7942 60 0000 C CNN + 1 9900 8690 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED15 +U 1 1 58023EF0 +F 0 "LED15" V 9636 7949.68328 60 0000 R TNN +F 1 "LTST-C191KGKT" V 9636 7612 60 0000 R TNN +F 2 "" H 9636 7612 60 0000 C CNN +F 3 "" H 9636 7612 60 0000 C CNN + 1 9680 8580 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED16 +U 1 1 58023EEF +F 0 "LED16" V 9856 8059.68328 60 0000 R TNN +F 1 "LTST-C191KSKT" V 9856 7733 60 0000 R TNN +F 2 "" H 9856 7733 60 0000 C CNN +F 3 "" H 9856 7733 60 0000 C CNN + 1 9900 8470 + 0 -1 -1 0 +$EndComp +$Comp +L LEDCHIP-LED0603 LED14 +U 1 1 58023EEE +F 0 "LED14" V 9636 7729.68328 60 0000 R TNN +F 1 "LTST-C191KRKT" V 9636 7392 60 0000 R TNN +F 2 "" H 9636 7392 60 0000 C CNN +F 3 "" H 9636 7392 60 0000 C CNN + 1 9680 8360 + 0 -1 -1 0 +$EndComp +$Comp +L XC7A200TFBG484_5 IC288 +U 1 1 58023EED + 1 1870 6710 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_20-cache.lib b/rev03-KiCad/rev02_20-cache.lib new file mode 100644 index 0000000..3cdc34d --- /dev/null +++ b/rev03-KiCad/rev02_20-cache.lib @@ -0,0 +1,121 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0603 +# +DEF R-EU_R0603 IC 0 40 Y Y 1 F N +F0 "R" 132 0 60 H V L BNN +F1 "R-EU_R0603" 132 -121 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_3 +# +DEF XC7A200TFBG484_3 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 3080 -440 3080 +P 2 0 1 10 0 -3190 0 3080 +P 2 0 1 10 -440 -3190 0 -3190 +X VCCO_14 M14 220 2970 220 L 70 70 0 1 P +X VCCO_14 P18 220 2860 220 L 70 70 0 1 P +X VCCO_14 R15 220 2750 220 L 70 70 0 1 P +X VCCO_14 T22 220 2640 220 L 70 70 0 1 P +X VCCO_14 U19 220 2530 220 L 70 70 0 1 P +X VCCO_14 Y20 220 2420 220 L 70 70 0 1 P +X IO_0_14 P20 220 2310 220 L 70 70 0 1 P +X IO_L1P_T0_D00_MOSI_14 P22 220 2200 220 L 70 70 0 1 P +X IO_L1N_T0_D01_DIN_14 R22 220 2090 220 L 70 70 0 1 P +X IO_L2P_T0_D02_14 P21 220 1980 220 L 70 70 0 1 P +X IO_L2N_T0_D03_14 R21 220 1870 220 L 70 70 0 1 P +X IO_L3P_T0_DQS_PUDC_B_14 U22 220 1760 220 L 70 70 0 1 P +X IO_L3N_T0_DQS_EMCCLK_14 V22 220 1650 220 L 70 70 0 1 P +X IO_L4P_T0_D04_14 T21 220 1540 220 L 70 70 0 1 P +X IO_L4N_T0_D05_14 U21 220 1430 220 L 70 70 0 1 P +X IO_L5P_T0_D06_14 P19 220 1320 220 L 70 70 0 1 P +X IO_L5N_T0_D07_14 R19 220 1210 220 L 70 70 0 1 P +X IO_L6P_T0_FCS_B_14 T19 220 1100 220 L 70 70 0 1 P +X IO_L6N_T0_D08_VREF_14 T20 220 990 220 L 70 70 0 1 P +X IO_L7P_T1_D09_14 W21 220 880 220 L 70 70 0 1 P +X IO_L7N_T1_D10_14 W22 220 770 220 L 70 70 0 1 P +X IO_L8P_T1_D11_14 AA20 220 660 220 L 70 70 0 1 P +X IO_L8N_T1_D12_14 AA21 220 550 220 L 70 70 0 1 P +X IO_L9P_T1_DQS_14 Y21 220 440 220 L 70 70 0 1 P +X IO_L9N_T1_DQS_D13_14 Y22 220 330 220 L 70 70 0 1 P +X IO_L10P_T1_D14_14 AB21 220 220 220 L 70 70 0 1 P +X IO_L10N_T1_D15_14 AB22 220 110 220 L 70 70 0 1 P +X IO_L11P_T1_SRCC_14 U20 220 0 220 L 70 70 0 1 P +X IO_L11N_T1_SRCC_14 V20 220 -110 220 L 70 70 0 1 P +X IO_L12P_T1_MRCC_14 W19 220 -220 220 L 70 70 0 1 P +X IO_L12N_T1_MRCC_14 W20 220 -330 220 L 70 70 0 1 P +X IO_L13P_T2_MRCC_14 Y18 220 -440 220 L 70 70 0 1 P +X IO_L13N_T2_MRCC_14 Y19 220 -550 220 L 70 70 0 1 P +X IO_L14P_T2_SRCC_14 V18 220 -660 220 L 70 70 0 1 P +X IO_L14N_T2_SRCC_14 V19 220 -770 220 L 70 70 0 1 P +X IO_L15P_T2_DQS_RDWR_B_14 AA19 220 -880 220 L 70 70 0 1 P +X IO_L15N_T2_DQS_DOUT_CSO_B_14 AB20 220 -990 220 L 70 70 0 1 P +X IO_L16P_T2_CSI_B_14 V17 220 -1100 220 L 70 70 0 1 P +X IO_L16N_T2_A15_D31_14 W17 220 -1210 220 L 70 70 0 1 P +X IO_L17P_T2_A14_D30_14 AA18 220 -1320 220 L 70 70 0 1 P +X IO_L17N_T2_A13_D29_14 AB18 220 -1430 220 L 70 70 0 1 P +X IO_L18P_T2_A12_D28_14 U17 220 -1540 220 L 70 70 0 1 P +X IO_L18N_T2_A11_D27_14 U18 220 -1650 220 L 70 70 0 1 P +X IO_L19P_T3_A10_D26_14 P14 220 -1760 220 L 70 70 0 1 P +X IO_L19N_T3_A09_D25_VREF_14 R14 220 -1870 220 L 70 70 0 1 P +X IO_L20P_T3_A08_D24_14 R18 220 -1980 220 L 70 70 0 1 P +X IO_L20N_T3_A07_D23_14 T18 220 -2090 220 L 70 70 0 1 P +X IO_L21P_T3_DQS_14 N17 220 -2200 220 L 70 70 0 1 P +X IO_L21N_T3_DQS_A06_D22_14 P17 220 -2310 220 L 70 70 0 1 P +X IO_L22P_T3_A05_D21_14 P15 220 -2420 220 L 70 70 0 1 P +X IO_L22N_T3_A04_D20_14 R16 220 -2530 220 L 70 70 0 1 P +X IO_L23P_T3_A03_D19_14 N13 220 -2640 220 L 70 70 0 1 P +X IO_L23N_T3_A02_D18_14 N14 220 -2750 220 L 70 70 0 1 P +X IO_L24P_T3_A01_D17_14 P16 220 -2860 220 L 70 70 0 1 P +X IO_L24N_T3_A00_D16_14 R17 220 -2970 220 L 70 70 0 1 P +X IO_25_14 N15 220 -3080 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_20.sch b/rev03-KiCad/rev02_20.sch new file mode 100644 index 0000000..52a3a15 --- /dev/null +++ b/rev03-KiCad/rev02_20.sch @@ -0,0 +1,262 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 22 27 +Title "rev02_20" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 1760 3410 0 60 ~ 12 +*) Lower Right Bank +Text Notes 4202 7051 0 60 ~ 12 +DIGITIZED_NOISE signal should go into\neither W19 or Y18 (i.e. into one of the two\npositive (master) sides of the two available\nMRCC differential pairs) +Text Notes 7150 3410 0 60 ~ 12 +*) Signals, that are allowed to be swapped, can be be swapped\nwith each other and/or moved to different pins within their bank. +Text Notes 5280 6050 0 60 ~ 12 +<-- FPGA_GPIO_* and FPGA_IRQ_N_* signals can be swapped +Text Notes 5478 4191 0 60 ~ 12 +<-- Disable pull-ups on all pins during configuration +Text Notes 9350 10142 0 84 ~ 12 +FPGA MKM interface +Text Notes 4708 4279 0 60 ~ 12 +R65 +Text Label 4697 4367 0 70 ~ +1k +Text Label 3718 4532 0 70 ~ +0 +Text Label 3729 4917 0 70 ~ +0 +Text Label 3773 5830 0 70 ~ +0 +$Comp +L VCCO_3V3 #PWR?58023EEC +U 1 1 58023EEC +P 4620 3630 +F 0 "VCCO_3V3_38" H 4620 3630 20 0000 C CNN +F 1 "+VCCO_3V3" H 4620 3560 30 0000 C CNN +F 2 "" H 4620 3630 70 0000 C CNN +F 3 "" H 4620 3630 70 0000 C CNN + 1 4620 3630 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3960 7040 2640 7040 +Text Label 2706 7040 0 70 ~ +DIGITIZED_NOISE +Wire Wire Line + 3960 6050 2640 6050 +Text Label 2717 6050 0 70 ~ +FPGA_GPIO_LED_2 +Wire Wire Line + 3960 6160 2640 6160 +Text Label 2717 6160 0 70 ~ +FPGA_GPIO_LED_3 +Wire Wire Line + 3960 5940 2640 5940 +Wire Wire Line + 3190 5060 2640 5060 +Wire Wire Line + 2860 3850 2640 3850 +Wire Wire Line + 2860 3850 2860 3960 +Wire Wire Line + 2860 3960 2860 4070 +Wire Wire Line + 2860 4070 2860 4180 +Wire Wire Line + 2860 4180 2860 4290 +Wire Wire Line + 2860 4290 2640 4290 +Wire Wire Line + 2860 4180 2640 4180 +Wire Wire Line + 2860 4070 2640 4070 +Wire Wire Line + 2860 3960 2640 3960 +Wire Wire Line + 3190 3850 2860 3850 +Wire Wire Line + 4620 3630 4620 3850 +Wire Wire Line + 2860 4290 2860 4400 +Wire Wire Line + 2860 4400 2640 4400 +Wire Wire Line + 3960 4620 3850 4620 +Text Label 3960 4620 0 70 ~ +FPGA_CFG_MOSI +Wire Wire Line + 3960 4730 3850 4730 +Text Label 3960 4730 0 70 ~ +FPGA_CFG_MISO +Wire Wire Line + 3960 5720 3850 5720 +Text Label 3960 5720 0 70 ~ +FPGA_CFG_CS_N +Wire Wire Line + 3410 4730 2640 4730 +Text Label 2706 4730 0 70 ~ +FPGA_CFG_MISO1 +Wire Wire Line + 3410 4620 2640 4620 +Text Label 2706 4620 0 70 ~ +FPGA_CFG_MOSI1 +Wire Wire Line + 3410 5720 2640 5720 +Text Label 2706 5720 0 70 ~ +FPGA_CFG_CS_N1 +Text Label 2706 6600 0 70 ~ +FMC_A19 +Text Label 2706 6710 0 70 ~ +FMC_A20 +Wire Wire Line + 3960 6600 2640 6600 +Wire Wire Line + 3960 6710 2640 6710 +Text Label 2706 7810 0 70 ~ +FMC_A21 +Wire Wire Line + 3971 7810 2640 7810 +Text Label 2706 6380 0 70 ~ +FMC_A22 +Text Label 2706 6490 0 70 ~ +FMC_A23 +Wire Wire Line + 3960 6490 2640 6490 +Wire Wire Line + 3960 6380 2640 6380 +Text Label 2706 8250 0 70 ~ +FMC_A24 +Wire Wire Line + 3960 8250 2640 8250 +Text Label 2706 7700 0 70 ~ +FMC_A25 +Wire Wire Line + 3960 7700 2640 7700 +Text Label 2706 7260 0 70 ~ +FMC_D8 +Wire Wire Line + 3960 7260 2640 7260 +Text Label 2706 6270 0 70 ~ +FMC_D9 +Wire Wire Line + 3960 6270 2640 6270 +Text Label 2706 7150 0 70 ~ +FMC_D10 +Wire Wire Line + 3960 7150 2640 7150 +Text Label 2706 6820 0 70 ~ +FMC_D12 +Wire Wire Line + 3960 6820 2640 6820 +Text Label 2706 6930 0 70 ~ +FMC_D28 +Wire Wire Line + 3960 6930 2640 6930 +Text Label 2706 7480 0 70 ~ +FMC_D29 +Wire Wire Line + 3960 7480 2640 7480 +Text Label 2706 4950 0 70 ~ +FMC_D30 +Wire Wire Line + 3410 4950 2640 4950 +Text Label 2706 4840 0 70 ~ +FMC_D31 +Wire Wire Line + 3410 4840 2640 4840 +Text Label 2706 8030 0 70 ~ +FMC_NL +Wire Wire Line + 3960 8030 2640 8030 +Text Label 2695 9900 0 70 ~ +FMC_D11 +Wire Wire Line + 3960 9900 2640 9900 +Wire Wire Line + 4620 5060 3190 5060 +Wire Wire Line + 4620 4400 4620 5060 +Wire Wire Line + 4620 3850 3190 3850 +Wire Wire Line + 4620 3960 4620 3850 +$Comp +L R-EU_R0402 IC289 +U 1 1 58023EEB + 1 4620 4180 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0603 R83 +U 1 1 58023EEA +F 0 "R83" H 3751 4532 60 0000 R TNN +F 1 "" H 3542 4532 60 0000 R TNN +F 2 "" H 3542 4532 60 0000 C CNN +F 3 "" H 3542 4532 60 0000 C CNN + 1 3630 4620 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0603 R84 +U 1 1 58023EE9 +F 0 "R84" H 3740 4928 60 0000 R TNN +F 1 "" H 3531 4928 60 0000 R TNN +F 2 "" H 3531 4928 60 0000 C CNN +F 3 "" H 3531 4928 60 0000 C CNN + 1 3630 4730 + -1 0 0 1 +$EndComp +$Comp +L R-EU_R0603 R85 +U 1 1 58023EE8 +F 0 "R85" H 3498 5720 60 0000 R TNN +F 1 "" H 3498 5841 60 0000 R TNN +F 2 "" H 3498 5841 60 0000 C CNN +F 3 "" H 3498 5841 60 0000 C CNN + 1 3630 5720 + -1 0 0 1 +$EndComp +$Comp +L XC7A200TFBG484_3 IC293 +U 1 1 58023EE7 + 1 2420 6820 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_21-cache.lib b/rev03-KiCad/rev02_21-cache.lib new file mode 100644 index 0000000..b30ed45 --- /dev/null +++ b/rev03-KiCad/rev02_21-cache.lib @@ -0,0 +1,210 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# FPGA_VCCINT_1V0 +# +DEF FPGA_VCCINT_1V0 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FPGA_VCCINT_1V0" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FPGA_VCCINT_1V0 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# FPGA_VCCAUX_1V8 +# +DEF FPGA_VCCAUX_1V8 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FPGA_VCCAUX_1V8" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FPGA_VCCAUX_1V8 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_10 +# +DEF XC7A200TFBG484_10 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 2420 -440 2420 +P 2 0 1 10 0 -2420 0 2420 +P 2 0 1 10 -440 -2420 0 -2420 +X GND J10 220 2310 220 L 70 70 0 1 W +X GND J12 220 2200 220 L 70 70 0 1 W +X GND J18 220 2090 220 L 70 70 0 1 W +X GND K5 220 1980 220 L 70 70 0 1 W +X GND K7 220 1870 220 L 70 70 0 1 W +X GND K11 220 1760 220 L 70 70 0 1 W +X GND K15 220 1650 220 L 70 70 0 1 W +X GND L2 220 1540 220 L 70 70 0 1 W +X GND L8 220 1430 220 L 70 70 0 1 W +X GND L22 220 1320 220 L 70 70 0 1 W +X GND M7 220 1210 220 L 70 70 0 1 W +X GND M11 220 1100 220 L 70 70 0 1 W +X GND M19 220 990 220 L 70 70 0 1 W +X GND N6 220 880 220 L 70 70 0 1 W +X GND N8 220 770 220 L 70 70 0 1 W +X GND N16 220 660 220 L 70 70 0 1 W +X GND P3 220 550 220 L 70 70 0 1 W +X GND P7 220 440 220 L 70 70 0 1 W +X GND P9 220 330 220 L 70 70 0 1 W +X GND P11 220 220 220 L 70 70 0 1 W +X GND P13 220 110 220 L 70 70 0 1 W +X GND R8 220 0 220 L 70 70 0 1 W +X GND R10 220 -110 220 L 70 70 0 1 W +X GND R12 220 -220 220 L 70 70 0 1 W +X GND R20 220 -330 220 L 70 70 0 1 W +X GND T7 220 -440 220 L 70 70 0 1 W +X GND T9 220 -550 220 L 70 70 0 1 W +X GND T11 220 -660 220 L 70 70 0 1 W +X GND T17 220 -770 220 L 70 70 0 1 W +X GND U4 220 -880 220 L 70 70 0 1 W +X GND U14 220 -990 220 L 70 70 0 1 W +X GND V1 220 -1100 220 L 70 70 0 1 W +X GND V11 220 -1210 220 L 70 70 0 1 W +X GND V21 220 -1320 220 L 70 70 0 1 W +X GND W8 220 -1430 220 L 70 70 0 1 W +X GND W18 220 -1540 220 L 70 70 0 1 W +X GND Y5 220 -1650 220 L 70 70 0 1 W +X GND Y15 220 -1760 220 L 70 70 0 1 W +X GND AA2 220 -1870 220 L 70 70 0 1 W +X GND AA12 220 -1980 220 L 70 70 0 1 W +X GND AA22 220 -2090 220 L 70 70 0 1 W +X GND AB9 220 -2200 220 L 70 70 0 1 W +X GND AB19 220 -2310 220 L 70 70 0 1 W +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_14 +# +DEF XC7A200TFBG484_14 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 330 -440 330 +P 2 0 1 10 0 -330 0 330 +P 2 0 1 10 -440 -330 0 -330 +X VCCAUX H12 220 220 220 L 70 70 0 1 P +X VCCAUX K12 220 110 220 L 70 70 0 1 P +X VCCAUX M12 220 0 220 L 70 70 0 1 P +X VCCAUX P12 220 -110 220 L 70 70 0 1 P +X VCCAUX R11 220 -220 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_15 +# +DEF XC7A200TFBG484_15 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 220 -440 220 +P 2 0 1 10 0 -220 0 220 +P 2 0 1 10 -440 -220 0 -220 +X VCCBRAM J11 220 110 220 L 70 70 0 1 P +X VCCBRAM L11 220 0 220 L 70 70 0 1 P +X VCCBRAM N11 220 -110 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_16 +# +DEF XC7A200TFBG484_16 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 770 -440 770 +P 2 0 1 10 0 -880 0 770 +P 2 0 1 10 -440 -880 0 -880 +X VCCINT H8 220 660 220 L 70 70 0 1 P +X VCCINT H10 220 550 220 L 70 70 0 1 P +X VCCINT J7 220 440 220 L 70 70 0 1 P +X VCCINT J9 220 330 220 L 70 70 0 1 P +X VCCINT K8 220 220 220 L 70 70 0 1 P +X VCCINT L7 220 110 220 L 70 70 0 1 P +X VCCINT M8 220 0 220 L 70 70 0 1 P +X VCCINT N7 220 -110 220 L 70 70 0 1 P +X VCCINT P8 220 -220 220 L 70 70 0 1 P +X VCCINT P10 220 -330 220 L 70 70 0 1 P +X VCCINT R7 220 -440 220 L 70 70 0 1 P +X VCCINT R9 220 -550 220 L 70 70 0 1 P +X VCCINT T8 220 -660 220 L 70 70 0 1 P +X VCCINT T10 220 -770 220 L 70 70 0 1 P +ENDDRAW +ENDDEF +# +# XC7A200TFBG484_9 +# +DEF XC7A200TFBG484_9 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 2420 -440 2420 +P 2 0 1 10 0 -2530 0 2420 +P 2 0 1 10 -440 -2530 0 -2530 +X GND A2 220 2310 220 L 70 70 0 1 W +X GND A3 220 2200 220 L 70 70 0 1 W +X GND A5 220 2090 220 L 70 70 0 1 W +X GND A7 220 1980 220 L 70 70 0 1 W +X GND A9 220 1870 220 L 70 70 0 1 W +X GND A11 220 1760 220 L 70 70 0 1 W +X GND A12 220 1650 220 L 70 70 0 1 W +X GND A22 220 1540 220 L 70 70 0 1 W +X GND B3 220 1430 220 L 70 70 0 1 W +X GND B12 220 1320 220 L 70 70 0 1 W +X GND B19 220 1210 220 L 70 70 0 1 W +X GND C3 220 1100 220 L 70 70 0 1 W +X GND C6 220 990 220 L 70 70 0 1 W +X GND C10 220 880 220 L 70 70 0 1 W +X GND C12 220 770 220 L 70 70 0 1 W +X GND C16 220 660 220 L 70 70 0 1 W +X GND D3 220 550 220 L 70 70 0 1 W +X GND D4 220 440 220 L 70 70 0 1 W +X GND D8 220 330 220 L 70 70 0 1 W +X GND D12 220 220 220 L 70 70 0 1 W +X GND D13 220 110 220 L 70 70 0 1 W +X GND E4 220 0 220 L 70 70 0 1 W +X GND E5 220 -110 220 L 70 70 0 1 W +X GND E7 220 -220 220 L 70 70 0 1 W +X GND E9 220 -330 220 L 70 70 0 1 W +X GND E11 220 -440 220 L 70 70 0 1 W +X GND E20 220 -550 220 L 70 70 0 1 W +X GND F5 220 -660 220 L 70 70 0 1 W +X GND F11 220 -770 220 L 70 70 0 1 W +X GND F17 220 -880 220 L 70 70 0 1 W +X GND G5 220 -990 220 L 70 70 0 1 W +X GND G6 220 -1100 220 L 70 70 0 1 W +X GND G7 220 -1210 220 L 70 70 0 1 W +X GND G8 220 -1320 220 L 70 70 0 1 W +X GND G9 220 -1430 220 L 70 70 0 1 W +X GND G10 220 -1540 220 L 70 70 0 1 W +X GND G12 220 -1650 220 L 70 70 0 1 W +X GND G14 220 -1760 220 L 70 70 0 1 W +X GND H1 220 -1870 220 L 70 70 0 1 W +X GND H7 220 -1980 220 L 70 70 0 1 W +X GND H9 220 -2090 220 L 70 70 0 1 W +X GND H11 220 -2200 220 L 70 70 0 1 W +X GND H21 220 -2310 220 L 70 70 0 1 W +X GND J8 220 -2420 220 L 70 70 0 1 W +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_21.sch b/rev03-KiCad/rev02_21.sch new file mode 100644 index 0000000..66ad16a --- /dev/null +++ b/rev03-KiCad/rev02_21.sch @@ -0,0 +1,563 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 23 27 +Title "rev02_21" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 8910 3960 0 60 ~ 12 +*) Power - AUX +Text Notes 5500 3960 0 60 ~ 12 +*) Power - CORE & BRAM +Text Notes 2200 3850 0 60 ~ 12 +*) Ground Pins +Text Notes 9306 10131 0 66 ~ 12 +FPGA power and ground +$Comp +L GND #PWR?58023EE6 +U 1 1 58023EE6 +P 2200 9570 +F 0 "GND_132" H 2200 9570 20 0000 C CNN +F 1 "+GND" H 2200 9500 30 0000 C CNN +F 2 "" H 2200 9570 70 0000 C CNN +F 3 "" H 2200 9570 70 0000 C CNN + 1 2200 9570 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023EE5 +U 1 1 58023EE5 +P 4180 9460 +F 0 "GND_133" H 4180 9460 20 0000 C CNN +F 1 "+GND" H 4180 9390 30 0000 C CNN +F 2 "" H 4180 9460 70 0000 C CNN +F 3 "" H 4180 9460 70 0000 C CNN + 1 4180 9460 + 1 0 0 -1 +$EndComp +$Comp +L FPGA_VCCINT_1V0 #PWR?58023EE4 +U 1 1 58023EE4 +P 6600 4290 +F 0 "FPGA_VCCINT_1V0" H 6600 4290 20 0000 C CNN +F 1 "+FPGA_VCCINT_1V0" H 6600 4220 30 0000 C CNN +F 2 "" H 6600 4290 70 0000 C CNN +F 3 "" H 6600 4290 70 0000 C CNN + 1 6600 4290 + 1 0 0 -1 +$EndComp +$Comp +L FPGA_VCCAUX_1V8 #PWR?58023EE3 +U 1 1 58023EE3 +P 9900 4290 +F 0 "FPGA_VCCAUX_1V8_2" H 9900 4290 20 0000 C CNN +F 1 "+FPGA_VCCAUX_1V8" H 9900 4220 30 0000 C CNN +F 2 "" H 9900 4290 70 0000 C CNN +F 3 "" H 9900 4290 70 0000 C CNN + 1 9900 4290 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2200 9350 1980 9350 +Wire Wire Line + 2200 9350 2200 9570 +Wire Wire Line + 2200 9240 1980 9240 +Wire Wire Line + 2200 9240 2200 9350 +Wire Wire Line + 2200 8800 1980 8800 +Wire Wire Line + 2200 8800 2200 8910 +Wire Wire Line + 2200 8910 2200 9020 +Wire Wire Line + 2200 9020 2200 9130 +Wire Wire Line + 2200 9130 2200 9240 +Wire Wire Line + 2200 8910 1980 8910 +Wire Wire Line + 2200 9020 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\ No newline at end of file diff --git a/rev03-KiCad/rev02_22-cache.lib b/rev03-KiCad/rev02_22-cache.lib new file mode 100644 index 0000000..7ada792 --- /dev/null +++ b/rev03-KiCad/rev02_22-cache.lib @@ -0,0 +1,102 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# FPGA_VCCINT_1V0 +# +DEF FPGA_VCCINT_1V0 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FPGA_VCCINT_1V0" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FPGA_VCCINT_1V0 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# FPGA_VCCAUX_1V8 +# +DEF FPGA_VCCAUX_1V8 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "FPGA_VCCAUX_1V8" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X FPGA_VCCAUX_1V8 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0603 +# +DEF C-EUC0603 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC1210 +# +DEF C-EUC1210 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# CP_E-035X080 +# +DEF CP_E-035X080 IC 0 40 Y Y 1 F N +F0 "C" 132 22 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 0 22 0 +P 2 0 1 10 22 0 22 77 +P 2 0 1 10 22 -66 22 0 +P 2 0 1 10 -22 0 -22 0 +P 2 0 1 10 -110 0 -22 0 +A -132 11 99 -382 -4 1 1 20 N -54 -50 -33 10 +A -132 0 99 0 374 1 1 20 N -33 0 -53 60 +X - 2 -121 0 11 R 1 1 0 1 P +X + 1 121 0 11 L 1 1 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_22.sch b/rev03-KiCad/rev02_22.sch new file mode 100644 index 0000000..be9aa31 --- /dev/null +++ b/rev03-KiCad/rev02_22.sch @@ -0,0 +1,1261 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 24 27 +Title "rev02_22" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 7700 4730 0 60 ~ 12 +<-- Place small 0.47 uF caps right under the BGA package\n<-- Place medium 4.7 uF caps very close to the BGA\n package\n<-- Place large 47 uF and 330 uF caps not far\n from the BGA package\n<-- Distribute smaller caps evenly under the BGA package\n<-- Distribute larger caps evenly around the BGA package +Text Notes 3080 3520 0 60 ~ 12 +*) Decoupling capacitors for VCCINT and VCCBRAM +Text Notes 7260 8250 0 60 ~ 12 +<-- Place small 0.47 uF caps right under the BGA package\n<-- Place medium 4.7 uF caps very close to the BGA package\n<-- Place large 47 uF caps not far from the BGA package\n<-- Try to place smaller caps next to FPGA balls +Text Notes 3080 7150 0 60 ~ 12 +*) Decoupling capacitors for VCCAUX +Text Notes 9482 10109 0 48 ~ 12 +FPGA CORE and AUX capacitors +Text Notes 4136 4059 0 60 ~ 12 +C140 +Text Notes 4136 4279 0 60 ~ 12 +4.7uF +Text Notes 1496 6039 0 60 ~ 12 +C125 +Text Notes 1496 6259 0 60 ~ 12 +0.47uF +Text Notes 2816 4059 0 60 ~ 12 +C133 +Text Notes 2816 4279 0 60 ~ 12 +47uF +Text Notes 1496 5049 0 60 ~ 12 +C124 +Text Notes 1496 5269 0 60 ~ 12 +0.47uF +Text Notes 2046 5049 0 60 ~ 12 +C128 +Text Notes 2046 5269 0 60 ~ 12 +0.47uF +Text Notes 2596 5049 0 60 ~ 12 +C130 +Text Notes 2596 5269 0 60 ~ 12 +0.47uF +Text Notes 3146 5049 0 60 ~ 12 +C134 +Text Notes 3146 5269 0 60 ~ 12 +0.47uF +Text Notes 2046 6039 0 60 ~ 12 +C129 +Text Notes 2046 6259 0 60 ~ 12 +0.47uF +Text Notes 2596 6039 0 60 ~ 12 +C131 +Text Notes 2596 6259 0 60 ~ 12 +0.47uF +Text Notes 3146 6039 0 60 ~ 12 +C135 +Text Notes 3146 6259 0 60 ~ 12 +0.47uF +Text Notes 3696 6039 0 60 ~ 12 +C138 +Text Notes 3696 6259 0 60 ~ 12 +0.47uF +Text Notes 4246 6039 0 60 ~ 12 +C142 +Text Notes 4246 6259 0 60 ~ 12 +0.47uF +Text Notes 4796 6039 0 60 ~ 12 +C146 +Text Notes 4796 6259 0 60 ~ 12 +0.47uF +Text Notes 5346 6039 0 60 ~ 12 +C150 +Text Notes 5346 6259 0 60 ~ 12 +0.47uF +Text Notes 5896 6039 0 60 ~ 12 +C154 +Text Notes 5896 6259 0 60 ~ 12 +0.47uF +Text Notes 6446 6039 0 60 ~ 12 +C158 +Text Notes 6446 6259 0 60 ~ 12 +0.47uF +Text Notes 6996 6039 0 60 ~ 12 +C162 +Text Notes 6996 6259 0 60 ~ 12 +0.47uF +Text Notes 7546 6039 0 60 ~ 12 +C163 +Text Notes 7546 6259 0 60 ~ 12 +0.47uF +Text Notes 4466 7799 0 60 ~ 12 +C143 +Text Notes 4466 8019 0 60 ~ 12 +0.47uF +Text Notes 5016 7799 0 60 ~ 12 +C147 +Text Notes 5016 8019 0 60 ~ 12 +0.47uF +Text Notes 5566 7799 0 60 ~ 12 +C151 +Text Notes 5566 8019 0 60 ~ 12 +0.47uF +Text Notes 6116 7799 0 60 ~ 12 +C155 +Text Notes 6116 8019 0 60 ~ 12 +0.47uF +Text Notes 6666 7799 0 60 ~ 12 +C159 +Text Notes 6666 8019 0 60 ~ 12 +0.47uF +Text Notes 8096 6039 0 60 ~ 12 +C164 +Text Notes 8096 6259 0 60 ~ 12 +0.47uF +Text Notes 4686 4059 0 60 ~ 12 +C144 +Text Notes 4686 4279 0 60 ~ 12 +4.7uF +Text Notes 5236 4059 0 60 ~ 12 +C148 +Text Notes 5236 4279 0 60 ~ 12 +4.7uF +Text Notes 5786 4059 0 60 ~ 12 +C152 +Text Notes 5786 4279 0 60 ~ 12 +4.7uF +Text Notes 6336 4059 0 60 ~ 12 +C156 +Text Notes 6336 4279 0 60 ~ 12 +4.7uF +Text Notes 6886 4059 0 60 ~ 12 +C160 +Text Notes 6886 4279 0 60 ~ 12 +4.7uF +Text Notes 4136 5049 0 60 ~ 12 +C141 +Text Notes 4136 5269 0 60 ~ 12 +4.7uF +Text Notes 4686 5049 0 60 ~ 12 +C145 +Text Notes 4686 5269 0 60 ~ 12 +4.7uF +Text Notes 5236 5049 0 60 ~ 12 +C149 +Text Notes 5236 5269 0 60 ~ 12 +4.7uF +Text Notes 5786 5049 0 60 ~ 12 +C153 +Text Notes 5786 5269 0 60 ~ 12 +4.7uF +Text Notes 6336 5049 0 60 ~ 12 +C157 +Text Notes 6336 5269 0 60 ~ 12 +4.7uF +Text Notes 6886 5049 0 60 ~ 12 +C161 +Text Notes 6886 5269 0 60 ~ 12 +4.7uF +Text Notes 2596 7799 0 60 ~ 12 +C132 +Text Notes 2596 8019 0 60 ~ 12 +4.7uF +Text Notes 3146 7799 0 60 ~ 12 +C136 +Text Notes 3146 8019 0 60 ~ 12 +4.7uF +Text Notes 3696 7799 0 60 ~ 12 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1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023ECD +U 1 1 58023ECD +P 3080 5390 +F 0 "GND_150" H 3080 5390 20 0000 C CNN +F 1 "+GND" H 3080 5320 30 0000 C CNN +F 2 "" H 3080 5390 70 0000 C CNN +F 3 "" H 3080 5390 70 0000 C CNN + 1 3080 5390 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023ECC +U 1 1 58023ECC +P 2530 5390 +F 0 "GND_151" H 2530 5390 20 0000 C CNN +F 1 "+GND" H 2530 5320 30 0000 C CNN +F 2 "" H 2530 5390 70 0000 C CNN +F 3 "" H 2530 5390 70 0000 C CNN + 1 2530 5390 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023ECB +U 1 1 58023ECB +P 1980 5390 +F 0 "GND_152" H 1980 5390 20 0000 C CNN +F 1 "+GND" H 1980 5320 30 0000 C CNN +F 2 "" H 1980 5390 70 0000 C CNN +F 3 "" H 1980 5390 70 0000 C CNN + 1 1980 5390 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023ECA +U 1 1 58023ECA +P 1430 5390 +F 0 "GND_153" H 1430 5390 20 0000 C CNN +F 1 "+GND" H 1430 5320 30 0000 C CNN +F 2 "" H 1430 5390 70 0000 C CNN +F 3 "" H 1430 5390 70 0000 C CNN + 1 1430 5390 + 1 0 0 -1 +$EndComp +$Comp +L GND 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\ No newline at end of file diff --git a/rev03-KiCad/rev02_23-cache.lib b/rev03-KiCad/rev02_23-cache.lib new file mode 100644 index 0000000..d144a02 --- /dev/null +++ b/rev03-KiCad/rev02_23-cache.lib @@ -0,0 +1,68 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCCO_3V3 +# +DEF VCCO_3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCCO_3V3" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCCO_3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0603 +# +DEF C-EUC0603 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC1210 +# +DEF C-EUC1210 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_23.sch b/rev03-KiCad/rev02_23.sch new file mode 100644 index 0000000..3d0ab4f --- /dev/null +++ b/rev03-KiCad/rev02_23.sch @@ -0,0 +1,1195 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 25 27 +Title "rev02_23" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 7260 4400 0 60 ~ 12 +<-- Place small 0.47 uF caps right under the BGA package\n<-- Place medium 4.7 uF caps very close to the BGA package\n<-- Place large 47 uF caps not far from the BGA package\n<-- Place one of four 47 uF caps on every side of the BGA p.\n<-- Distribute six sets of caps among six FPGA I/O banks +Text Notes 2750 3410 0 60 ~ 12 +*) Decoupling capacitors for VCCO +Text Notes 9339 10120 0 54 ~ 12 +FPGA VCCO bypass capacitors +Text Notes 5126 3949 0 60 ~ 12 +C181 +Text Notes 5126 4169 0 60 ~ 12 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+$Comp +L C-EUC0603 IC359 +U 1 1 58023E4C + 1 4290 3960 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC360 +U 1 1 58023E4B + 1 4290 4950 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC361 +U 1 1 58023E4A + 1 3740 4950 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC362 +U 1 1 58023E49 + 1 3740 5940 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC363 +U 1 1 58023E48 + 1 6160 3960 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC364 +U 1 1 58023E47 + 1 4290 5940 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC365 +U 1 1 58023E46 + 1 4290 6930 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC366 +U 1 1 58023E45 + 1 3740 6930 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC367 +U 1 1 58023E44 + 1 3740 7920 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC368 +U 1 1 58023E43 + 1 4290 7920 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC369 +U 1 1 58023E42 + 1 4290 8910 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0603 IC370 +U 1 1 58023E41 + 1 3740 8910 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC371 +U 1 1 58023E40 + 1 1100 3960 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC372 +U 1 1 58023E3F + 1 1650 3960 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC373 +U 1 1 58023E3E + 1 2200 3960 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC374 +U 1 1 58023E3D + 1 6710 3960 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC375 +U 1 1 58023E3C + 1 2750 3960 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC376 +U 1 1 58023E3B + 1 5060 4950 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC377 +U 1 1 58023E3A + 1 5610 4950 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC378 +U 1 1 58023E39 + 1 6160 4950 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC379 +U 1 1 58023E38 + 1 6710 4950 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 IC380 +U 1 1 58023E37 + 1 5060 5940 + 1 0 0 -1 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_24-cache.lib b/rev03-KiCad/rev02_24-cache.lib new file mode 100644 index 0000000..da964b0 --- /dev/null +++ b/rev03-KiCad/rev02_24-cache.lib @@ -0,0 +1,167 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCC_5V0 +# +DEF VCC_5V0 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCC_5V0" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCC_5V0 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# BLM31PG330SN1_1206 +# +DEF BLM31PG330SN1_1206 IC 0 40 Y Y 1 F N +F0 "FB" -165 220 60 H V L BNN +F1 "BLM31PG330SN1_1206" -165 -110 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -110 55 110 165 0 1 10 f +X 1 1 -220 110 110 R 70 1 0 1 P +X 2 2 220 110 110 L 70 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "C" -660 -55 60 H V L BNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC1210 +# +DEF C-EUC1210 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# EN5364QI +# +DEF EN5364QI IC 0 40 Y Y 1 F N +F0 "U" -495 2552 60 H V L BNN +F1 "EN5364QI" 121 2563 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +X NC 15 990 -1100 220 L 70 70 0 1 P +X NC 16 990 -1100 220 L 70 70 0 1 P +X NC 17 990 -1100 220 L 70 70 0 1 P +X NC 18 990 -1100 220 L 70 70 0 1 P +X NC 19 990 -1100 220 L 70 70 0 1 P +X NC 20 990 -1100 220 L 70 70 0 1 P +X NC 21 990 -1100 220 L 70 70 0 1 P +X NC 22 990 -1100 220 L 70 70 0 1 P +X NC 23 990 -1100 220 L 70 70 0 1 P +X NC 24 990 -1100 220 L 70 70 0 1 P +X NC 25 990 -1100 220 L 70 70 0 1 P +X NC 26 990 -1100 220 L 70 70 0 1 P +X NC 44 990 -1100 220 L 70 70 0 1 P +X NC 45 990 -1100 220 L 70 70 0 1 P +X NC 46 990 -1100 220 L 70 70 0 1 P +X NC 47 990 -1100 220 L 70 70 0 1 P +X PGND 2 330 -1980 220 U 70 70 0 1 W +X PGND 3 330 -1980 220 U 70 70 0 1 W +X PGND 4 330 -1980 220 U 70 70 0 1 W +X PGND 27 330 -1980 220 U 70 70 0 1 W +X PGND 28 330 -1980 220 U 70 70 0 1 W +X PGND 29 330 -1980 220 U 70 70 0 1 W +X PGND 30 330 -1980 220 U 70 70 0 1 W +X PGND 31 330 -1980 220 U 70 70 0 1 W +X PGND 32 330 -1980 220 U 70 70 0 1 W +X PGND 33 330 -1980 220 U 70 70 0 1 W +X PGND 64 330 -1980 220 U 70 70 0 1 W +X PGND 65 330 -1980 220 U 70 70 0 1 W +X PGND 66 330 -1980 220 U 70 70 0 1 W +X PGND 67 330 -1980 220 U 70 70 0 1 W +X PGND 68 330 -1980 220 U 70 70 0 1 W +X PGND PAD69 330 -1980 220 U 70 70 0 1 W +X PGND PAD70 330 -1980 220 U 70 70 0 1 W +P 2 0 1 10 -660 -1760 -660 2530 +P 2 0 1 10 770 -1760 -660 -1760 +P 2 0 1 10 770 2530 770 -1760 +P 2 0 1 10 -660 2530 770 2530 +X PVIN 43 -880 1430 220 R 70 70 0 1 W +X AVIN 53 -880 1210 220 R 70 70 0 1 W +X ENABLE 52 -880 990 220 R 70 70 0 1 P +X PGND 1 330 -1980 220 U 1 70 0 1 W +X SS 59 -880 -1540 220 R 70 70 0 1 P +X AGND 55 -220 -1980 220 U 70 70 0 1 W +X VOUT 13 990 1430 220 L 70 70 0 1 W +X VFB 56 990 770 220 L 70 70 0 1 P +X S_IN 49 -880 110 220 R 70 70 0 1 P +X S_OUT 48 990 -440 220 L 70 70 0 1 O +X EN_PB 51 -880 770 220 R 70 70 0 1 P +X POK 54 990 -1540 220 L 70 70 0 1 O +X EAOUT 57 990 -660 220 L 70 70 0 1 O +X OCP_ADJ 58 -880 -1100 220 R 70 70 0 1 P +X MAR1 61 -880 -330 220 R 70 70 0 1 P +X MAR2 62 -880 -550 220 R 70 70 0 1 P +X VSENSE 63 990 110 220 L 70 70 0 1 P +X S_DELAY 60 -880 -110 220 R 70 70 0 1 P +X M/S 50 -880 330 220 R 70 70 0 1 P +X NC 14 990 -1100 220 L 1 70 0 1 P +X VOUT 12 990 1540 220 L 70 70 0 1 W +X VOUT 11 990 1650 220 L 70 70 0 1 W +X VOUT 5 990 2310 220 L 70 70 0 1 W +X VOUT 6 990 2200 220 L 70 70 0 1 W +X VOUT 7 990 2090 220 L 70 70 0 1 W +X VOUT 8 990 1980 220 L 70 70 0 1 W +X VOUT 9 990 1870 220 L 70 70 0 1 W +X VOUT 10 990 1760 220 L 70 70 0 1 W +X PVIN 40 -880 1760 220 R 70 70 0 1 W +X PVIN 41 -880 1650 220 R 70 70 0 1 W +X PVIN 42 -880 1540 220 R 70 70 0 1 W +X PVIN 39 -880 1870 220 R 70 70 0 1 W +X PVIN 38 -880 1980 220 R 70 70 0 1 W +X PVIN 35 -880 2310 220 R 70 70 0 1 W +X PVIN 36 -880 2200 220 R 70 70 0 1 W +X PVIN 37 -880 2090 220 R 70 70 0 1 W +X PVIN 34 -880 2420 220 R 70 70 0 1 W +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_24.sch b/rev03-KiCad/rev02_24.sch new file mode 100644 index 0000000..3e14445 --- /dev/null +++ b/rev03-KiCad/rev02_24.sch @@ -0,0 +1,450 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 26 27 +Title "rev02_24" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 4730 3410 0 60 ~ 12 +*) FPGA Power Subsystem -- CORE +Text Notes 7865 4741 0 60 ~ 12 +*) VCCINT = 0.6V x (1 + 150 / 226) = 0.998V\n*) OCP_ADJ is not used (default over-current threshold)\n*) MARx are not used (output at nominal 100%)\n*) S_IN/S_OUT are not used (single regulator mode)\n*) S_DELAY is not used (single regulator mode)\n*) M/S is not used (parallel operation not needed)\n*) EA_OUT is not used (default control loop)\n*) Minimal load current is 0A, but we still place\nload of 100 Ohms just in case (gives 10 mA) +Text Notes 9372 10120 0 54 ~ 12 +FPGA CORE voltage regulators +Text Notes 3157 6248 0 60 ~ 12 +R66 +Text Label 3157 6347 0 70 ~ +4.7k +Text Notes 2046 6149 0 60 ~ 12 +C205 +Text Notes 2046 6369 0 60 ~ 12 +22~uF +Text Notes 2486 6149 0 60 ~ 12 +C206 +Text Notes 2486 6369 0 60 ~ 12 +22~uF +Text Notes 6226 6193 0 60 ~ 12 +R68 +Text Label 6215 6303 0 70 ~ +150k +Text Notes 6215 6886 0 60 ~ 12 +R69 +Text Label 6215 6985 0 70 ~ +226k +Text Notes 6963 6149 0 60 ~ 12 +C208 +Text Notes 6963 6248 0 60 ~ 12 +27pF +Text Notes 8459 6699 0 60 ~ 12 +R70 +Text Label 8470 6809 0 70 ~ +100 +Text Notes 5786 6908 0 60 ~ 12 +R67 +Text Label 5786 6996 0 70 ~ +0 +Text Notes 7326 6699 0 60 ~ 12 +C209 +Text Notes 7326 6919 0 60 ~ 12 +47uF +Text Notes 7876 6699 0 60 ~ 12 +C210 +Text Notes 7876 6919 0 60 ~ 12 +47uF +$Comp +L GND #PWR?58023E36 +U 1 1 58023E36 +P 4620 9350 +F 0 "GND_216" H 4620 9350 20 0000 C CNN +F 1 "+GND" H 4620 9280 30 0000 C CNN +F 2 "" H 4620 9350 70 0000 C CNN +F 3 "" H 4620 9350 70 0000 C CNN + 1 4620 9350 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E35 +U 1 1 58023E35 +P 5170 9350 +F 0 "GND_217" H 5170 9350 20 0000 C CNN +F 1 "+GND" H 5170 9280 30 0000 C CNN +F 2 "" H 5170 9350 70 0000 C CNN +F 3 "" H 5170 9350 70 0000 C CNN + 1 5170 9350 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E34 +U 1 1 58023E34 +P 3740 9350 +F 0 "GND_218" H 3740 9350 20 0000 C CNN +F 1 "+GND" H 3740 9280 30 0000 C CNN +F 2 "" H 3740 9350 70 0000 C CNN +F 3 "" H 3740 9350 70 0000 C CNN + 1 3740 9350 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E33 +U 1 1 58023E33 +P 1980 6600 +F 0 "GND_219" H 1980 6600 20 0000 C CNN +F 1 "+GND" H 1980 6530 30 0000 C CNN +F 2 "" H 1980 6600 70 0000 C CNN +F 3 "" H 1980 6600 70 0000 C CNN + 1 1980 6600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E32 +U 1 1 58023E32 +P 2420 6600 +F 0 "GND_220" H 2420 6600 20 0000 C CNN +F 1 "+GND" H 2420 6530 30 0000 C CNN +F 2 "" H 2420 6600 70 0000 C CNN +F 3 "" H 2420 6600 70 0000 C CNN + 1 2420 6600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E31 +U 1 1 58023E31 +P 6490 7260 +F 0 "GND_221" H 6490 7260 20 0000 C CNN +F 1 "+GND" H 6490 7190 30 0000 C CNN +F 2 "" H 6490 7260 70 0000 C CNN +F 3 "" H 6490 7260 70 0000 C CNN + 1 6490 7260 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E30 +U 1 1 58023E30 +P 7260 7260 +F 0 "GND_222" H 7260 7260 20 0000 C CNN +F 1 "+GND" H 7260 7190 30 0000 C CNN +F 2 "" H 7260 7260 70 0000 C CNN +F 3 "" H 7260 7260 70 0000 C CNN + 1 7260 7260 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E2F +U 1 1 58023E2F +P 7810 7260 +F 0 "GND_223" H 7810 7260 20 0000 C CNN +F 1 "+GND" H 7810 7190 30 0000 C CNN +F 2 "" H 7810 7260 70 0000 C CNN +F 3 "" H 7810 7260 70 0000 C CNN + 1 7810 7260 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E2E +U 1 1 58023E2E +P 8360 7260 +F 0 "GND_224" H 8360 7260 20 0000 C CNN +F 1 "+GND" H 8360 7190 30 0000 C CNN +F 2 "" H 8360 7260 70 0000 C CNN +F 3 "" H 8360 7260 70 0000 C CNN + 1 8360 7260 + 1 0 0 -1 +$EndComp +$Comp +L VCC_5V0 #PWR?58023E2D +U 1 1 58023E2D +P 1760 5720 +F 0 "VCC_5V0_3" H 1760 5720 20 0000 C CNN +F 1 "+VCC_5V0" H 1760 5650 30 0000 C CNN +F 2 "" H 1760 5720 70 0000 C CNN +F 3 "" H 1760 5720 70 0000 C CNN + 1 1760 5720 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3740 9240 3740 9350 +Wire Wire Line + 1980 6380 1980 6600 +Wire Wire Line + 2420 6380 2420 6600 +Wire Wire Line + 6490 7150 6490 7260 +Wire Wire Line + 7260 6930 7260 7260 +Wire Wire Line + 7810 6930 7810 7260 +Wire Wire Line + 8360 7040 8360 7260 +Wire Wire Line + 9130 5940 8910 5940 +Text Label 9130 5940 0 70 ~ +FPGA_VCCINT_1V0 +Wire Wire Line + 1760 5720 1760 5940 +Wire Wire Line + 3740 5940 3740 6160 +Wire Wire Line + 3960 5940 3740 5940 +Wire Wire Line + 3960 6160 3740 6160 +Wire Wire Line + 3740 5940 3080 5940 +Wire Wire Line + 3080 5940 2420 5940 +Wire Wire Line + 2420 5940 1980 5940 +Wire Wire Line + 1980 5940 1980 6050 +Wire Wire Line + 2420 5940 2420 6050 +Wire Wire Line + 3080 5940 3080 6050 +Wire Wire Line + 1980 5940 1760 5940 +Connection ~ 3740 5940 +Connection ~ 2420 5940 +Connection ~ 3080 5940 +Connection ~ 1980 5940 +Wire Wire Line + 6160 8910 5830 8910 +Text Label 5885 8910 0 70 ~ +POK_VCCINT +Wire Wire Line + 3960 8910 3740 8910 +Wire Wire Line + 3960 6600 3080 6600 +Wire Wire Line + 3080 6490 3080 6600 +Wire Wire Line + 3960 6380 3520 6380 +Wire Wire Line + 3520 5390 3520 6380 +Wire Wire Line + 3520 5390 2970 5390 +Text Label 2970 5390 0 70 ~ +PWR_ENA_VCCINT +Wire Wire Line + 6050 7260 5830 7260 +Wire Wire Line + 6050 7150 6050 7260 +Wire Wire Line + 6050 5940 6050 6710 +Wire Wire Line + 6050 5940 5830 5940 +Wire Wire Line + 6490 5940 6050 5940 +Wire Wire Line + 6490 5940 6490 6050 +Wire Wire Line + 6820 5940 6490 5940 +Wire Wire Line + 6820 5940 6820 6050 +Wire Wire Line + 7260 5940 7260 6600 +Wire Wire Line + 7260 5940 6820 5940 +Wire Wire Line + 7810 5940 7810 6600 +Wire Wire Line + 7810 5940 7260 5940 +Wire Wire Line + 8360 5940 8360 6600 +Wire Wire Line + 8360 5940 7810 5940 +Wire Wire Line + 8470 5940 8360 5940 +Connection ~ 6050 5940 +Connection ~ 6490 5940 +Connection ~ 6820 5940 +Connection ~ 7260 5940 +Connection ~ 7810 5940 +Connection ~ 8360 5940 +Wire Wire Line + 6490 6600 5830 6600 +Wire Wire Line + 6490 6490 6490 6600 +Wire Wire Line + 6490 6600 6490 6710 +Wire Wire Line + 6820 6600 6490 6600 +Wire Wire Line + 6820 6380 6820 6600 +Connection ~ 6490 6600 +Wire Wire Line + 3960 5060 3960 4950 +Wire Wire Line + 3960 5170 3960 5060 +Wire Wire Line + 3960 5280 3960 5170 +Wire Wire Line + 3960 5390 3960 5280 +Wire Wire Line + 3960 5500 3960 5390 +Wire Wire Line + 3960 5610 3960 5500 +Wire Wire Line + 3960 5720 3960 5610 +Wire Wire Line + 3960 5830 3960 5720 +Wire Wire Line + 3960 5940 3960 5830 +Wire Wire Line + 5830 5170 5830 5060 +Wire Wire Line + 5830 5280 5830 5170 +Wire Wire Line + 5830 5390 5830 5280 +Wire Wire Line + 5830 5500 5830 5390 +Wire Wire Line + 5830 5610 5830 5500 +Wire Wire Line + 5830 5720 5830 5610 +Wire Wire Line + 5830 5830 5830 5720 +Wire Wire Line + 5830 5940 5830 5830 +Text Notes 3080 9207 0 60 ~ 12 +0.047~uF +Connection ~ 3960 5940 +Connection ~ 3960 5830 +Connection ~ 3960 5720 +Connection ~ 3960 5610 +Connection ~ 3960 5500 +Connection ~ 3960 5390 +Connection ~ 3960 5280 +Connection ~ 3960 5170 +Connection ~ 3960 5060 +Connection ~ 5830 5940 +Connection ~ 5830 5830 +Connection ~ 5830 5720 +Connection ~ 5830 5610 +Connection ~ 5830 5500 +Connection ~ 5830 5390 +Connection ~ 5830 5280 +Connection ~ 5830 5170 +$Comp +L R-EU_R0402 IC381 +U 1 1 58023E2C + 1 3080 6270 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC1210 IC382 +U 1 1 58023E2B + 1 7260 6710 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC383 +U 1 1 58023E2A + 1 7810 6710 + 1 0 0 -1 +$EndComp +$Comp +L EN5364QI U16 +U 1 1 58023E29 +F 0 "U16" H 4345 9922 60 0000 L BNN +F 1 "EN5364QI" H 4961 9933 60 0000 L BNN +F 2 "" H 4961 9933 60 0000 C CNN +F 3 "" H 4961 9933 60 0000 C CNN + 1 4840 7370 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC0402 C207 +U 1 1 58023E28 +F 0 "C207" H 3080 8965 60 0000 L BNN + 1 3740 9020 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC386 +U 1 1 58023E27 + 1 1980 6160 + 1 0 0 -1 +$EndComp +$Comp +L C-EUC1210 IC387 +U 1 1 58023E26 + 1 2420 6160 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC388 +U 1 1 58023E25 + 1 6490 6270 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC389 +U 1 1 58023E24 + 1 6490 6930 + 0 -1 -1 0 +$EndComp +$Comp +L C-EUC0402 IC390 +U 1 1 58023E23 + 1 6820 6160 + 1 0 0 -1 +$EndComp +$Comp +L BLM31PG330SN1_1206 FB7 +U 1 1 58023E22 +F 0 "FB7" H 8525 6270 60 0000 L BNN +F 1 "BLM31PG330SN1" H 8525 5940 60 0000 L BNN +F 2 "" H 8525 5940 60 0000 C CNN +F 3 "" H 8525 5940 60 0000 C CNN + 1 8690 6050 + 1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC392 +U 1 1 58023E21 + 1 8360 6820 + 0 -1 -1 0 +$EndComp +$Comp +L R-EU_R0402 IC393 +U 1 1 58023E20 + 1 6050 6930 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC
\ No newline at end of file diff --git a/rev03-KiCad/rev02_25-cache.lib b/rev03-KiCad/rev02_25-cache.lib new file mode 100644 index 0000000..2ec3d13 --- /dev/null +++ b/rev03-KiCad/rev02_25-cache.lib @@ -0,0 +1,130 @@ +EESchema-LIBRARY Version 2.3 Date: 15.10.2016 16:44:47 +#encoding utf-8 +# VCC_5V0 +# +DEF VCC_5V0 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCC_5V0" 0 150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VCC_5V0 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# 2N7002 +# +DEF 2N7002 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "2N7002" -682 -77 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 -55 -110 -110 -110 +P 2 0 1 10 0 0 0 33 +P 2 0 1 10 0 -33 0 0 +P 2 0 1 10 0 55 0 154 +P 2 0 1 10 22 0 77 22 +P 2 0 1 10 22 0 77 -33 +P 2 0 1 10 22 0 0 0 +P 2 0 1 10 110 0 22 0 +P 2 0 1 10 110 -110 110 0 +P 2 0 1 10 0 -165 0 -66 +P 2 0 1 10 -55 -110 -55 110 +X D 3 220 110 220 L 1 1 0 1 P +X S 2 220 -110 220 L 1 1 0 1 P +X G 1 -220 -110 110 R 1 1 0 1 P +ENDDRAW +ENDDEF +# +# BAT54 +# +DEF BAT54 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "BAT54" -66 99 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 55 0 -55 -55 +P 2 0 1 10 -55 55 55 0 +P 2 0 1 10 55 55 88 55 +P 2 0 1 10 55 0 55 55 +P 2 0 1 10 -55 -55 -55 55 +P 2 0 1 10 55 -55 55 0 +P 2 0 1 10 88 44 88 55 +P 2 0 1 10 33 -55 55 -55 +P 2 0 1 10 33 -55 33 -44 +X A 1 -110 0 110 R 1 1 0 1 P +X C 3 110 0 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +# +# C-EUC0402 +# +DEF C-EUC0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -22 0 0 +P 2 0 1 10 0 -88 0 -110 +S -88 -88 88 -66 0 1 10 f +S -88 -44 88 -22 0 1 10 f +X 1 1 0 110 110 D 1 1 0 1 P +X 2 2 0 -220 110 U 1 1 0 1 P +ENDDRAW +ENDDEF +# +# LEDCHIP-LED0603 +# +DEF LEDCHIP-LED0603 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "LEDCHIP-LED0603" 154 -209 60 H V L BNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 0 -110 55 0 +P 2 0 1 10 -55 0 0 -110 +P 2 0 1 10 0 -110 55 -110 +P 2 0 1 10 -55 -110 0 -110 +P 2 0 1 10 0 0 55 0 +P 2 0 1 10 -55 0 0 0 +P 2 0 1 10 0 -110 0 0 +P 2 0 1 10 -143 -99 -88 -33 +P 2 0 1 10 -143 -143 -77 -88 +P 4 0 1 10 -143 -99 -132 -55 -110 -77 -143 -99 F +P 4 0 1 10 -143 -143 -121 -110 -99 -132 -143 -143 F +X C 2 0 -220 110 U 1 1 0 1 P +X A 1 0 110 110 D 1 1 0 1 P +ENDDRAW +ENDDEF +# +# R-EU_R0402 +# +DEF R-EU_R0402 IC 0 40 Y Y 1 F N +F0 "IC" 0 0 60 H V C CNN +F1 "XC6SLX9-2CSG324C_1" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 10 110 -44 -110 -44 +P 2 0 1 10 -110 33 110 33 +P 2 0 1 10 110 33 110 -44 +P 2 0 1 10 -110 33 -110 -44 +X 2 2 220 0 110 L 1 1 0 1 P +X 1 1 -220 0 110 R 1 1 0 1 P +P 2 0 1 10 110 -33 -110 -33 +P 2 0 1 10 -110 44 110 44 +P 2 0 1 10 110 44 110 -33 +P 2 0 1 10 -110 44 -110 -33 +P 2 0 1 10 -110 -33 -110 44 +P 2 0 1 10 110 -33 110 44 +X 2 2 -220 0 110 R 1 1 0 1 P +X 1 1 220 0 110 L 1 1 0 1 P +ENDDRAW +ENDDEF +#End Library diff --git a/rev03-KiCad/rev02_25.sch b/rev03-KiCad/rev02_25.sch new file mode 100644 index 0000000..43fd7f0 --- /dev/null +++ b/rev03-KiCad/rev02_25.sch @@ -0,0 +1,422 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +EELAYER 27 0 +EELAYER END +$Descr B 17000 11000 +encoding utf-8 +Sheet 27 27 +Title "rev02_25" +Date "15 10 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 8910 4400 0 60 ~ 12 +*) Recommended power-up sequence:\n1) VCCINT\n2) VCCAUX\n3) VCCO\nRC network values are preliminary,\nshould be tweaked after experiments +Text Notes 4510 4730 0 60 ~ 12 +---> +Text Notes 9680 4730 0 60 ~ 12 +---> +Text Notes 660 8470 0 60 ~ 12 +---> +Text Notes 5610 8470 0 60 ~ 12 +---> +Text Notes 7150 9240 0 60 ~ 12 +*) "Power OK" LED, should be of green color +Text Notes 9570 10142 0 66 ~ 12 +FPGA power sequencing +Text Notes 2145 4675 0 60 ~ 12 +R72 +Text Label 2134 4895 0 70 ~ +100k +Text Notes 2134 4202 0 60 ~ 12 +D2 +Text Notes 6314 4455 1 60 ~ 12 +R75 +Text Label 6556 4466 1 70 ~ +4.7k +Text Notes 7095 4675 0 60 ~ 12 +R76 +Text Label 7095 4895 0 70 ~ +100k +Text Notes 7260 4202 0 60 ~ 12 +D4 +Text Notes 2354 8195 1 60 ~ 12 +R73 +Text Label 2585 8206 1 70 ~ +4.7k +Text Notes 3135 8415 0 60 ~ 12 +R74 +Text Label 3124 8635 0 70 ~ +100k +Text Notes 3179 7942 0 60 ~ 12 +D3 +Text Notes 7414 7755 1 60 ~ 12 +R77 +Text Label 7656 7744 1 70 ~ +4.7k +Text Notes 7689 8294 0 60 ~ 12 +Q6 +Text Notes 9042 7843 0 60 ~ 12 +LED18 +Text Notes 8899 7359 0 60 ~ 12 +R78 +Text Label 8899 7557 0 70 ~ +330 +Text Notes 2816 5049 0 60 ~ 12 +C211 +Text Label 3124 5038 0 70 ~ +0.1uF +Text Notes 3806 8789 0 60 ~ 12 +C212 +Text Label 4103 8778 0 70 ~ +0.1uF +Text Notes 7766 5049 0 60 ~ 12 +C213 +Text Label 8063 5038 0 70 ~ +0.1uF +$Comp +L GND #PWR?58023E1F +U 1 1 58023E1F +P 2750 5500 +F 0 "GND_225" H 2750 5500 20 0000 C CNN +F 1 "+GND" H 2750 5430 30 0000 C CNN +F 2 "" H 2750 5500 70 0000 C CNN +F 3 "" H 2750 5500 70 0000 C CNN + 1 2750 5500 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E1E +U 1 1 58023E1E +P 7700 5500 +F 0 "GND_226" H 7700 5500 20 0000 C CNN +F 1 "+GND" H 7700 5430 30 0000 C CNN +F 2 "" H 7700 5500 70 0000 C CNN +F 3 "" H 7700 5500 70 0000 C CNN + 1 7700 5500 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR?58023E1D +U 1 1 58023E1D +P 3740 9240 +F 0 "GND_227" H 3740 9240 20 0000 C CNN +F 1 "+GND" H 3740 9170 30 0000 C CNN +F 2 "" H 3740 9240 70 0000 C CNN +F 3 "" H 3740 9240 70 0000 C CNN + 1 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R-EU_R0402 IC406 +U 1 1 58023E0B + 1 3300 8470 + 1 0 0 -1 +$EndComp +$Comp +L BAT54 IC407 +U 1 1 58023E0A +F 1 "BAT54LT1G" H 3366 8129 60 0000 R BNN +F 2 "" H 3366 8129 60 0000 C CNN +F 3 "" H 3366 8129 60 0000 C CNN + 1 3300 8030 + -1 0 0 -1 +$EndComp +$Comp +L R-EU_R0402 IC408 +U 1 1 58023E09 + 1 7480 7590 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC
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