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authorFredrik Thulin <fredrik@thulin.net>2019-02-20 14:22:47 +0100
committerFredrik Thulin <fredrik@thulin.net>2019-02-20 14:22:47 +0100
commit2f668489efdcc74c64fe93ecfc323e1f0cc9460b (patch)
tree8a7241024ad037e6207b9dac6d89859b1cce3e27 /rev03-KiCad/rev02_12.sch
parent5dbcdd1de98fde9e21919c39b3eb07425a2f6c3c (diff)
don't add extra quotes around net names
Diffstat (limited to 'rev03-KiCad/rev02_12.sch')
-rw-r--r--rev03-KiCad/rev02_12.sch189
1 files changed, 93 insertions, 96 deletions
diff --git a/rev03-KiCad/rev02_12.sch b/rev03-KiCad/rev02_12.sch
index 938dd97..12d1bec 100644
--- a/rev03-KiCad/rev02_12.sch
+++ b/rev03-KiCad/rev02_12.sch
@@ -1,10 +1,9 @@
EESchema Schematic File Version 4
-LIBS:Cryptech Alpha-cache
EELAYER 26 0
EELAYER END
$Descr B 17000 11000
encoding utf-8
-Sheet 13 27
+Sheet 14 27
Title "rev02_12"
Date "15 10 2016"
Rev ""
@@ -14,19 +13,19 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
-Text Notes 12700 5600 0 42 ~ 8
+Text Notes 12700 5600 0 42 ~ 12
CS pull-up to disable MKM by\ndefault (allows programming\nof AVR)
-Text Notes 11400 3800 0 84 ~ 17
+Text Notes 11400 3800 0 84 ~ 12
Master Key Memory
-Text Notes 3400 2700 0 84 ~ 17
+Text Notes 3400 2700 0 84 ~ 12
SPI mux controlling access to the MKM.\nNormally, the FPGA has R/W access to the MKM but on a\ntamper event the tamper detect MCU (AVR) will grab access\nto the MKM and erase the contents.
-Text Notes 7800 6100 0 42 ~ 8
+Text Notes 7800 6100 0 42 ~ 12
Make AVR unable to read the\nMKM by installing this jumper
-Text Notes 3900 5900 0 42 ~ 8
+Text Notes 3900 5900 0 42 ~ 12
AVR access default\ndisabled through pull-up
-Text Notes 3800 7000 0 42 ~ 8
+Text Notes 3800 7000 0 42 ~ 12
FPGA access default\nenabled through pull-down
-Text Notes 13630 10230 0 84 ~ 17
+Text Notes 13630 10230 0 84 ~ 12
Master Key Memory
Text Notes 11890 4940 0 60 ~ 12
U12
@@ -45,10 +44,10 @@ IC4
Text Notes 5500 5900 0 60 ~ 12
74*244DW
$Comp
-L power:GND #GND_087
+L power:GND GND_87
U 1 1 58023F8C
P 11300 6500
-F 0 "#GND_087" H 11300 6500 20 0000 C CNN
+F 0 "GND_87" H 11300 6500 20 0000 C CNN
F 1 "+GND" H 11300 6430 30 0000 C CNN
F 2 "" H 11300 6500 70 0000 C CNN
F 3 "" H 11300 6500 70 0000 C CNN
@@ -56,10 +55,10 @@ F 3 "" H 11300 6500 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L Cryptech_Alpha:3V3_BATT #3V3_BATT_08
+L Cryptech_Alpha:3V3_BATT 3V3_BATT_8
U 1 1 58023F8B
P 11300 4200
-F 0 "#3V3_BATT_08" H 11300 4200 20 0000 C CNN
+F 0 "3V3_BATT_8" H 11300 4200 20 0000 C CNN
F 1 "+3V3_BATT" H 11300 4130 30 0000 C CNN
F 2 "" H 11300 4200 70 0000 C CNN
F 3 "" H 11300 4200 70 0000 C CNN
@@ -67,10 +66,10 @@ F 3 "" H 11300 4200 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L Cryptech_Alpha:3V3_BATT #3V3_BATT_09
+L Cryptech_Alpha:3V3_BATT 3V3_BATT_9
U 1 1 58023F8A
P 3300 4100
-F 0 "#3V3_BATT_09" H 3300 4100 20 0000 C CNN
+F 0 "3V3_BATT_9" H 3300 4100 20 0000 C CNN
F 1 "+3V3_BATT" H 3300 4030 30 0000 C CNN
F 2 "" H 3300 4100 70 0000 C CNN
F 3 "" H 3300 4100 70 0000 C CNN
@@ -78,10 +77,10 @@ F 3 "" H 3300 4100 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L Cryptech_Alpha:3V3_BATT #3V3_BATT_010
+L Cryptech_Alpha:3V3_BATT 3V3_BATT_10
U 1 1 58023F89
P 10800 4200
-F 0 "#3V3_BATT_010" H 10800 4200 20 0000 C CNN
+F 0 "3V3_BATT_10" H 10800 4200 20 0000 C CNN
F 1 "+3V3_BATT" H 10800 4130 30 0000 C CNN
F 2 "" H 10800 4200 70 0000 C CNN
F 3 "" H 10800 4200 70 0000 C CNN
@@ -89,10 +88,10 @@ F 3 "" H 10800 4200 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L power:GND #GND_088
+L power:GND GND_88
U 1 1 58023F88
P 11500 4700
-F 0 "#GND_088" H 11500 4700 20 0000 C CNN
+F 0 "GND_88" H 11500 4700 20 0000 C CNN
F 1 "+GND" H 11500 4630 30 0000 C CNN
F 2 "" H 11500 4700 70 0000 C CNN
F 3 "" H 11500 4700 70 0000 C CNN
@@ -100,10 +99,10 @@ F 3 "" H 11500 4700 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L power:GND #GND_089
+L power:GND GND_89
U 1 1 58023F87
P 7600 6400
-F 0 "#GND_089" H 7600 6400 20 0000 C CNN
+F 0 "GND_89" H 7600 6400 20 0000 C CNN
F 1 "+GND" H 7600 6330 30 0000 C CNN
F 2 "" H 7600 6400 70 0000 C CNN
F 3 "" H 7600 6400 70 0000 C CNN
@@ -111,10 +110,10 @@ F 3 "" H 7600 6400 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L power:GND #GND_090
+L power:GND GND_90
U 1 1 58023F86
P 3300 5200
-F 0 "#GND_090" H 3300 5200 20 0000 C CNN
+F 0 "GND_90" H 3300 5200 20 0000 C CNN
F 1 "+GND" H 3300 5130 30 0000 C CNN
F 2 "" H 3300 5200 70 0000 C CNN
F 3 "" H 3300 5200 70 0000 C CNN
@@ -122,10 +121,10 @@ F 3 "" H 3300 5200 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L power:GND #GND_091
+L power:GND GND_91
U 1 1 58023F85
P 5000 7500
-F 0 "#GND_091" H 5000 7500 20 0000 C CNN
+F 0 "GND_91" H 5000 7500 20 0000 C CNN
F 1 "+GND" H 5000 7430 30 0000 C CNN
F 2 "" H 5000 7500 70 0000 C CNN
F 3 "" H 5000 7500 70 0000 C CNN
@@ -133,10 +132,10 @@ F 3 "" H 5000 7500 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L Cryptech_Alpha:3V3_BATT #3V3_BATT_011
+L Cryptech_Alpha:3V3_BATT 3V3_BATT_11
U 1 1 58023F84
P 5000 4100
-F 0 "#3V3_BATT_011" H 5000 4100 20 0000 C CNN
+F 0 "3V3_BATT_11" H 5000 4100 20 0000 C CNN
F 1 "+3V3_BATT" H 5000 4030 30 0000 C CNN
F 2 "" H 5000 4100 70 0000 C CNN
F 3 "" H 5000 4100 70 0000 C CNN
@@ -144,10 +143,10 @@ F 3 "" H 5000 4100 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L Cryptech_Alpha:3V3_BATT #3V3_BATT_012
+L Cryptech_Alpha:3V3_BATT 3V3_BATT_12
U 1 1 58023F83
P 10100 4220
-F 0 "#3V3_BATT_012" H 10100 4220 20 0000 C CNN
+F 0 "3V3_BATT_12" H 10100 4220 20 0000 C CNN
F 1 "+3V3_BATT" H 10100 4150 30 0000 C CNN
F 2 "" H 10100 4220 70 0000 C CNN
F 3 "" H 10100 4220 70 0000 C CNN
@@ -178,7 +177,7 @@ Wire Wire Line
10800 5000 10800 5700
Wire Wire Line
11400 5600 10100 5600
-Text Label 10100 5600 0 48 ~ 0
+Text Label 10100 5600 0 48 ~
MKM_SCK
Wire Wire Line
6500 5300 6300 5300
@@ -188,11 +187,11 @@ Wire Wire Line
6500 6400 6300 6400
Wire Wire Line
7000 5300 6500 5300
-Text Label 7000 5300 0 48 ~ 0
+Text Label 7000 5300 0 48 ~
MKM_SCK
Wire Wire Line
11400 5500 10100 5500
-Text Label 10100 5500 0 48 ~ 0
+Text Label 10100 5500 0 48 ~
MKM_MOSI
Wire Wire Line
6600 6500 6300 6500
@@ -202,9 +201,11 @@ Wire Wire Line
6600 5400 6300 5400
Wire Wire Line
7000 5400 6600 5400
-Text Label 7000 5400 0 48 ~ 0
+Text Label 7000 5400 0 48 ~
MKM_MOSI
-Text Label 10140 5400 0 48 ~ 0
+Wire Wire Line
+ 11400 5400 10500 5400
+Text Label 10140 5400 0 48 ~
MKM_CS_N
Wire Wire Line
6400 6300 6300 6300
@@ -214,11 +215,11 @@ Wire Wire Line
6400 5200 6300 5200
Wire Wire Line
7000 5200 6400 5200
-Text Label 7000 5200 0 48 ~ 0
+Text Label 7000 5200 0 48 ~
MKM_CS_N
Wire Wire Line
13150 5200 12800 5200
-Text Label 13150 5200 2 48 ~ 0
+Text Label 13150 5200 2 48 ~ 0
MKM_MISO
Wire Wire Line
5300 6600 5200 6600
@@ -228,7 +229,7 @@ Wire Wire Line
5300 5500 5200 5500
Wire Wire Line
5200 5500 4800 5500
-Text Label 4800 5500 0 48 ~ 0
+Text Label 4800 5500 0 48 ~
MKM_MISO
Wire Wire Line
11400 5200 11300 5200
@@ -258,31 +259,31 @@ Wire Wire Line
5300 5700 5000 5700
Wire Wire Line
5000 5000 5000 5700
-Text GLabel 4550 5700 0 48 Input ~ 0
+Text GLabel 4550 5700 0 48 Input ~ 0
MKM_CONTROL_AVR_ENA
Wire Wire Line
5300 5300 4800 5300
-Text GLabel 4800 5300 0 48 Input ~ 0
+Text GLabel 4800 5300 0 48 Input ~ 0
MKM_AVR_SCK
Wire Wire Line
5300 6300 4610 6300
-Text GLabel 4610 6300 0 48 Input ~ 0
+Text GLabel 4610 6300 0 48 Input ~ 0
MKM_FPGA_CS_N
Wire Wire Line
5300 5200 4800 5200
-Text GLabel 4800 5200 0 48 Input ~ 0
+Text GLabel 4800 5200 0 48 Input ~ 0
MKM_AVR_CS_N
Wire Wire Line
5300 6500 4610 6500
-Text GLabel 4610 6500 0 48 Input ~ 0
+Text GLabel 4610 6500 0 48 Input ~ 0
MKM_FPGA_MOSI
Wire Wire Line
5300 5400 4800 5400
-Text GLabel 4800 5400 0 48 Input ~ 0
+Text GLabel 4800 5400 0 48 Input ~ 0
MKM_AVR_MOSI
Wire Wire Line
6500 6600 6300 6600
-Text GLabel 6500 6600 2 48 Output ~ 0
+Text GLabel 6500 6600 2 48 Output ~ 0
MKM_FPGA_MISO
Wire Wire Line
7600 5500 6300 5500
@@ -290,11 +291,11 @@ Wire Wire Line
7800 5500 7600 5500
Wire Wire Line
7600 5500 7600 5700
-Text GLabel 7800 5500 2 48 Output ~ 0
+Text GLabel 7800 5500 2 48 Output ~ 0
MKM_AVR_MISO
Wire Wire Line
5300 6400 4610 6400
-Text GLabel 4610 6400 0 48 Input ~ 0
+Text GLabel 4610 6400 0 48 Input ~ 0
MKM_FPGA_SCK
Wire Wire Line
5300 6800 5000 6800
@@ -302,20 +303,42 @@ Wire Wire Line
5000 6800 5000 7000
Wire Wire Line
5000 6800 4480 6800
-Text GLabel 4480 6800 0 48 Input ~ 0
+Text GLabel 4480 6800 0 48 Input ~ 0
MKM_CONTROL_FPGA_DIS
Wire Wire Line
10100 5400 10100 5020
+Wire Wire Line
+ 10500 5400 10100 5400
$Comp
L Cryptech_Alpha:23K640-I_SN U12
U 1 1 58023F82
P 12100 5600
F 0 "U12" H 11570 4670 60 0000 L BNN
-F 1 "~" H 12100 5600 50 0001 C CNN
-F 2 "Cryptech_Alpha_Footprints:SOIC127P600X175-8N" H 11570 4670 60 0001 C CNN
-F 3 "" H 12100 5600 50 0001 C CNN
1 12100 5600
- 1 0 0 -1
+ 1 0 0 -1
+F 2 "Cryptech_Alpha_Footprints:SOIC127P600X175-8N" H 11570 4670 60 0001 C CNN
+$EndComp
+$Comp
+L Cryptech_Alpha:74*244DW_2 IC4_2
+U 1 1 58023F81
+P 5800 6500
+F 0 "IC4_2" H 5470 5970 60 0000 L BNN
+F 1 "MC74AC244DW*" H 5510 6920 60 0000 L BNN
+F 2 "Cryptech_Alpha_Footprints:SO20W" H 5510 6920 60 0001 C CNN
+F 3 "" H 5510 6920 60 0000 C CNN
+ 1 5800 6500
+ 1 0 0 -1
+$EndComp
+$Comp
+L Cryptech_Alpha:74*244DW_3 IC4_3
+U 1 1 58023F80
+P 3300 4700
+F 0 "IC4_3" H 3330 4550 60 0000 L BNN
+F 1 "MC74AC244DW*" H 3480 4680 60 0000 L BNN
+F 2 "Cryptech_Alpha_Footprints:SO20W" H 3480 4680 60 0001 C CNN
+F 3 "" H 3480 4680 60 0000 C CNN
+ 1 3300 4700
+ 1 0 0 -1
$EndComp
$Comp
L Cryptech_Alpha:R-EU_R0402 R33
@@ -326,7 +349,7 @@ F 1 "4.7k" V 10830 4540 60 0000 L BNN
F 2 "Cryptech_Alpha_Footprints:R_0402" H 10830 4540 60 0001 C CNN
F 3 "" H 10830 4540 60 0000 C CNN
1 10800 4800
- 0 1 1 0
+ 0 1 1 0
$EndComp
$Comp
L Cryptech_Alpha:R-EU_R0402 R34
@@ -337,7 +360,7 @@ F 1 "4.7k" V 10080 5180 60 0000 R TNN
F 2 "Cryptech_Alpha_Footprints:R_0402" H 10080 5180 60 0001 C CNN
F 3 "" H 10080 5180 60 0000 C CNN
1 10100 4820
- 0 -1 -1 0
+ 0 -1 -1 0
$EndComp
$Comp
L Cryptech_Alpha:C-EUC0402 C106
@@ -348,7 +371,7 @@ F 1 "0.1uF" H 2490 4500 60 0000 L BNN
F 2 "Cryptech_Alpha_Footprints:C_0402" H 2490 4500 60 0001 C CNN
F 3 "" H 2490 4500 60 0000 C CNN
1 2900 4700
- 1 0 0 -1
+ 1 0 0 -1
$EndComp
$Comp
L Cryptech_Alpha:C-EUC0402 C107
@@ -359,18 +382,16 @@ F 1 "0.1uF" H 11600 4400 60 0000 L BNN
F 2 "Cryptech_Alpha_Footprints:C_0402" H 11600 4400 60 0001 C CNN
F 3 "" H 11600 4400 60 0000 C CNN
1 11500 4400
- 1 0 0 -1
+ 1 0 0 -1
$EndComp
$Comp
L Cryptech_Alpha:JP1Q JP6
U 1 1 58023F7B
P 7600 6000
F 0 "JP6" H 7705 6030 60 0000 L BNN
-F 1 "~" H 7600 6000 50 0001 C CNN
-F 2 "Cryptech_Alpha_Footprints:PLS-2" H 7705 6030 60 0001 C CNN
-F 3 "" H 7600 6000 50 0001 C CNN
1 7600 6000
- 1 0 0 -1
+ 1 0 0 -1
+F 2 "Cryptech_Alpha_Footprints:PLS-2" H 7705 6030 60 0001 C CNN
$EndComp
$Comp
L Cryptech_Alpha:R-EU_R0402 R80
@@ -381,7 +402,7 @@ F 1 "4.7k" V 4990 4690 60 0000 R TNN
F 2 "Cryptech_Alpha_Footprints:R_0402" H 4990 4690 60 0001 C CNN
F 3 "" H 4990 4690 60 0000 C CNN
1 5000 4800
- 0 -1 -1 0
+ 0 -1 -1 0
$EndComp
$Comp
L Cryptech_Alpha:R-EU_R0402 R81
@@ -392,42 +413,18 @@ F 1 "4.7k" V 5060 7310 60 0000 L BNN
F 2 "Cryptech_Alpha_Footprints:R_0402" H 5060 7310 60 0001 C CNN
F 3 "" H 5060 7310 60 0000 C CNN
1 5000 7200
- 0 1 1 0
-$EndComp
-NoConn ~ 11400 5900
-Wire Wire Line
- 10100 5400 11400 5400
-$Comp
-L Cryptech_Alpha:74*244DW IC4
-U 1 1 5AF9B7E3
-P 5800 5900
-F 0 "IC4" H 5800 6867 50 0000 C CNN
-F 1 "74*244DW" H 5800 6776 50 0000 C CNN
-F 2 "Cryptech_Alpha_Footprints:SO20W" H 5800 5900 50 0001 C CNN
-F 3 "" H 5800 5900 50 0001 C CNN
- 1 5800 5900
- 1 0 0 -1
-$EndComp
-$Comp
-L Cryptech_Alpha:74*244DW IC4
-U 2 1 5AF9B924
-P 5800 7000
-F 0 "IC4" H 5800 7967 50 0000 C CNN
-F 1 "74*244DW" H 5800 7876 50 0000 C CNN
-F 2 "Cryptech_Alpha_Footprints:SO20W" H 5800 7000 50 0001 C CNN
-F 3 "" H 5800 7000 50 0001 C CNN
- 2 5800 7000
- 1 0 0 -1
+ 0 1 1 0
$EndComp
$Comp
-L Cryptech_Alpha:74*244DW IC4
-U 3 1 5AF9B9F8
-P 3300 5150
-F 0 "IC4" H 3341 5646 50 0000 L CNN
-F 1 "74*244DW" H 3341 5555 50 0000 L CNN
-F 2 "Cryptech_Alpha_Footprints:SO20W" H 3300 5150 50 0001 C CNN
-F 3 "" H 3300 5150 50 0001 C CNN
- 3 3300 5150
- 1 0 0 -1
+L Cryptech_Alpha:74*244DW_1 IC4
+U 1 1 58023F78
+P 5800 5400
+F 0 "IC4" H 5470 4870 60 0000 L BNN
+F 1 "MC74AC244DW*" H 5500 5820 60 0000 L BNN
+F 2 "Cryptech_Alpha_Footprints:SO20W" H 5500 5820 60 0001 C CNN
+F 3 "" H 5500 5820 60 0000 C CNN
+ 1 5800 5400
+ 1 0 0 -1
$EndComp
-$EndSCHEMATC
+NoConn ~ 11400 5900
+$EndSCHEMATC \ No newline at end of file