path: root/rev03-KiCad/Cryptech Alpha.kicad_pcb

(kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-stable)

  (general
    (links 1412)
    (no_connects 695)
    (area -32.294113 -104.250001 148.466654 54.64848)
    (thickness 1.6)
    (drawings 7054)
    (tracks 9335)
    (zones 0)
    (modules 385)
    (nets 303)
  )

  (page A4)
  (layers
    (0 F.Cu signal)
    (1 In1.Cu power)
    (2 In2.Cu mixed)
    (3 In3.Cu power)
    (4 In4.Cu power)
    (5 In5.Cu signal)
    (6 In6.Cu power)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.254)
    (trace_clearance 0.15)
    (zone_clearance 0.0144)
    (zone_45_only no)
    (trace_min 0.15)
    (segment_width 0.2)
    (edge_width 0.1)
    (via_size 0.889)
    (via_drill 0.635)
    (via_min_size 0.889)
    (via_min_drill 0.508)
    (uvia_size 0.508)
    (uvia_drill 0.127)
    (uvias_allowed yes)
    (uvia_min_size 0.5)
    (uvia_min_drill 0.127)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.5 1.5)
    (pad_drill 0.6)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFF7F)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory GerberOutput/))
  )

  (net 0 "")
  (net 1 DM_P)
  (net 2 DM_N)
  (net 3 3V3_BATT)
  (net 4 15V_LDO_ENABLE)
  (net 5 15V_STABLE)
  (net 6 GND)
  (net 7 NetC15_2)
  (net 8 AMPLIFIED)
  (net 9 ARM_FPGA_CFG_CS_N)
  (net 10 ARM_FPGA_CFG_MISO)
  (net 11 ARM_FPGA_CFG_MOSI)
  (net 12 ARM_FPGA_CFG_SCLK)
  (net 13 ARM_LED1)
  (net 14 ARM_LED2)
  (net 15 ARM_LED3)
  (net 16 ARM_LED4)
  (net 17 AVR_GPIO_0)
  (net 18 AVR_GPIO_1)
  (net 19 AVR_GPIO_2)
  (net 20 AVR_GPIO_3)
  (net 21 AVR_GPIO_4)
  (net 22 AVR_GPIO_5)
  (net 23 AVR_GPIO_6)
  (net 24 AVR_GPIO_7)
  (net 25 AVR_GPIO_ARM_0)
  (net 26 AVR_GPIO_ARM_1)
  (net 27 AVR_GPIO_ARM_2)
  (net 28 AVR_GPIO_ARM_3)
  (net 29 AVR_GPIO_FPGA_0)
  (net 30 AVR_GPIO_FPGA_1)
  (net 31 AVR_GPIO_FPGA_2)
  (net 32 AVR_GPIO_FPGA_3)
  (net 33 AVR_LED1)
  (net 34 AVR_LED2)
  (net 35 AVR_LED3)
  (net 36 AVR_LED4)
  (net 37 AVR_PANIC)
  (net 38 AVR_RESET)
  (net 39 BOOT0)
  (net 40 D1_N)
  (net 41 D1_P)
  (net 42 DIGITIZED_NOISE)
  (net 43 FMC_A0)
  (net 44 FMC_A1)
  (net 45 FMC_A2)
  (net 46 FMC_A3)
  (net 47 FMC_A4)
  (net 48 FMC_A5)
  (net 49 FMC_A6)
  (net 50 FMC_A7)
  (net 51 FMC_A8)
  (net 52 FMC_A9)
  (net 53 FMC_A10)
  (net 54 FMC_A11)
  (net 55 FMC_A12)
  (net 56 FMC_A13)
  (net 57 FMC_A14)
  (net 58 FMC_A15)
  (net 59 FMC_A16)
  (net 60 FMC_A17)
  (net 61 FMC_A18)
  (net 62 FMC_A19)
  (net 63 FMC_A20)
  (net 64 FMC_A21)
  (net 65 FMC_A22)
  (net 66 FMC_A23)
  (net 67 FMC_A24)
  (net 68 FMC_A25)
  (net 69 FMC_CLK)
  (net 70 FMC_D0)
  (net 71 FMC_D1)
  (net 72 FMC_D2)
  (net 73 FMC_D3)
  (net 74 FMC_D4)
  (net 75 FMC_D5)
  (net 76 FMC_D6)
  (net 77 FMC_D7)
  (net 78 FMC_D8)
  (net 79 FMC_D9)
  (net 80 FMC_D10)
  (net 81 FMC_D11)
  (net 82 FMC_D12)
  (net 83 FMC_D13)
  (net 84 FMC_D14)
  (net 85 FMC_D15)
  (net 86 FMC_D16)
  (net 87 FMC_D17)
  (net 88 FMC_D18)
  (net 89 FMC_D19)
  (net 90 FMC_D20)
  (net 91 FMC_D21)
  (net 92 FMC_D22)
  (net 93 FMC_D23)
  (net 94 FMC_D24)
  (net 95 FMC_D25)
  (net 96 FMC_D26)
  (net 97 FMC_D27)
  (net 98 FMC_D28)
  (net 99 FMC_D29)
  (net 100 FMC_D30)
  (net 101 FMC_D31)
  (net 102 FMC_NBL0)
  (net 103 FMC_NBL1)
  (net 104 FMC_NBL2)
  (net 105 FMC_NBL3)
  (net 106 FMC_NE1)
  (net 107 FMC_NL)
  (net 108 FMC_NOE)
  (net 109 FMC_NWAIT)
  (net 110 FMC_NWE)
  (net 111 FMC_SDCKE0)
  (net 112 FMC_SDCKE1)
  (net 113 FMC_SDCLK)
  (net 114 FMC_SDNCAS)
  (net 115 FMC_SDNE0)
  (net 116 FMC_SDNE1)
  (net 117 FMC_SDNRAS)
  (net 118 FMC_SDNWE)
  (net 119 FPGA_CFG_CS_N1)
  (net 120 FPGA_CFG_CS_N)
  (net 121 FPGA_CFG_CTRL_ARM_ENA)
  (net 122 FPGA_CFG_CTRL_FPGA_DIS)
  (net 123 FPGA_CFG_MISO1)
  (net 124 FPGA_CFG_MISO)
  (net 125 FPGA_CFG_MOSI1)
  (net 126 FPGA_CFG_MOSI)
  (net 127 FPGA_CFG_SCLK1)
  (net 128 FPGA_CFG_SCLK)
  (net 129 FPGA_DONE_INT)
  (net 130 FPGA_DONE)
  (net 131 FPGA_ENTROPY_DISABLE)
  (net 132 FPGA_GCLK)
  (net 133 FPGA_GPIO_A_0)
  (net 134 FPGA_GPIO_A_1)
  (net 135 FPGA_GPIO_A_2)
  (net 136 FPGA_GPIO_A_3)
  (net 137 FPGA_GPIO_A_4)
  (net 138 FPGA_GPIO_A_5)
  (net 139 FPGA_GPIO_A_6)
  (net 140 FPGA_GPIO_A_7)
  (net 141 FPGA_GPIO_B_0)
  (net 142 FPGA_GPIO_B_1)
  (net 143 FPGA_GPIO_B_2)
  (net 144 FPGA_GPIO_B_3)
  (net 145 FPGA_GPIO_B_4)
  (net 146 FPGA_GPIO_B_5)
  (net 147 FPGA_GPIO_B_6)
  (net 148 FPGA_GPIO_B_7)
  (net 149 FPGA_GPIO_LED_0)
  (net 150 FPGA_GPIO_LED_1)
  (net 151 FPGA_GPIO_LED_2)
  (net 152 FPGA_GPIO_LED_3)
  (net 153 FPGA_INIT_B_INT1)
  (net 154 FPGA_INIT_B_INT)
  (net 155 FPGA_INIT_B)
  (net 156 FPGA_IRQ_N_0)
  (net 157 FPGA_IRQ_N_1)
  (net 158 FPGA_IRQ_N_2)
  (net 159 FPGA_IRQ_N_3)
  (net 160 FPGA_JTAG_TCK)
  (net 161 FPGA_JTAG_TDI)
  (net 162 FPGA_JTAG_TDO)
  (net 163 FPGA_JTAG_TMS)
  (net 164 FPGA_M0)
  (net 165 FPGA_M1)
  (net 166 FPGA_M2)
  (net 167 FPGA_PROGRAM_B1)
  (net 168 FPGA_PROGRAM_B)
  (net 169 FPGA_PROM_CS_N)
  (net 170 FPGA_PROM_MISO)
  (net 171 FPGA_PROM_MOSI)
  (net 172 FPGA_PROM_SCLK)
  (net 173 FPGA_PROM_W_N)
  (net 174 FPGA_VCCAUX_1V8)
  (net 175 FPGA_VCCINT_1V0)
  (net 176 FT_CTS)
  (net 177 FT_DTR)
  (net 178 FT_MGMT_CTS)
  (net 179 FT_MGMT_DTR)
  (net 180 FT_MGMT_RTS)
  (net 181 FT_MGMT_RXD1)
  (net 182 FT_MGMT_RXD)
  (net 183 FT_MGMT_TXD1)
  (net 184 FT_MGMT_TXD)
  (net 185 FT_MGMT_VCC3V3)
  (net 186 FT_MGMT_VPHY)
  (net 187 FT_MGMT_VPLL)
  (net 188 FT_MGMT_VREGIN)
  (net 189 FT_REF1)
  (net 190 FT_REF)
  (net 191 FT_RESET1)
  (net 192 FT_RESET)
  (net 193 FT_RTS)
  (net 194 FT_RXD1)
  (net 195 FT_RXD)
  (net 196 FT_TXD1)
  (net 197 FT_TXD)
  (net 198 FT_VCC3V3)
  (net 199 FT_VCCA1)
  (net 200 FT_VCCA)
  (net 201 FT_VCCORE1)
  (net 202 FT_VCCORE)
  (net 203 FT_VPHY)
  (net 204 FT_VPLL)
  (net 205 FT_VREGIN)
  (net 206 KSM_PROM_CS_N)
  (net 207 KSM_PROM_MISO)
  (net 208 KSM_PROM_MOSI)
  (net 209 KSM_PROM_SCLK)
  (net 210 MKM_AVR_CS_N)
  (net 211 MKM_AVR_MISO)
  (net 212 MKM_AVR_MOSI)
  (net 213 MKM_AVR_SCK)
  (net 214 MKM_CONTROL_AVR_ENA)
  (net 215 MKM_CONTROL_FPGA_DIS)
  (net 216 MKM_CS_N)
  (net 217 MKM_FPGA_CS_N)
  (net 218 MKM_FPGA_MISO)
  (net 219 MKM_FPGA_MOSI)
  (net 220 MKM_FPGA_SCK)
  (net 221 MKM_MISO)
  (net 222 MKM_MOSI)
  (net 223 MKM_SCK)
  (net 224 NetC5_1)
  (net 225 NetC11_1)
  (net 226 NetC12_2)
  (net 227 NetC17_2)
  (net 228 NetC70_2)
  (net 229 NetC71_2)
  (net 230 NetC75_2)
  (net 231 NetC78_2)
  (net 232 NetC90_2)
  (net 233 NetC93_2)
  (net 234 NetC115_1)
  (net 235 NetC116_1)
  (net 236 NetC117_1)
  (net 237 NetC117_2)
  (net 238 NetC118_1)
  (net 239 NetC118_2)
  (net 240 NetC207_1)
  (net 241 NetC208_1)
  (net 242 NetC208_2)
  (net 243 NetIC1_3)
  (net 244 NetJP2_2)
  (net 245 NetLED1_1)
  (net 246 NetLED2_1)
  (net 247 NetLED3_1)
  (net 248 NetLED4_1)
  (net 249 NetLED9_1)
  (net 250 NetLED10_1)
  (net 251 NetLED11_1)
  (net 252 NetLED12_1)
  (net 253 NetLED13_1)
  (net 254 NetLED14_1)
  (net 255 NetLED15_1)
  (net 256 NetLED16_1)
  (net 257 NetLED17_1)
  (net 258 NetLED18_1)
  (net 259 NetLED18_2)
  (net 260 NetQ1_1)
  (net 261 NetQ5_1)
  (net 262 NetQ5_3)
  (net 263 NetR1_1)
  (net 264 NetR3_2)
  (net 265 NetR8_1)
  (net 266 NetR32_2)
  (net 267 NetR33_2)
  (net 268 NetR52_1)
  (net 269 NetR53_2)
  (net 270 NetR54_1)
  (net 271 NetR55_2)
  (net 272 NetR65_1)
  (net 273 NetR66_1)
  (net 274 NetR67_1)
  (net 275 NOISE_IN)
  (net 276 NOISE_OUT)
  (net 277 NRST)
  (net 278 OSC_IN)
  (net 279 OSC_OUT)
  (net 280 POK_VCCAUX)
  (net 281 POK_VCCINT)
  (net 282 POK_VCCO)
  (net 283 PWR_18V)
  (net 284 PWR_ENA_VCCAUX)
  (net 285 PWR_ENA_VCCINT)
  (net 286 PWR_ENA_VCCO)
  (net 287 RAW_NOISE)
  (net 288 RTC_MFP)
  (net 289 RTC_SCL)
  (net 290 RTC_SDA)
  (net 291 SPI_A_TRISTATE)
  (net 292 SPI_B_TRISTATE)
  (net 293 SWDCLK)
  (net 294 SWDIO)
  (net 295 USB_MGMT_N)
  (net 296 USB_MGMT_P)
  (net 297 USB_N)
  (net 298 USB_P)
  (net 299 VCAP1)
  (net 300 VCAP2)
  (net 301 VCC_5V0)
  (net 302 VCCO_3V3)

  (net_class Default "This is the default net class."
    (clearance 0.15)
    (trace_width 0.254)
    (via_dia 0.889)
    (via_drill 0.635)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net 15V_LDO_ENABLE)
    (add_net 15V_STABLE)
    (add_net 3V3_BATT)
    (add_net AMPLIFIED)
    (add_net ARM_FPGA_CFG_CS_N)
    (add_net ARM_FPGA_CFG_MISO)
    (add_net ARM_FPGA_CFG_MOSI)
    (add_net ARM_FPGA_CFG_SCLK)
    (add_net ARM_LED1)
    (add_net ARM_LED2)
    (add_net ARM_LED3)
    (add_net ARM_LED4)
    (add_net AVR_GPIO_0)
    (add_net AVR_GPIO_1)
    (add_net AVR_GPIO_2)
    (add_net AVR_GPIO_3)
    (add_net AVR_GPIO_4)
    (add_net AVR_GPIO_5)
    (add_net AVR_GPIO_6)
    (add_net AVR_GPIO_7)
    (add_net AVR_GPIO_ARM_0)
    (add_net AVR_GPIO_ARM_1)
    (add_net AVR_GPIO_ARM_2)
    (add_net AVR_GPIO_ARM_3)
    (add_net AVR_GPIO_FPGA_0)
    (add_net AVR_GPIO_FPGA_1)
    (add_net AVR_GPIO_FPGA_2)
    (add_net AVR_GPIO_FPGA_3)
    (add_net AVR_LED1)
    (add_net AVR_LED2)
    (add_net AVR_LED3)
    (add_net AVR_LED4)
    (add_net AVR_PANIC)
    (add_net AVR_RESET)
    (add_net BOOT0)
    (add_net DIGITIZED_NOISE)
    (add_net FPGA_CFG_CS_N)
    (add_net FPGA_CFG_CS_N1)
    (add_net FPGA_CFG_CTRL_ARM_ENA)
    (add_net FPGA_CFG_CTRL_FPGA_DIS)
    (add_net FPGA_CFG_MISO)
    (add_net FPGA_CFG_MISO1)
    (add_net FPGA_CFG_MOSI)
    (add_net FPGA_CFG_MOSI1)
    (add_net FPGA_CFG_SCLK)
    (add_net FPGA_CFG_SCLK1)
    (add_net FPGA_DONE)
    (add_net FPGA_DONE_INT)
    (add_net FPGA_ENTROPY_DISABLE)
    (add_net FPGA_GCLK)
    (add_net FPGA_GPIO_LED_0)
    (add_net FPGA_GPIO_LED_1)
    (add_net FPGA_GPIO_LED_2)
    (add_net FPGA_GPIO_LED_3)
    (add_net FPGA_INIT_B)
    (add_net FPGA_INIT_B_INT)
    (add_net FPGA_INIT_B_INT1)
    (add_net FPGA_IRQ_N_0)
    (add_net FPGA_IRQ_N_1)
    (add_net FPGA_IRQ_N_2)
    (add_net FPGA_IRQ_N_3)
    (add_net FPGA_JTAG_TCK)
    (add_net FPGA_JTAG_TDI)
    (add_net FPGA_JTAG_TDO)
    (add_net FPGA_JTAG_TMS)
    (add_net FPGA_M0)
    (add_net FPGA_M1)
    (add_net FPGA_M2)
    (add_net FPGA_PROGRAM_B)
    (add_net FPGA_PROGRAM_B1)
    (add_net FPGA_PROM_CS_N)
    (add_net FPGA_PROM_MISO)
    (add_net FPGA_PROM_MOSI)
    (add_net FPGA_PROM_SCLK)
    (add_net FPGA_PROM_W_N)
    (add_net FPGA_VCCAUX_1V8)
    (add_net FPGA_VCCINT_1V0)
    (add_net FT_CTS)
    (add_net FT_DTR)
    (add_net FT_MGMT_CTS)
    (add_net FT_MGMT_DTR)
    (add_net FT_MGMT_RTS)
    (add_net FT_MGMT_RXD)
    (add_net FT_MGMT_RXD1)
    (add_net FT_MGMT_TXD)
    (add_net FT_MGMT_TXD1)
    (add_net FT_MGMT_VCC3V3)
    (add_net FT_MGMT_VPHY)
    (add_net FT_MGMT_VPLL)
    (add_net FT_MGMT_VREGIN)
    (add_net FT_REF)
    (add_net FT_REF1)
    (add_net FT_RESET)
    (add_net FT_RESET1)
    (add_net FT_RTS)
    (add_net FT_RXD)
    (add_net FT_RXD1)
    (add_net FT_TXD)
    (add_net FT_TXD1)
    (add_net FT_VCC3V3)
    (add_net FT_VCCA)
    (add_net FT_VCCA1)
    (add_net FT_VCCORE)
    (add_net FT_VCCORE1)
    (add_net FT_VPHY)
    (add_net FT_VPLL)
    (add_net FT_VREGIN)
    (add_net GND)
    (add_net KSM_PROM_CS_N)
    (add_net KSM_PROM_MISO)
    (add_net KSM_PROM_MOSI)
    (add_net KSM_PROM_SCLK)
    (add_net MKM_AVR_CS_N)
    (add_net MKM_AVR_MISO)
    (add_net MKM_AVR_MOSI)
    (add_net MKM_AVR_SCK)
    (add_net MKM_CONTROL_AVR_ENA)
    (add_net MKM_CONTROL_FPGA_DIS)
    (add_net MKM_CS_N)
    (add_net MKM_FPGA_CS_N)
    (add_net MKM_FPGA_MISO)
    (add_net MKM_FPGA_MOSI)
    (add_net MKM_FPGA_SCK)
    (add_net MKM_MISO)
    (add_net MKM_MOSI)
    (add_net MKM_SCK)
    (add_net NOISE_IN)
    (add_net NOISE_OUT)
    (add_net NRST)
    (add_net NetC115_1)
    (add_net NetC116_1)
    (add_net NetC117_1)
    (add_net NetC117_2)
    (add_net NetC118_1)
    (add_net NetC118_2)
    (add_net NetC11_1)
    (add_net NetC12_2)
    (add_net NetC15_2)
    (add_net NetC17_2)
    (add_net NetC207_1)
    (add_net NetC208_1)
    (add_net NetC208_2)
    (add_net NetC5_1)
    (add_net NetC70_2)
    (add_net NetC71_2)
    (add_net NetC75_2)
    (add_net NetC78_2)
    (add_net NetC90_2)
    (add_net NetC93_2)
    (add_net NetIC1_3)
    (add_net NetJP2_2)
    (add_net NetLED10_1)
    (add_net NetLED11_1)
    (add_net NetLED12_1)
    (add_net NetLED13_1)
    (add_net NetLED14_1)
    (add_net NetLED15_1)
    (add_net NetLED16_1)
    (add_net NetLED17_1)
    (add_net NetLED18_1)
    (add_net NetLED18_2)
    (add_net NetLED1_1)
    (add_net NetLED2_1)
    (add_net NetLED3_1)
    (add_net NetLED4_1)
    (add_net NetLED9_1)
    (add_net NetQ1_1)
    (add_net NetQ5_1)
    (add_net NetQ5_3)
    (add_net NetR1_1)
    (add_net NetR32_2)
    (add_net NetR33_2)
    (add_net NetR3_2)
    (add_net NetR52_1)
    (add_net NetR53_2)
    (add_net NetR54_1)
    (add_net NetR55_2)
    (add_net NetR65_1)
    (add_net NetR66_1)
    (add_net NetR67_1)
    (add_net NetR8_1)
    (add_net OSC_IN)
    (add_net OSC_OUT)
    (add_net POK_VCCAUX)
    (add_net POK_VCCINT)
    (add_net POK_VCCO)
    (add_net PWR_18V)
    (add_net PWR_ENA_VCCAUX)
    (add_net PWR_ENA_VCCINT)
    (add_net PWR_ENA_VCCO)
    (add_net RAW_NOISE)
    (add_net RTC_MFP)
    (add_net RTC_SCL)
    (add_net RTC_SDA)
    (add_net SPI_A_TRISTATE)
    (add_net SPI_B_TRISTATE)
    (add_net SWDCLK)
    (add_net SWDIO)
    (add_net VCAP1)
    (add_net VCAP2)
    (add_net VCCO_3V3)
    (add_net VCC_5V0)
  )

  (net_class FMC FMC
    (clearance 0.15)
    (trace_width 0.254)
    (via_dia 0.889)
    (via_drill 0.635)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net FMC_A0)
    (add_net FMC_A1)
    (add_net FMC_A10)
    (add_net FMC_A11)
    (add_net FMC_A12)
    (add_net FMC_A13)
    (add_net FMC_A14)
    (add_net FMC_A15)
    (add_net FMC_A16)
    (add_net FMC_A17)
    (add_net FMC_A18)
    (add_net FMC_A19)
    (add_net FMC_A2)
    (add_net FMC_A20)
    (add_net FMC_A21)
    (add_net FMC_A22)
    (add_net FMC_A23)
    (add_net FMC_A24)
    (add_net FMC_A25)
    (add_net FMC_A3)
    (add_net FMC_A4)
    (add_net FMC_A5)
    (add_net FMC_A6)
    (add_net FMC_A7)
    (add_net FMC_A8)
    (add_net FMC_A9)
    (add_net FMC_CLK)
    (add_net FMC_D0)
    (add_net FMC_D1)
    (add_net FMC_D10)
    (add_net FMC_D11)
    (add_net FMC_D12)
    (add_net FMC_D13)
    (add_net FMC_D14)
    (add_net FMC_D15)
    (add_net FMC_D16)
    (add_net FMC_D17)
    (add_net FMC_D18)
    (add_net FMC_D19)
    (add_net FMC_D2)
    (add_net FMC_D20)
    (add_net FMC_D21)
    (add_net FMC_D22)
    (add_net FMC_D23)
    (add_net FMC_D24)
    (add_net FMC_D25)
    (add_net FMC_D26)
    (add_net FMC_D27)
    (add_net FMC_D28)
    (add_net FMC_D29)
    (add_net FMC_D3)
    (add_net FMC_D30)
    (add_net FMC_D31)
    (add_net FMC_D4)
    (add_net FMC_D5)
    (add_net FMC_D6)
    (add_net FMC_D7)
    (add_net FMC_D8)
    (add_net FMC_D9)
    (add_net FMC_NBL0)
    (add_net FMC_NBL1)
    (add_net FMC_NBL2)
    (add_net FMC_NBL3)
    (add_net FMC_NE1)
    (add_net FMC_NL)
    (add_net FMC_NOE)
    (add_net FMC_NWAIT)
    (add_net FMC_NWE)
    (add_net FMC_SDCKE0)
    (add_net FMC_SDCKE1)
    (add_net FMC_SDCLK)
    (add_net FMC_SDNCAS)
    (add_net FMC_SDNE0)
    (add_net FMC_SDNE1)
    (add_net FMC_SDNRAS)
    (add_net FMC_SDNWE)
  )

  (net_class FPGA_GPIO FPGA_GPIO
    (clearance 0.15)
    (trace_width 0.254)
    (via_dia 0.889)
    (via_drill 0.635)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net FPGA_GPIO_A_0)
    (add_net FPGA_GPIO_A_1)
    (add_net FPGA_GPIO_A_2)
    (add_net FPGA_GPIO_A_3)
    (add_net FPGA_GPIO_A_4)
    (add_net FPGA_GPIO_A_5)
    (add_net FPGA_GPIO_A_6)
    (add_net FPGA_GPIO_A_7)
    (add_net FPGA_GPIO_B_0)
    (add_net FPGA_GPIO_B_1)
    (add_net FPGA_GPIO_B_2)
    (add_net FPGA_GPIO_B_3)
    (add_net FPGA_GPIO_B_4)
    (add_net FPGA_GPIO_B_5)
    (add_net FPGA_GPIO_B_6)
    (add_net FPGA_GPIO_B_7)
  )

  (net_class USB USB
    (clearance 0.15)
    (trace_width 0.254)
    (via_dia 0.889)
    (via_drill 0.635)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net D1_N)
    (add_net D1_P)
    (add_net DM_N)
    (add_net DM_P)
    (add_net USB_MGMT_N)
    (add_net USB_MGMT_P)
    (add_net USB_N)
    (add_net USB_P)
  )

  (module HDR1X10 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.5 6.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference JP5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Connector; Header; 10 Position" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 3 thru_hole circle (at 5.08 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 18 AVR_GPIO_1))
    (pad 10 thru_hole circle (at 22.86 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 9 thru_hole circle (at 20.32 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 24 AVR_GPIO_7))
    (pad 8 thru_hole circle (at 17.78 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 23 AVR_GPIO_6))
    (pad 7 thru_hole circle (at 15.24 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 22 AVR_GPIO_5))
    (pad 6 thru_hole circle (at 12.7 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 21 AVR_GPIO_4))
    (pad 5 thru_hole circle (at 10.16 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 20 AVR_GPIO_3))
    (pad 4 thru_hole circle (at 7.62 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 19 AVR_GPIO_2))
    (pad 2 thru_hole circle (at 2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 17 AVR_GPIO_0))
    (pad 1 thru_hole rect (at 0 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
  )

  (module PLS-2 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 84.160746 -31.8)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference JP6 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 thru_hole rect (at 0 1.27 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 2 thru_hole circle (at 0 -1.27 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 211 MKM_AVR_MISO))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/3416A7AC-A52A.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 21.463 -99.0854)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 283 PWR_18V))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 21.463 -94.0689)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 283 PWR_18V))
    (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 21.463 -89.0524)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 283 PWR_18V))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 26.100001 -84.700001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 283 PWR_18V))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 25.55 -75.725)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 224 NetC5_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 25.5778 -71.8312)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C6 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.5 -86.5)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C7 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 283 PWR_18V))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 15.2908 -67.3354)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C8 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_D (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 10.4648 -54.5846)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C9 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_D (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 10.4648 -61.0616)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C10 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 74.500001 -89.499999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C11 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 5 15V_STABLE))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 225 NetC11_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 71.25 -92.5)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C12 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 226 NetC12_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 76.25 -87.75)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C13 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 5 15V_STABLE))
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 89.9922 -96.2152)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C14 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 275 NOISE_IN))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 89.4842 -81.6864)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C15 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 287 RAW_NOISE))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 7 NetC15_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 77.343 -88.5444)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C16 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 28.924999 -32.049999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C17 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 227 NetC17_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 28.175001 -38.549999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C18 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 279 OSC_OUT))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 13.125 -20.45)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C19 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 26.6 -23.299999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C20 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 277 NRST))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 47.7266 -14.2494)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C21 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.7 0) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.7 0) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 55.0672 -51.5112)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C22 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 2 smd rect (at -0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 299 VCAP1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 55.0672 -49.6824)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C23 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 299 VCAP1))
    (pad 1 smd rect (at 0.7 0 180) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 65.9638 -24.384)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C24 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0 -0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 300 VCAP2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 67.7926 -24.384)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C25 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 300 VCAP2))
    (pad 1 smd rect (at 0 0.7 90) (size 0.800001 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/175C1D2E-5B2D.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 29.718 -26.5684)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C26 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 45.6946 -51.3334)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C27 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 50.6476 -49.3522)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C28 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 65.4304 -35.6616)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C29 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.3532 -49.784)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C30 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 61.341 -15.9512)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C31 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.9278 -26.6192)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C32 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.5308 -41.4782)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C33 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.9346 -49.784)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C34 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 37.800001 -20.5)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C35 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 65.4304 -29.7434)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C36 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 39.2 -20.3)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C37 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 47.7266 -15.9512)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C38 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 54.6862 -15.9512)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C39 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.9278 -45.1358)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C40 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.9278 -41.4782)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C41 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 66.294 -21.971)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C42 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 39.2176 -49.3522)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C43 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 45.6438 -49.3522)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C44 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 65.4304 -40.6146)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C45 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.9278 -31.877)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C46 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.0562 -38.608)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C47 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 78.105 -41.2274)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C48 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.0562 -55.9054)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C49 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 78.105 -58.3946)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C50 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.0562 -45.9232)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C51 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 78.105 -55.5244)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C52 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.0562 -60.993398)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C53 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.0562 -40.9956)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C54 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.0562 -58.8772)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C55 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 78.105 -45.3644)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C56 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.0562 -52.9082)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C57 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.822199 -40.8924)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C58 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.8472 -38.6826)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C59 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.8472 -60.9568)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C60 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 88.7222 -58.665999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C61 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.8472 -52.6288)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C62 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 88.7222 -41.148)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C63 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.8472 -58.5978)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C64 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 88.7222 -55.545799)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C65 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.8472 -45.5422)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C66 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 88.7222 -45.487399)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C67 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.8472 -55.6514)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C68 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 39.100001 -51.674997)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C69 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 22.099999 -47.874999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C70 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 228 NetC70_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 19.299999 -40.899999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C71 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 229 NetC71_2))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 19.775863 -5.961428)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C72 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 1 0) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -1 0) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
      (net 205 FT_VREGIN))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 12.37202 -7.066023)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C73 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 205 FT_VREGIN))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 10.719801 -3.184398)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C74 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 202 FT_VCCORE))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 19.889201 -4.860798)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C75 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 230 NetC75_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 9.297401 -3.184398)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C76 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 200 FT_VCCA))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 25.807401 -9.889998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C77 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 203 FT_VPHY))
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 19.889201 -7.197598)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C78 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 231 NetC78_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 22.325 -10.024999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C79 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 203 FT_VPHY))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 24.207201 -15.884398)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C80 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 204 FT_VPLL))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 19.889201 -10.728198)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C81 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 204 FT_VPLL))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 7.773401 -15.071598)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C82 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 12.548601 -3.565398)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C83 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 16.079201 -3.590798)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C84 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 19.889201 -12.836398)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C85 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 11.532601 -15.782798)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C86 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 78.403808 -17.070954)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C87 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
      (net 188 FT_MGMT_VREGIN))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 82.50838 -18.33486)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C88 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 188 FT_MGMT_VREGIN))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 79.9592 -20.897599)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C89 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 201 FT_VCCORE1))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 81.799999 -11.825)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C90 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 232 NetC90_2))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 79.924999 -22.149999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C91 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 199 FT_VCCA1))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 86.418999 -7.066801)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C92 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 186 FT_MGMT_VPHY))
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 84.0994 -11.829799)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C93 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 233 NetC93_2))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 86.1314 -11.423399)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C94 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 186 FT_MGMT_VPHY))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 91.186 -7.206999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C95 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 187 FT_MGMT_VPLL))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 87.7824 -11.423399)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C96 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 187 FT_MGMT_VPLL))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 90 -25.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C97 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 80.391 -16.096999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C98 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 89.2302 -11.423399)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C99 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 92.202 -20.313399)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C100 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 80.391 -19.119599)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C101 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 53.152599 -30.147798)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C102 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 54.403998 -44.950799)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C103 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 53.083198 -32.428599)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C104 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.5 8.500001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C105 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 65.325 -34.625001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C106 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 76.6826 -27.974798)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C107 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 3 3V3_BATT))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.484199 1.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C108 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 55.9562 -67.8942)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C109 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 34.352197 -30.1482)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C110 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 66.200401 -88.4428)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C111 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 48.549999 -29.475001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C112 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 40.0558 -72.6186)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C113 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 6.4008 -44.9326)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C114 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 32.1818 -75.8444)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C115 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 234 NetC115_1))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 13.95 -41.624999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C116 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 235 NetC116_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 32.1818 -80.391)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C117 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 237 NetC117_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 13.975001 -37.349999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C118 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 239 NetC118_2))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 40.0558 -79.4004)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C119 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 6.4008 -38.5826)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C120 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 71.074999 -97.7)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C121 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42 -93.500001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C122 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_D (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 79.7052 -71.501)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C123 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 3.25 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0 -3.25 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.9346 -69.8754)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C124 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.9374 -72.898)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C125 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 47.9298 -84.5566)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C126 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_D (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 54.875402 -90.997001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C127 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/5917D381-109F.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.9346 -70.9168)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C128 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.96 -63.8556)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C129 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.9374 -71.9074)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C130 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.9628 -66.9036)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C131 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 52.07 -83.0072)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C132 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42.8498 -56.091351)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C133 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.4548 -70.4088)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C134 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.96 -67.8942)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C135 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 43.9928 -71.6788)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C136 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 74.5236 -65.8114)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C137 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 61.9506 -66.8782)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C138 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 52.07 -85.725)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C139 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 61.849 -81.5594)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C140 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.1218 -55.118)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C141 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.9346 -65.8876)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C142 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 55.4736 -71.3994)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C143 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 71.6788 -71.0184)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C144 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 43.9166 -67.1068)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C145 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 58.9788 -65.8876)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C146 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 55.4736 -73.406)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C147 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 41.4274 -67.1068)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C148 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 69.2658 -70.9676)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C149 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 58.9534 -64.8462)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C150 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 58.9534 -70.8914)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C151 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.3024 -84.0232)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C152 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 70.485 -66.6496)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C153 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.9346 -64.8462)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C154 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.4548 -65.3796)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C155 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 56.7436 -53.7972)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C156 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.3024 -81.5594)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C157 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 57.9374 -63.881)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C158 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 55.4228 -65.3796)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C159 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 41.402 -71.6788)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C160 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 56.769 -56.1848)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C161 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.9346 -71.9074)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C162 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 59.436 -72.39)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C163 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.96 -72.898)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C164 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 63.7794 -85.0646)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C165 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42.291 -85.6996)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C166 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 1.5 0 180) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 68.834 -54.383)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C167 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 73.0758 -75.9714)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C168 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 63.246 -54.742982)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C169 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42.7736 -82.0674)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C170 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42.8244 -79.2734)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C171 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 40.1574 -63.0428)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C172 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42.5958 -63.0428)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C173 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 52.2986 -54.9148)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C174 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 69.2658 -78.9432)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C175 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 65.4558 -55.118)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C176 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 66.1162 -81.5594)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C177 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42.6212 -75.9206)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C178 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -1 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 69.2658 -74.8284)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C179 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -1 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 47.4472 -56.0832)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C180 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/68E8DA21-73BF.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 48.4378 -62.3824)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C181 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 47.9552 -59.8678)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C182 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 53.467 -79.4258)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C183 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 61.9506 -61.924402)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C184 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 49.9364 -69.8754)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C185 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 55.4736 -75.4126)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C186 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 44.6786 -63.3984)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C187 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 53.0098 -56.9976)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C188 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 52.451 -75.3872)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C189 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 67.818 -64.7446)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C190 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 52.959 -67.9196)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C191 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 46.4312 -78.4098)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C192 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 49.4538 -66.3956)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C193 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 49.9364 -58.9026)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C194 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 48.9458 -76.9112)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C195 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 60.452 -62.4078)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C196 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 47.9552 -67.8942)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C197 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 50.927 -80.7974)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C198 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 63.9318 -67.8942)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C199 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 50.9524 -61.8998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C200 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 51.4604 -72.39)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C201 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 67.4624 -67.3862)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C202 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 45.9486 -66.8782)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C203 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 44.595461 -75.271945)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C204 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 22.0472 -50.6476)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C205 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 22.0472 -46.2788)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C206 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -1.5 0) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 24.4856 -62.8904)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C207 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 240 NetC207_1))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 26.924 -62.8904)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C208 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 242 NetC208_2))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 34.6964 -55.3466)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C209 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 2 smd rect (at 0 1.5 270) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 34.7472 -62.4078)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C210 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 1.5 90) (size 1.599999 2.6) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/F26EE9BE-B6B0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 24.003 -63.0936)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C211 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 285 PWR_ENA_VCCINT))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 14.8336 -47.2694)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C212 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 286 PWR_ENA_VCCO))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.9118 -76.327)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C213 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 284 PWR_ENA_VCCAUX))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 35.999999 -14.499999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C214 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 205 FT_VREGIN))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.899999 -16.7)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference C215 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 188 FT_MGMT_VREGIN))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/ECAF1ED8-FCC0.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module USB-MINIB (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 65 14.900001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference CN1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value USB-MINIB (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad "" np_thru_hole circle (at 2.2098 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
    (pad "" np_thru_hole circle (at -2.2 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
    (pad GND smd rect (at 4.36 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad GND smd rect (at 4.36 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad GND smd rect (at -4.34 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad GND smd rect (at 1.6002 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad ID smd rect (at 0.8 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask))
    (pad D+ smd rect (at 0 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask)
      (net 41 D1_P))
    (pad D- smd rect (at -0.8 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask)
      (net 40 D1_N))
    (pad VBUS smd rect (at -1.6 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask)
      (net 205 FT_VREGIN))
    (pad GND smd rect (at -4.34 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/23D50C2B-5C98.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module USB-MINIB (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 85 14.900001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference CN2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value USB-MINIB (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad "" np_thru_hole circle (at -2.2 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
    (pad "" np_thru_hole circle (at 2.2098 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
    (pad GND smd rect (at -4.34 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad VBUS smd rect (at -1.6 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask)
      (net 188 FT_MGMT_VREGIN))
    (pad D- smd rect (at -0.8 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask)
      (net 2 DM_N))
    (pad D+ smd rect (at 0 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask)
      (net 1 DM_P))
    (pad ID smd rect (at 0.8 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask))
    (pad GND smd rect (at 1.6002 -3.7 180) (size 0.6 1.599999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad GND smd rect (at -4.34 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad GND smd rect (at 4.36 -3.5052) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad GND smd rect (at 4.36 2) (size 1.599999 2.000001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/23D50C2B-5C98.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 82.8548 -89.1794)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference D1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 8 AMPLIFIED))
    (pad 2 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask))
    (pad 1 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 7 NetC15_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 20.9804 -63.5508)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference D2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 285 PWR_ENA_VCCINT))
    (pad 2 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask))
    (pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 11.6078 -47.2694)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference D3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 280 POK_VCCAUX))
    (pad 2 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask))
    (pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 286 PWR_ENA_VCCO))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 32.8168 -72.9234)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference D4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 284 PWR_ENA_VCCAUX))
    (pad 2 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask))
    (pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 281 POK_VCCINT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 27.351198 -15.722597)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference FB1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 2 smd rect (at 0 0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
      (net 203 FT_VPHY))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 20.752801 -14.919198)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference FB2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.85 0 90) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
      (net 204 FT_VPLL))
    (pad 1 smd rect (at -0.85 0 90) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 93.218 -10.966199)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference FB3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 2 smd rect (at 0 0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
      (net 186 FT_MGMT_VPHY))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 91.186 -10.966199)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference FB4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
      (net 187 FT_MGMT_VPLL))
    (pad 1 smd rect (at 0 -0.85) (size 1 0.900001) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/AF13F747-700F.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 41.4528 -84.2772)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference FB5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad 1 smd rect (at -1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 7.7978 -33.147)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference FB6 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 2 smd rect (at 1.4 0 270) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 39.624 -58.2168)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference FB7 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -1.4) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad 1 smd rect (at 0 1.4) (size 1.799999 1.4) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/76148CD0-6DD3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module SO08 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 33.155202 -51.027998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference IC1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value SO08 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 206 KSM_PROM_CS_N))
    (pad 8 smd rect (at 3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 207 KSM_PROM_MISO))
    (pad 3 smd rect (at -3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 243 NetIC1_3))
    (pad 7 smd rect (at 3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 6 smd rect (at 3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 209 KSM_PROM_SCLK))
    (pad 4 smd rect (at -3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 5 smd rect (at 3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 208 KSM_PROM_MOSI))
  )

  (module SO20W (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 39.355997 -38.3524)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference IC2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value SO20W (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 5.0292 5.715 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 291 SPI_A_TRISTATE))
    (pad 2 smd rect (at 5.0292 4.445 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 9 ARM_FPGA_CFG_CS_N))
    (pad 3 smd rect (at 5.0292 3.175 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 124 FPGA_CFG_MISO))
    (pad 4 smd rect (at 5.0292 1.905 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 12 ARM_FPGA_CFG_SCLK))
    (pad 5 smd rect (at 5.0292 0.635 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 171 FPGA_PROM_MOSI))
    (pad 6 smd rect (at 5.0292 -0.635 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 11 ARM_FPGA_CFG_MOSI))
    (pad 7 smd rect (at 5.0292 -1.905 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 172 FPGA_PROM_SCLK))
    (pad 8 smd rect (at 5.0292 -3.175 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 170 FPGA_PROM_MISO))
    (pad 13 smd rect (at -5.0292 -3.175 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 128 FPGA_CFG_SCLK))
    (pad 14 smd rect (at -5.0292 -1.905 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 171 FPGA_PROM_MOSI))
    (pad 15 smd rect (at -5.0292 -0.635 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 126 FPGA_CFG_MOSI))
    (pad 16 smd rect (at -5.0292 0.635 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 172 FPGA_PROM_SCLK))
    (pad 17 smd rect (at -5.0292 1.905 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 170 FPGA_PROM_MISO))
    (pad 18 smd rect (at -5.0292 3.175 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 169 FPGA_PROM_CS_N))
    (pad 19 smd rect (at -5.0292 4.445 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 292 SPI_B_TRISTATE))
    (pad 20 smd rect (at -5.0292 5.715 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 9 smd rect (at 5.0292 -4.445 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 169 FPGA_PROM_CS_N))
    (pad 10 smd rect (at 5.0292 -5.715 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 12 smd rect (at -5.0292 -4.445 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 10 ARM_FPGA_CFG_MISO))
    (pad 11 smd rect (at -5.0292 -5.715 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 120 FPGA_CFG_CS_N))
  )

  (module SO08 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 45.5368 -25.283198)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference IC3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value SO08 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 5 smd rect (at 3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 171 FPGA_PROM_MOSI))
    (pad 4 smd rect (at -3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 6 smd rect (at 3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 172 FPGA_PROM_SCLK))
    (pad 7 smd rect (at 3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 3 smd rect (at -3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 173 FPGA_PROM_W_N))
    (pad 2 smd rect (at -3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 170 FPGA_PROM_MISO))
    (pad 8 smd rect (at 3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at -3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 169 FPGA_PROM_CS_N))
  )

  (module SO20W (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 74.0918 -30.463998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference IC4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value SO20W (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 11 smd rect (at 5.715 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 217 MKM_FPGA_CS_N))
    (pad 12 smd rect (at 4.445 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 211 MKM_AVR_MISO))
    (pad 10 smd rect (at 5.715 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 9 smd rect (at 4.445 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 216 MKM_CS_N))
    (pad 20 smd rect (at -5.715 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (pad 19 smd rect (at -4.445 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 215 MKM_CONTROL_FPGA_DIS))
    (pad 18 smd rect (at -3.175 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 216 MKM_CS_N))
    (pad 17 smd rect (at -1.905 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 221 MKM_MISO))
    (pad 16 smd rect (at -0.635 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 223 MKM_SCK))
    (pad 15 smd rect (at 0.635 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 219 MKM_FPGA_MOSI))
    (pad 14 smd rect (at 1.905 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 222 MKM_MOSI))
    (pad 13 smd rect (at 3.175 -5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 220 MKM_FPGA_SCK))
    (pad 8 smd rect (at 3.175 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 221 MKM_MISO))
    (pad 7 smd rect (at 1.905 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 223 MKM_SCK))
    (pad 6 smd rect (at 0.635 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 212 MKM_AVR_MOSI))
    (pad 5 smd rect (at -0.635 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 222 MKM_MOSI))
    (pad 4 smd rect (at -1.905 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 213 MKM_AVR_SCK))
    (pad 3 smd rect (at -3.175 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 218 MKM_FPGA_MISO))
    (pad 2 smd rect (at -4.445 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 210 MKM_AVR_CS_N))
    (pad 1 smd rect (at -5.715 5.0292) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
      (net 214 MKM_CONTROL_AVR_ENA))
  )

  (module RCLAMP0502A (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 51.816 -11.0744)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference IC5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value RCLAMP0502A (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 -0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 298 USB_P))
    (pad 2 smd rect (at 0 -0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 3 smd rect (at -0.5 -0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 297 USB_N))
    (pad 4 smd rect (at -0.5 0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 40 D1_N))
    (pad 5 smd rect (at 0 0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 205 FT_VREGIN))
    (pad 6 smd rect (at 0.5 0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 41 D1_P))
  )

  (module RCLAMP0502A (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 69.1134 -11.0744)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference IC6 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value RCLAMP0502A (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 6 smd rect (at 0.5 0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 1 DM_P))
    (pad 5 smd rect (at 0 0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 188 FT_MGMT_VREGIN))
    (pad 4 smd rect (at -0.5 0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 2 DM_N))
    (pad 3 smd rect (at -0.5 -0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 295 USB_MGMT_N))
    (pad 2 smd rect (at 0 -0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.5 -0.725 270) (size 0.850001 0.299999) (layers F.Cu F.Paste F.Mask)
      (net 296 USB_MGMT_P))
  )

  (module PLS-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 22.783795 -20.4216)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference J1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 6 thru_hole circle (at 6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask))
    (pad 5 thru_hole circle (at 3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 277 NRST))
    (pad 4 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 294 SWDIO))
    (pad 3 thru_hole circle (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 2 thru_hole circle (at -3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 293 SWDCLK))
    (pad 1 thru_hole rect (at -6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/670BFB14-85C2.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module PLD-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 41.046395 -12.5222)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference J2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 thru_hole rect (at -2.54 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 2 thru_hole circle (at -2.54 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 205 FT_VREGIN))
    (pad 3 thru_hole circle (at 0 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 298 USB_P))
    (pad 4 thru_hole circle (at 0 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 297 USB_N))
    (pad 5 thru_hole circle (at 2.54 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 194 FT_RXD1))
    (pad 6 thru_hole circle (at 2.54 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 196 FT_TXD1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module PLD-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 74.904595 -12.5222)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference J3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 6 thru_hole circle (at 2.54 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 183 FT_MGMT_TXD1))
    (pad 5 thru_hole circle (at 2.54 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 181 FT_MGMT_RXD1))
    (pad 4 thru_hole circle (at 0 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 295 USB_MGMT_N))
    (pad 3 thru_hole circle (at 0 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 296 USB_MGMT_P))
    (pad 2 thru_hole circle (at -2.54 -1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 188 FT_MGMT_VREGIN))
    (pad 1 thru_hole rect (at -2.54 1.27) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 694106301002 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 20.000001 18.399999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference JP1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Wurth DC Power Jack, 2.1mm, PCB Mount" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 3 thru_hole oval (at 4.8 -10.6 90) (size 4.500001 2.000001) (drill 0.800001) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 2 thru_hole oval (at 0 -7.8 90) (size 2.000001 4.500001) (drill 0.800001) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 1 thru_hole oval (at 0 -13.6 90) (size 2.000001 4.500001) (drill 0.800001) (layers *.Cu *.Paste *.Mask)
      (net 283 PWR_18V))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/51D2E761-0F4D.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module PLS-2 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 64.6468 -91.7448)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference JP2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 244 NetJP2_2))
    (pad 1 thru_hole rect (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 4 15V_LDO_ENABLE))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/3416A7AC-A52A.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module PLD-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 89.117 -31.1658)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference JP3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 thru_hole rect (at -1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 211 MKM_AVR_MISO))
    (pad 2 thru_hole circle (at 1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 3 3V3_BATT))
    (pad 3 thru_hole circle (at -1.27 0 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 213 MKM_AVR_SCK))
    (pad 4 thru_hole circle (at 1.27 0 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 212 MKM_AVR_MOSI))
    (pad 5 thru_hole circle (at -1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 38 AVR_RESET))
    (pad 6 thru_hole circle (at 1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module PLS-3 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 88.679327 1.5)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference JP4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 3 thru_hole circle (at 2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 2 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 3 3V3_BATT))
    (pad 1 thru_hole rect (at -2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/836C6F64-A2E5.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module PLD-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 18.249999 -29.475001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference JP7 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 thru_hole rect (at -1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 121 FPGA_CFG_CTRL_ARM_ENA))
    (pad 2 thru_hole circle (at 1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 291 SPI_A_TRISTATE))
    (pad 3 thru_hole circle (at -1.27 0 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 122 FPGA_CFG_CTRL_FPGA_DIS))
    (pad 4 thru_hole circle (at 1.27 0 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 292 SPI_B_TRISTATE))
    (pad 5 thru_hole circle (at -1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 173 FPGA_PROM_W_N))
    (pad 6 thru_hole circle (at 1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B3089A96-FA19.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 45.514199 15.999998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 245 NetLED1_1))
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 41.514194 15.999998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 246 NetLED2_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 39.514193 15.999998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 247 NetLED3_1))
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 43.514198 15.999998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 248 NetLED4_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 34.349997 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED9 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 249 NetLED9_1))
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.349995 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED10 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 250 NetLED10_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 28.350002 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED11 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 251 NetLED11_1))
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 32.349996 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED12 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 252 NetLED12_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 73.999999 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED13 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 253 NetLED13_1))
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 129 FPGA_DONE_INT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 52.050003 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED14 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 254 NetLED14_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 56.049997 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED15 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 255 NetLED15_1))
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 54.049996 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED16 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 256 NetLED16_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 50.050001 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED17 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 257 NetLED17_1))
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 76.132253 16.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference LED18 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "Chip, 2-Leads, Body 1,6x0,8mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 259 NetLED18_2))
    (pad 1 smd rect (at 0 -0.8) (size 1 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 258 NetLED18_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A9F03225-78F3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 72.451999 -95.238799)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference Q1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 3 smd rect (at 0 1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 244 NetJP2_2))
    (pad 2 smd rect (at -0.95 -1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 0.95 -1.1 270) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 260 NetQ1_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 90.3732 -92.7862)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference Q2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 276 NOISE_OUT))
    (pad 2 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 275 NOISE_IN))
    (pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module CRYSTAL_3.2X2.5 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 28.299999 -34.975)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference Q3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value CRYSTAL_3.2X2.5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 4 smd rect (at 1.1176 -0.8636) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 3 smd rect (at -1.0922 -0.8636) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
      (net 279 OSC_OUT))
    (pad 2 smd rect (at -1.0922 0.8382 180) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 1.1176 0.8382 180) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
      (net 227 NetC17_2))
  )

  (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 89.3064 -73.0504)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference Q4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 3 smd rect (at -1.1 0 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 154 FPGA_INIT_B_INT))
    (pad 2 smd rect (at 1.1 -0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 1.1 0.95 180) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 155 FPGA_INIT_B))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module ASF (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 67.9704 -84.709)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference Q5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value ASF (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 4 smd rect (at -1.0922 -1.2524 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 3 smd rect (at -1.0922 1.2954 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
      (net 262 NetQ5_3))
    (pad 1 smd rect (at 1.1302 -1.2524 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
      (net 261 NetQ5_1))
    (pad 2 smd rect (at 1.1302 1.2954 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
  )

  (module SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 15.739801 -42.410601)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference Q6 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1.1 -0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 282 POK_VCCO))
    (pad 2 smd rect (at -1.1 0.95) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 3 smd rect (at 1.1 0) (size 1.2 0.800001) (layers F.Cu F.Paste F.Mask)
      (net 259 NetLED18_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 27.500001 -81.4)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 283 PWR_18V))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 263 NetR1_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 27.500001 -79.199999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 263 NetR1_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 25.7048 -80.830801)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 264 NetR3_2))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 263 NetR1_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 64.4906 -82.931)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 132 FPGA_GCLK))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 262 NetQ5_3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 71.749999 -99.499999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 260 NetQ1_1))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 131 FPGA_ENTROPY_DISABLE))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 71.749999 -98.249999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R6 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 260 NetQ1_1))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 71 -89.499999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R7 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 4 15V_LDO_ENABLE))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 283 PWR_18V))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 25.577803 -73.1774)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R8 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 265 NetR8_1))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 28.194 -72.6186)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R9 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 265 NetR8_1))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 87.0966 -93.2434)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R10 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 287 RAW_NOISE))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 275 NOISE_IN))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 90.9828 -84.6328)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R11 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 287 RAW_NOISE))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 5 15V_STABLE))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 84.6582 -86.106)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R12 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 7 NetC15_2))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 8 AMPLIFIED))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 80.6958 -81.8896)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R13 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 8 AMPLIFIED))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.9278 -34.671)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R14 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 278 OSC_IN))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 227 NetC17_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 40.9702 -20.0406)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R15 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 39 BOOT0))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 44.999999 -7.499998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R16 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 248 NetLED4_1))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 15 ARM_LED3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 27.440202 -50.392998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R17 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 243 NetIC1_3))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 27.425 -52.900001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R18 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 206 KSM_PROM_CS_N))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.308599 -41.629)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R19 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 290 RTC_SDA))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.6832 -42.799)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R20 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 289 RTC_SCL))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.6832 -44.0944)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R21 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 288 RTC_MFP))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 20.295601 -9.153398)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R22 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 190 FT_REF))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 7.621001 -7.375398)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R23 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 192 FT_RESET))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 88.524999 -9.399999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R26 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 189 FT_REF1))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 84.1756 -23.843999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R27 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 191 FT_RESET1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 46.700001 -37.625)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R30 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 38 AVR_RESET))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 28 -7.499998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R31 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 35 AVR_LED3))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 252 NetLED12_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 36.2204 -22.8854)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R32 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 266 NetR32_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 79.1464 -25.841198)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R33 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 267 NetR33_2))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 3 3V3_BATT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 76.675 -33.2)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R34 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 216 MKM_CS_N))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 3 3V3_BATT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 78.999999 -7.374999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R38 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 253 NetLED13_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 39.249998 -71.575)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R39 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 130 FPGA_DONE))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 129 FPGA_DONE_INT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 84.209001 -71.7296)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R40 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 154 FPGA_INIT_B_INT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 35.200001 -67.649999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R41 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 168 FPGA_PROGRAM_B))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 92.9132 -72.1106)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R42 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 155 FPGA_INIT_B))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.3356 -68.4022)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R43 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 161 FPGA_JTAG_TDI))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.3102 -65.8622)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R44 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 163 FPGA_JTAG_TMS))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 94.3102 -63.3476)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R45 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 160 FPGA_JTAG_TCK))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 12.9 -32.824999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R46 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 291 SPI_A_TRISTATE))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 12.875001 -28.549999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R47 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 292 SPI_B_TRISTATE))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 68.58 -88.4428)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R49 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 261 NetQ5_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 12.999999 -24.2)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R50 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 173 FPGA_PROM_W_N))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42.525 -29.475001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R51 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 169 FPGA_PROM_CS_N))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 35.2298 -71.8058)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R52 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 268 NetR52_1))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.8102 -75.8444)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R53 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 269 NetR53_2))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 11.091799 -45.72)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R54 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 270 NetR54_1))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 15.5194 -41.7322)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R55 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 271 NetR55_2))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.8102 -80.391)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R56 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 237 NetC117_2))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 31.5468 -78.105)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R57 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 237 NetC117_2))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 15.367 -37.338)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R58 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 239 NetC118_2))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 14.732 -39.5478)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R59 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 239 NetC118_2))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 36.6 -81.475001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R60 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 9.525 -35.8648)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R61 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 84.209001 -73.1266)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R62 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 154 FPGA_INIT_B_INT))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 153 FPGA_INIT_B_INT1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 37.225 -67.649999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R63 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 167 FPGA_PROGRAM_B1))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 168 FPGA_PROGRAM_B))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 81.000001 -7.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R64 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 255 NetLED15_1))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 150 FPGA_GPIO_LED_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 44.699999 -61.349999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R65 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 272 NetR65_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 22.0726 -62.8904)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R66 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 273 NetR66_1))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 29.3116 -62.8904)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R67 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 274 NetR67_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 26.924 -64.5668)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R68 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 242 NetC208_2))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 24.4856 -64.5668)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R69 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 242 NetC208_2))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.3022 -64.5668)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R70 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 37.275 -69.025)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R71 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 127 FPGA_CFG_SCLK1))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 128 FPGA_CFG_SCLK))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 17.78 -63.093603)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R72 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 301 VCC_5V0))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 285 PWR_ENA_VCCINT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 10.9982 -50.165)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R73 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 301 VCC_5V0))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 280 POK_VCCAUX))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 11.5 -44.699999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R74 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 280 POK_VCCAUX))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 286 PWR_ENA_VCCO))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 34.417 -70.358)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R75 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 301 VCC_5V0))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 281 POK_VCCINT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 32.475 -75.625)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R76 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 281 POK_VCCINT))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 284 PWR_ENA_VCCAUX))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 12.971201 -42.156601)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R77 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 301 VCC_5V0))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 282 POK_VCCO))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 83.400001 -4.800001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R78 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 258 NetLED18_1))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 301 VCC_5V0))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 76.327 -25.841198)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R80 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 3 3V3_BATT))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 214 MKM_CONTROL_AVR_ENA))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 69.175 -35.150001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R81 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 215 MKM_CONTROL_FPGA_DIS))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 70.2056 -36.229798)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R82 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 3 3V3_BATT))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 37 AVR_PANIC))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 37.149999 -66)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R83 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 126 FPGA_CFG_MOSI))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 125 FPGA_CFG_MOSI1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 37.149999 -64.560668)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R84 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 123 FPGA_CFG_MISO1))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 124 FPGA_CFG_MISO))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 37.149999 -63.050001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R85 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 120 FPGA_CFG_CS_N))
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 119 FPGA_CFG_CS_N1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 16.752301 -16.240001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R86 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 196 FT_TXD1))
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 197 FT_TXD))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 15.495001 -16.240001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R87 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 195 FT_RXD))
    (pad 2 smd rect (at 0 0.5 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 194 FT_RXD1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 92.608403 -15.131799)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R88 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 183 FT_MGMT_TXD1))
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 184 FT_MGMT_TXD))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 92.608403 -16.604999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R89 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 182 FT_MGMT_RXD))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 181 FT_MGMT_RXD1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 92.6084 -13.633199)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R90 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 184 FT_MGMT_TXD))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 18.009601 -16.239998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R91 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 197 FT_TXD))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 46.999997 -7.499998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R92 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 14 ARM_LED2))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 245 NetLED1_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 40.999997 -7.499998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R93 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 247 NetLED3_1))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 13 ARM_LED1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 42.999998 -7.499998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R94 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 16 ARM_LED4))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 246 NetLED2_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 30.000001 -7.499998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R95 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 249 NetLED9_1))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 34 AVR_LED2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 24 -7.499998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R96 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 33 AVR_LED1))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 251 NetLED11_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 26.000001 -7.499998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R97 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 250 NetLED10_1))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 36 AVR_LED4))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 78.999999 -7.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R98 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 151 FPGA_GPIO_LED_2))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 256 NetLED16_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 77.000001 -7.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R99 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 254 NetLED14_1))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 152 FPGA_GPIO_LED_3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 75 -7.000001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R100 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 149 FPGA_GPIO_LED_0))
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
      (net 257 NetLED17_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module WE-SHC_36103205_NO_CREAM (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 83.82 -87.7454)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference S1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value WE-SHC_36103205_NO_CREAM (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 10.2616 -10.3886 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -10.25 -10.3886 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -10.25 7.83 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 10.2616 7.83 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 9.1186 -11.5316 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -9.1 -11.5316 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -9.1 8.98 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 9.1186 8.98 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 3.7592 -11.5316 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 3.7592 8.98 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -3.75 8.98 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -3.75 -11.5316 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 10.2616 -5.0292 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 10.2616 2.48 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -10.25 2.48 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -10.25 -5.0292 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
  )

  (module TACTILE_SWITCH (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 62.799999 -5.3608)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference S2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value TACTILE_SWITCH (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad G1 smd rect (at 2.517 0 270) (size 1.016 0.45) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad G2 smd rect (at -2.535 0 270) (size 1.016 0.45) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad B2 smd rect (at -1.8542 -2.2 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad B1 smd rect (at -1.8542 2.2098 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad A1 smd rect (at 1.85 2.2098 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask))
    (pad A2 smd rect (at 1.85 -2.2 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask)
      (net 37 AVR_PANIC))
  )

  (module PLS-8 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 40.300001 -1.3)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference SV1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 8 thru_hole circle (at 8.89 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 1 thru_hole rect (at -8.89 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (pad 2 thru_hole circle (at -6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 160 FPGA_JTAG_TCK))
    (pad 3 thru_hole circle (at -3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 163 FPGA_JTAG_TMS))
    (pad 4 thru_hole circle (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 161 FPGA_JTAG_TDI))
    (pad 5 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 162 FPGA_JTAG_TDO))
    (pad 6 thru_hole circle (at 3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 7 thru_hole circle (at 6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/A962434E-CFE5.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module PLD-16 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 59.582995 -97.7646)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference SV2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 140 FPGA_GPIO_A_7))
    (pad 15 thru_hole circle (at -8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 139 FPGA_GPIO_A_6))
    (pad 14 thru_hole circle (at -6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 138 FPGA_GPIO_A_5))
    (pad 13 thru_hole circle (at -6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 137 FPGA_GPIO_A_4))
    (pad 12 thru_hole circle (at -3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 11 thru_hole circle (at -3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 136 FPGA_GPIO_A_3))
    (pad 9 thru_hole circle (at -1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 135 FPGA_GPIO_A_2))
    (pad 8 thru_hole circle (at 1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 134 FPGA_GPIO_A_1))
    (pad 7 thru_hole circle (at 1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 133 FPGA_GPIO_A_0))
    (pad 6 thru_hole circle (at 3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 5 thru_hole circle (at 3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 4 thru_hole circle (at 6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (pad 3 thru_hole circle (at 6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (pad 2 thru_hole circle (at 8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (pad 1 thru_hole rect (at 8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B280C847-2543.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module PLD-16 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 36.799195 -97.7646)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference SV3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 thru_hole rect (at 8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (pad 2 thru_hole circle (at 8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (pad 3 thru_hole circle (at 6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (pad 4 thru_hole circle (at 6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 302 VCCO_3V3))
    (pad 5 thru_hole circle (at 3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 6 thru_hole circle (at 3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 7 thru_hole circle (at 1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 141 FPGA_GPIO_B_0))
    (pad 8 thru_hole circle (at 1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 142 FPGA_GPIO_B_1))
    (pad 9 thru_hole circle (at -1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 143 FPGA_GPIO_B_2))
    (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 144 FPGA_GPIO_B_3))
    (pad 11 thru_hole circle (at -3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 12 thru_hole circle (at -3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 6 GND))
    (pad 13 thru_hole circle (at -6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 145 FPGA_GPIO_B_4))
    (pad 14 thru_hole circle (at -6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 146 FPGA_GPIO_B_5))
    (pad 15 thru_hole circle (at -8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 147 FPGA_GPIO_B_6))
    (pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
      (net 148 FPGA_GPIO_B_7))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/B280C847-2543.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 90.2208 -88.1634)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference T1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 3 smd rect (at 0 1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 287 RAW_NOISE))
    (pad 2 smd rect (at 0.95 -1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 1 smd rect (at -0.95 -1.1 270) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 276 NOISE_OUT))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 84.201 -82.7532)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference T2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.95 1.1 90) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 7 NetC15_2))
    (pad 2 smd rect (at -0.95 1.1 90) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 3 smd rect (at 0 -1.1 90) (size 1.2 0.800001) (layers B.Cu B.Paste B.Mask)
      (net 8 AMPLIFIED))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/04B9CA18-3B1B.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module B1,27 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 88.3158 -85.1408)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference TP1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value B1,27 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad TP smd circle (at 0 0) (size 1.27 1.27) (layers B.Cu B.Paste B.Mask)
      (net 287 RAW_NOISE))
  )

  (module B1,27 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 82.1436 -85.1408)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference TP2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value B1,27 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad TP smd circle (at 0 0) (size 1.27 1.27) (layers B.Cu B.Paste B.Mask)
      (net 8 AMPLIFIED))
  )

  (module NDY (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 22.2758 -78.2828)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value NDY (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 -6.35 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 283 PWR_18V))
    (pad 2 smd rect (at 0 -5.08 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 283 PWR_18V))
    (pad 3 smd rect (at 0 -3.81 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 4 smd rect (at 0 -2.54 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 264 NetR3_2))
    (pad 5 smd rect (at 0 -1.27 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 6 smd rect (at 0 0 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 7 smd rect (at 0 1.27 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 265 NetR8_1))
    (pad TP1 smd rect (at -9.525 0 90) (size 9.144 13.3858) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 8 smd rect (at 0 2.54 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 224 NetC5_1))
    (pad 9 smd rect (at 0 3.81 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask))
    (pad 10 smd rect (at 0 5.08 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 11 smd rect (at 0 6.35 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
  )

  (module TSOT-8-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 70.500001 -89.750001)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value TSOT-8-23 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1.3 -0.975) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
      (net 4 15V_LDO_ENABLE))
    (pad 2 smd rect (at -1.3 -0.325) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 3 smd rect (at -1.3 0.3302) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 4 smd rect (at -1.3 0.9906) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 5 smd rect (at 1.3208 0.9906) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
      (net 283 PWR_18V))
    (pad 6 smd rect (at 1.3208 0.3302) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
      (net 5 15V_STABLE))
    (pad 7 smd rect (at 1.3208 -0.325) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
      (net 225 NetC11_1))
    (pad 8 smd rect (at 1.3208 -0.975) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
      (net 226 NetC12_2))
  )

  (module SOT-23-5 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 77.3684 -85.1408)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U3 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 5 smd rect (at -1.35 -0.95 90) (size 0.650001 1.1) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 4 smd rect (at -1.35 0.95 90) (size 0.650001 1.1) (layers B.Cu B.Paste B.Mask)
      (net 42 DIGITIZED_NOISE))
    (pad 3 smd rect (at 1.35 0.95 90) (size 0.650001 1.1) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 1.35 0 90) (size 0.650001 1.1) (layers B.Cu B.Paste B.Mask)
      (net 8 AMPLIFIED))
    (pad 1 smd oval (at 1.35 -0.95 90) (size 0.650001 1.1) (layers B.Cu B.Paste B.Mask))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/612DFB50-5309.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module TSQFP50P3000X3000X160-208N (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 48.6918 -32.6136)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U4 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "TSQFP, 208-Leads, Body 28,00x28,00mm, Pitch 0,50mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 208 smd oval (at -12.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 99 FMC_D29))
    (pad 207 smd oval (at -12.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 98 FMC_D28))
    (pad 206 smd oval (at -11.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 105 FMC_NBL3))
    (pad 205 smd oval (at -11.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 104 FMC_NBL2))
    (pad 204 smd oval (at -10.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 203 smd oval (at -10.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 202 smd oval (at -9.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 201 smd oval (at -9.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 103 FMC_NBL1))
    (pad 200 smd oval (at -8.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 102 FMC_NBL0))
    (pad 199 smd oval (at -8.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 198 smd oval (at -7.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 197 smd oval (at -7.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 39 BOOT0))
    (pad 196 smd oval (at -6.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 107 FMC_NL))
    (pad 195 smd oval (at -6.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 116 FMC_SDNE1))
    (pad 194 smd oval (at -5.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 112 FMC_SDCKE1))
    (pad 193 smd oval (at -5.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 192 smd oval (at -4.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 191 smd oval (at -4.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 114 FMC_SDNCAS))
    (pad 190 smd oval (at -3.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 16 ARM_LED4))
    (pad 189 smd oval (at -3.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 15 ARM_LED3))
    (pad 188 smd oval (at -2.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 14 ARM_LED2))
    (pad 187 smd oval (at -2.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 13 ARM_LED1))
    (pad 186 smd oval (at -1.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 185 smd oval (at -1.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 184 smd oval (at -0.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 183 smd oval (at -0.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 68 FMC_A25))
    (pad 182 smd oval (at 0.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 67 FMC_A24))
    (pad 181 smd oval (at 0.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 180 smd oval (at 1.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 179 smd oval (at 1.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 178 smd oval (at 2.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 177 smd oval (at 2.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 130 FPGA_DONE))
    (pad 176 smd oval (at 3.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 175 smd oval (at 3.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 159 FPGA_IRQ_N_3))
    (pad 174 smd oval (at 4.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 158 FPGA_IRQ_N_2))
    (pad 173 smd oval (at 4.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 106 FMC_NE1))
    (pad 172 smd oval (at 5.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 109 FMC_NWAIT))
    (pad 171 smd oval (at 5.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 170 smd oval (at 6.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 169 smd oval (at 6.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 110 FMC_NWE))
    (pad 168 smd oval (at 7.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 108 FMC_NOE))
    (pad 167 smd oval (at 7.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 69 FMC_CLK))
    (pad 166 smd oval (at 8.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 165 smd oval (at 8.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 73 FMC_D3))
    (pad 164 smd oval (at 9.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 72 FMC_D2))
    (pad 163 smd oval (at 9.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 162 smd oval (at 10.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 161 smd oval (at 10.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 160 smd oval (at 11.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 159 smd oval (at 11.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 293 SWDCLK))
    (pad 158 smd oval (at 12.25 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 157 smd oval (at 12.75 14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 97 FMC_D27))
    (pad 156 smd oval (at 14.75 12.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 96 FMC_D26))
    (pad 155 smd oval (at 14.75 12.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 95 FMC_D25))
    (pad 154 smd oval (at 14.75 11.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 94 FMC_D24))
    (pad 153 smd oval (at 14.75 11.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 93 FMC_D23))
    (pad 152 smd oval (at 14.75 10.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 92 FMC_D22))
    (pad 151 smd oval (at 14.75 10.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 91 FMC_D21))
    (pad 150 smd oval (at 14.75 9.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 149 smd oval (at 14.75 9.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 148 smd oval (at 14.75 8.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 300 VCAP2))
    (pad 147 smd oval (at 14.75 8.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 294 SWDIO))
    (pad 146 smd oval (at 14.75 7.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 178 FT_MGMT_CTS))
    (pad 145 smd oval (at 14.75 7.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 180 FT_MGMT_RTS))
    (pad 144 smd oval (at 14.75 6.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 184 FT_MGMT_TXD))
    (pad 143 smd oval (at 14.75 6.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 182 FT_MGMT_RXD))
    (pad 142 smd oval (at 14.75 5.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 179 FT_MGMT_DTR))
    (pad 141 smd oval (at 14.75 5.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 140 smd oval (at 14.75 4.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 139 smd oval (at 14.75 4.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 138 smd oval (at 14.75 3.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 137 smd oval (at 14.75 3.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 136 smd oval (at 14.75 2.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 135 smd oval (at 14.75 2.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 113 FMC_SDCLK))
    (pad 134 smd oval (at 14.75 1.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 133 smd oval (at 14.75 1.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 132 smd oval (at 14.75 0.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 58 FMC_A15))
    (pad 131 smd oval (at 14.75 0.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 57 FMC_A14))
    (pad 130 smd oval (at 14.75 -0.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 56 FMC_A13))
    (pad 129 smd oval (at 14.75 -0.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 55 FMC_A12))
    (pad 128 smd oval (at 14.75 -1.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 127 smd oval (at 14.75 -1.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 126 smd oval (at 14.75 -2.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 125 smd oval (at 14.75 -2.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 124 smd oval (at 14.75 -3.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 123 smd oval (at 14.75 -3.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 157 FPGA_IRQ_N_1))
    (pad 122 smd oval (at 14.75 -4.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 156 FPGA_IRQ_N_0))
    (pad 121 smd oval (at 14.75 -4.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 120 smd oval (at 14.75 -5.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 168 FPGA_PROGRAM_B))
    (pad 119 smd oval (at 14.75 -5.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 155 FPGA_INIT_B))
    (pad 118 smd oval (at 14.75 -6.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 117 smd oval (at 14.75 -6.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 71 FMC_D1))
    (pad 116 smd oval (at 14.75 -7.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 70 FMC_D0))
    (pad 115 smd oval (at 14.75 -7.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 114 smd oval (at 14.75 -8.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 113 smd oval (at 14.75 -8.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 61 FMC_A18))
    (pad 112 smd oval (at 14.75 -9.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 60 FMC_A17))
    (pad 111 smd oval (at 14.75 -9.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 59 FMC_A16))
    (pad 110 smd oval (at 14.75 -10.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 85 FMC_D15))
    (pad 109 smd oval (at 14.75 -10.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 84 FMC_D14))
    (pad 108 smd oval (at 14.75 -11.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 83 FMC_D13))
    (pad 107 smd oval (at 14.75 -11.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 11 ARM_FPGA_CFG_MOSI))
    (pad 106 smd oval (at 14.75 -12.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 10 ARM_FPGA_CFG_MISO))
    (pad 105 smd oval (at 14.75 -12.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 12 ARM_FPGA_CFG_SCLK))
    (pad 104 smd oval (at 12.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 9 ARM_FPGA_CFG_CS_N))
    (pad 103 smd oval (at 12.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 102 smd oval (at 11.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 90 FMC_D20))
    (pad 101 smd oval (at 11.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 89 FMC_D19))
    (pad 100 smd oval (at 10.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 88 FMC_D18))
    (pad 99 smd oval (at 10.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 87 FMC_D17))
    (pad 98 smd oval (at 9.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 86 FMC_D16))
    (pad 97 smd oval (at 9.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 25 AVR_GPIO_ARM_0))
    (pad 96 smd oval (at 8.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 26 AVR_GPIO_ARM_1))
    (pad 95 smd oval (at 8.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 94 smd oval (at 7.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 93 smd oval (at 7.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 92 smd oval (at 6.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 299 VCAP1))
    (pad 91 smd oval (at 6.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 27 AVR_GPIO_ARM_2))
    (pad 90 smd oval (at 5.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 28 AVR_GPIO_ARM_3))
    (pad 89 smd oval (at 5.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 82 FMC_D12))
    (pad 88 smd oval (at 4.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 81 FMC_D11))
    (pad 87 smd oval (at 4.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 80 FMC_D10))
    (pad 86 smd oval (at 3.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 79 FMC_D9))
    (pad 85 smd oval (at 3.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 78 FMC_D8))
    (pad 84 smd oval (at 2.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 77 FMC_D7))
    (pad 83 smd oval (at 2.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 82 smd oval (at 1.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 81 smd oval (at 1.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 76 FMC_D6))
    (pad 80 smd oval (at 0.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 75 FMC_D5))
    (pad 79 smd oval (at 0.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 74 FMC_D4))
    (pad 78 smd oval (at -0.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 54 FMC_A11))
    (pad 77 smd oval (at -0.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 53 FMC_A10))
    (pad 76 smd oval (at -1.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 52 FMC_A9))
    (pad 75 smd oval (at -1.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 51 FMC_A8))
    (pad 74 smd oval (at -2.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 50 FMC_A7))
    (pad 73 smd oval (at -2.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 72 smd oval (at -3.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 71 smd oval (at -3.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 49 FMC_A6))
    (pad 70 smd oval (at -4.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 117 FMC_SDNRAS))
    (pad 69 smd oval (at -4.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 68 smd oval (at -5.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 67 smd oval (at -5.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 66 smd oval (at -6.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 65 smd oval (at -6.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 64 smd oval (at -7.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 63 smd oval (at -7.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 62 smd oval (at -8.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 61 smd oval (at -8.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 206 KSM_PROM_CS_N))
    (pad 60 smd oval (at -9.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 59 smd oval (at -9.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 58 smd oval (at -10.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 57 smd oval (at -10.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 56 smd oval (at -11.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 208 KSM_PROM_MOSI))
    (pad 55 smd oval (at -11.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 207 KSM_PROM_MISO))
    (pad 54 smd oval (at -12.25 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 209 KSM_PROM_SCLK))
    (pad 53 smd oval (at -12.75 -14.75) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 177 FT_DTR))
    (pad 52 smd oval (at -14.75 -12.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 51 smd oval (at -14.75 -12.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 50 smd oval (at -14.75 -11.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 197 FT_TXD))
    (pad 49 smd oval (at -14.75 -11.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 290 RTC_SDA))
    (pad 48 smd oval (at -14.75 -10.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 289 RTC_SCL))
    (pad 47 smd oval (at -14.75 -10.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 288 RTC_MFP))
    (pad 46 smd oval (at -14.75 -9.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 45 smd oval (at -14.75 -9.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 195 FT_RXD))
    (pad 44 smd oval (at -14.75 -8.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 176 FT_CTS))
    (pad 43 smd oval (at -14.75 -8.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 193 FT_RTS))
    (pad 42 smd oval (at -14.75 -7.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 41 smd oval (at -14.75 -7.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 40 smd oval (at -14.75 -6.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 39 smd oval (at -14.75 -6.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 38 smd oval (at -14.75 -5.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 111 FMC_SDCKE0))
    (pad 37 smd oval (at -14.75 -5.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 115 FMC_SDNE0))
    (pad 36 smd oval (at -14.75 -4.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 35 smd oval (at -14.75 -4.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 118 FMC_SDNWE))
    (pad 34 smd oval (at -14.75 -3.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 277 NRST))
    (pad 33 smd oval (at -14.75 -3.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 279 OSC_OUT))
    (pad 32 smd oval (at -14.75 -2.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 278 OSC_IN))
    (pad 31 smd oval (at -14.75 -2.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 30 smd oval (at -14.75 -1.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 29 smd oval (at -14.75 -1.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 28 smd oval (at -14.75 -0.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 27 smd oval (at -14.75 -0.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 121 FPGA_CFG_CTRL_ARM_ENA))
    (pad 26 smd oval (at -14.75 0.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 25 smd oval (at -14.75 0.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 24 smd oval (at -14.75 1.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 48 FMC_A5))
    (pad 23 smd oval (at -14.75 1.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 47 FMC_A4))
    (pad 22 smd oval (at -14.75 2.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 46 FMC_A3))
    (pad 21 smd oval (at -14.75 2.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 122 FPGA_CFG_CTRL_FPGA_DIS))
    (pad 20 smd oval (at -14.75 3.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 19 smd oval (at -14.75 3.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 18 smd oval (at -14.75 4.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 45 FMC_A2))
    (pad 17 smd oval (at -14.75 4.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 44 FMC_A1))
    (pad 16 smd oval (at -14.75 5.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 43 FMC_A0))
    (pad 15 smd oval (at -14.75 5.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 14 smd oval (at -14.75 6.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 13 smd oval (at -14.75 6.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 12 smd oval (at -14.75 7.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 101 FMC_D31))
    (pad 11 smd oval (at -14.75 7.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 100 FMC_D30))
    (pad 10 smd oval (at -14.75 8.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 9 smd oval (at -14.75 8.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 8 smd oval (at -14.75 9.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 7 smd oval (at -14.75 9.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 6 smd oval (at -14.75 10.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 266 NetR32_2))
    (pad 5 smd oval (at -14.75 10.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 65 FMC_A22))
    (pad 4 smd oval (at -14.75 11.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 64 FMC_A21))
    (pad 3 smd oval (at -14.75 11.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 63 FMC_A20))
    (pad 2 smd oval (at -14.75 12.25 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 62 FMC_A19))
    (pad 1 smd oval (at -14.75 12.75 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 66 FMC_A23))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/1B9BC620-BA33.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module TSSOP50P1180X120-86N (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 86.170399 -49.8264)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "TSSOP, 86-Leads, Body 22,22x10,16mm, Pitch 0,50mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 44 smd oval (at -5.75 -10.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 45 smd oval (at -5.75 -10 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 94 FMC_D24))
    (pad 46 smd oval (at -5.75 -9.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 47 smd oval (at -5.75 -9 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 95 FMC_D25))
    (pad 48 smd oval (at -5.75 -8.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 96 FMC_D26))
    (pad 49 smd oval (at -5.75 -8 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 50 smd oval (at -5.75 -7.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 97 FMC_D27))
    (pad 51 smd oval (at -5.75 -7 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 98 FMC_D28))
    (pad 52 smd oval (at -5.75 -6.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 53 smd oval (at -5.75 -6 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 99 FMC_D29))
    (pad 54 smd oval (at -5.75 -5.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 100 FMC_D30))
    (pad 55 smd oval (at -5.75 -5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 56 smd oval (at -5.75 -4.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 101 FMC_D31))
    (pad 57 smd oval (at -5.75 -4 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask))
    (pad 58 smd oval (at -5.75 -3.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 59 smd oval (at -5.75 -3 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 105 FMC_NBL3))
    (pad 60 smd oval (at -5.75 -2.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 46 FMC_A3))
    (pad 61 smd oval (at -5.75 -2 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 47 FMC_A4))
    (pad 62 smd oval (at -5.75 -1.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 48 FMC_A5))
    (pad 63 smd oval (at -5.75 -1 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 49 FMC_A6))
    (pad 64 smd oval (at -5.75 -0.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 50 FMC_A7))
    (pad 65 smd oval (at -5.75 0 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 51 FMC_A8))
    (pad 66 smd oval (at -5.75 0.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 52 FMC_A9))
    (pad 67 smd oval (at -5.75 1 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 111 FMC_SDCKE0))
    (pad 68 smd oval (at -5.75 1.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 113 FMC_SDCLK))
    (pad 69 smd oval (at -5.75 2 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 55 FMC_A12))
    (pad 70 smd oval (at -5.75 2.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask))
    (pad 71 smd oval (at -5.75 3 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 103 FMC_NBL1))
    (pad 72 smd oval (at -5.75 3.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 73 smd oval (at -5.75 4 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask))
    (pad 74 smd oval (at -5.75 4.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 78 FMC_D8))
    (pad 75 smd oval (at -5.75 5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 76 smd oval (at -5.75 5.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 79 FMC_D9))
    (pad 77 smd oval (at -5.75 6 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 80 FMC_D10))
    (pad 78 smd oval (at -5.75 6.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 79 smd oval (at -5.75 7 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 81 FMC_D11))
    (pad 80 smd oval (at -5.75 7.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 82 FMC_D12))
    (pad 81 smd oval (at -5.75 8 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 82 smd oval (at -5.75 8.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 83 FMC_D13))
    (pad 83 smd oval (at -5.75 9 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 84 FMC_D14))
    (pad 84 smd oval (at -5.75 9.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 85 smd oval (at -5.75 10 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 85 FMC_D15))
    (pad 86 smd oval (at -5.75 10.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 43 smd oval (at 5.75 -10.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 42 smd oval (at 5.75 -10 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 93 FMC_D23))
    (pad 41 smd oval (at 5.75 -9.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 40 smd oval (at 5.75 -9 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 92 FMC_D22))
    (pad 39 smd oval (at 5.75 -8.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 91 FMC_D21))
    (pad 38 smd oval (at 5.75 -8 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 37 smd oval (at 5.75 -7.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 90 FMC_D20))
    (pad 36 smd oval (at 5.75 -7 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 89 FMC_D19))
    (pad 35 smd oval (at 5.75 -6.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 34 smd oval (at 5.75 -6 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 88 FMC_D18))
    (pad 33 smd oval (at 5.75 -5.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 87 FMC_D17))
    (pad 32 smd oval (at 5.75 -5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 31 smd oval (at 5.75 -4.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 86 FMC_D16))
    (pad 30 smd oval (at 5.75 -4 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask))
    (pad 29 smd oval (at 5.75 -3.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 28 smd oval (at 5.75 -3 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 104 FMC_NBL2))
    (pad 27 smd oval (at 5.75 -2.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 45 FMC_A2))
    (pad 26 smd oval (at 5.75 -2 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 44 FMC_A1))
    (pad 25 smd oval (at 5.75 -1.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 43 FMC_A0))
    (pad 24 smd oval (at 5.75 -1 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 53 FMC_A10))
    (pad 23 smd oval (at 5.75 -0.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 58 FMC_A15))
    (pad 22 smd oval (at 5.75 0 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 57 FMC_A14))
    (pad 21 smd oval (at 5.75 0.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 54 FMC_A11))
    (pad 20 smd oval (at 5.75 1 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 115 FMC_SDNE0))
    (pad 19 smd oval (at 5.75 1.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 117 FMC_SDNRAS))
    (pad 18 smd oval (at 5.75 2 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 114 FMC_SDNCAS))
    (pad 17 smd oval (at 5.75 2.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 118 FMC_SDNWE))
    (pad 16 smd oval (at 5.75 3 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 102 FMC_NBL0))
    (pad 15 smd oval (at 5.75 3.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 14 smd oval (at 5.75 4 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask))
    (pad 13 smd oval (at 5.75 4.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 77 FMC_D7))
    (pad 12 smd oval (at 5.75 5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 11 smd oval (at 5.75 5.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 76 FMC_D6))
    (pad 10 smd oval (at 5.75 6 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 75 FMC_D5))
    (pad 9 smd oval (at 5.75 6.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask))
    (pad 8 smd oval (at 5.75 7 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 74 FMC_D4))
    (pad 7 smd oval (at 5.75 7.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 73 FMC_D3))
    (pad 6 smd oval (at 5.75 8 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 5 smd oval (at 5.75 8.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 72 FMC_D2))
    (pad 4 smd oval (at 5.75 9 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 71 FMC_D1))
    (pad 3 smd oval (at 5.75 9.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd oval (at 5.75 10 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 70 FMC_D0))
    (pad 1 smd oval (at 5.75 10.5 270) (size 0.299999 1.2) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/D87FE1D2-D8B7.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module TSSOP50P1180X120-86N (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 80.6704 -49.8264)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U6 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "TSSOP, 86-Leads, Body 22,22x10,16mm, Pitch 0,50mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd oval (at -5.75 10.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 2 smd oval (at -5.75 10 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 70 FMC_D0))
    (pad 3 smd oval (at -5.75 9.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 4 smd oval (at -5.75 9 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 71 FMC_D1))
    (pad 5 smd oval (at -5.75 8.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 72 FMC_D2))
    (pad 6 smd oval (at -5.75 8 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 7 smd oval (at -5.75 7.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 73 FMC_D3))
    (pad 8 smd oval (at -5.75 7 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 74 FMC_D4))
    (pad 9 smd oval (at -5.75 6.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 10 smd oval (at -5.75 6 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 75 FMC_D5))
    (pad 11 smd oval (at -5.75 5.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 76 FMC_D6))
    (pad 12 smd oval (at -5.75 5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 13 smd oval (at -5.75 4.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 77 FMC_D7))
    (pad 14 smd oval (at -5.75 4 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 15 smd oval (at -5.75 3.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 16 smd oval (at -5.75 3 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 102 FMC_NBL0))
    (pad 17 smd oval (at -5.75 2.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 118 FMC_SDNWE))
    (pad 18 smd oval (at -5.75 2 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 114 FMC_SDNCAS))
    (pad 19 smd oval (at -5.75 1.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 117 FMC_SDNRAS))
    (pad 20 smd oval (at -5.75 1 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 116 FMC_SDNE1))
    (pad 21 smd oval (at -5.75 0.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 54 FMC_A11))
    (pad 22 smd oval (at -5.75 0 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 57 FMC_A14))
    (pad 23 smd oval (at -5.75 -0.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 58 FMC_A15))
    (pad 24 smd oval (at -5.75 -1 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 53 FMC_A10))
    (pad 25 smd oval (at -5.75 -1.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 43 FMC_A0))
    (pad 26 smd oval (at -5.75 -2 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 44 FMC_A1))
    (pad 27 smd oval (at -5.75 -2.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 45 FMC_A2))
    (pad 28 smd oval (at -5.75 -3 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 104 FMC_NBL2))
    (pad 29 smd oval (at -5.75 -3.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 30 smd oval (at -5.75 -4 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 31 smd oval (at -5.75 -4.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 86 FMC_D16))
    (pad 32 smd oval (at -5.75 -5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 33 smd oval (at -5.75 -5.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 87 FMC_D17))
    (pad 34 smd oval (at -5.75 -6 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 88 FMC_D18))
    (pad 35 smd oval (at -5.75 -6.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 36 smd oval (at -5.75 -7 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 89 FMC_D19))
    (pad 37 smd oval (at -5.75 -7.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 90 FMC_D20))
    (pad 38 smd oval (at -5.75 -8 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 39 smd oval (at -5.75 -8.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 91 FMC_D21))
    (pad 40 smd oval (at -5.75 -9 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 92 FMC_D22))
    (pad 41 smd oval (at -5.75 -9.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 42 smd oval (at -5.75 -10 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 93 FMC_D23))
    (pad 43 smd oval (at -5.75 -10.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 86 smd oval (at 5.75 10.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 85 smd oval (at 5.75 10 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 85 FMC_D15))
    (pad 84 smd oval (at 5.75 9.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 83 smd oval (at 5.75 9 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 84 FMC_D14))
    (pad 82 smd oval (at 5.75 8.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 83 FMC_D13))
    (pad 81 smd oval (at 5.75 8 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 80 smd oval (at 5.75 7.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 82 FMC_D12))
    (pad 79 smd oval (at 5.75 7 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 81 FMC_D11))
    (pad 78 smd oval (at 5.75 6.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 77 smd oval (at 5.75 6 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 80 FMC_D10))
    (pad 76 smd oval (at 5.75 5.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 79 FMC_D9))
    (pad 75 smd oval (at 5.75 5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 74 smd oval (at 5.75 4.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 78 FMC_D8))
    (pad 73 smd oval (at 5.75 4 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 72 smd oval (at 5.75 3.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 71 smd oval (at 5.75 3 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 103 FMC_NBL1))
    (pad 70 smd oval (at 5.75 2.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 69 smd oval (at 5.75 2 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 55 FMC_A12))
    (pad 68 smd oval (at 5.75 1.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 113 FMC_SDCLK))
    (pad 67 smd oval (at 5.75 1 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 112 FMC_SDCKE1))
    (pad 66 smd oval (at 5.75 0.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 52 FMC_A9))
    (pad 65 smd oval (at 5.75 0 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 51 FMC_A8))
    (pad 64 smd oval (at 5.75 -0.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 50 FMC_A7))
    (pad 63 smd oval (at 5.75 -1 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 49 FMC_A6))
    (pad 62 smd oval (at 5.75 -1.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 48 FMC_A5))
    (pad 61 smd oval (at 5.75 -2 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 47 FMC_A4))
    (pad 60 smd oval (at 5.75 -2.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 46 FMC_A3))
    (pad 59 smd oval (at 5.75 -3 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 105 FMC_NBL3))
    (pad 58 smd oval (at 5.75 -3.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 57 smd oval (at 5.75 -4 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask))
    (pad 56 smd oval (at 5.75 -4.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 101 FMC_D31))
    (pad 55 smd oval (at 5.75 -5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 54 smd oval (at 5.75 -5.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 100 FMC_D30))
    (pad 53 smd oval (at 5.75 -6 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 99 FMC_D29))
    (pad 52 smd oval (at 5.75 -6.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 51 smd oval (at 5.75 -7 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 98 FMC_D28))
    (pad 50 smd oval (at 5.75 -7.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 97 FMC_D27))
    (pad 49 smd oval (at 5.75 -8 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad 48 smd oval (at 5.75 -8.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 96 FMC_D26))
    (pad 47 smd oval (at 5.75 -9 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 95 FMC_D25))
    (pad 46 smd oval (at 5.75 -9.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 45 smd oval (at 5.75 -10 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 94 FMC_D24))
    (pad 44 smd oval (at 5.75 -10.5 270) (size 0.299999 1.2) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/D87FE1D2-D8B7.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module SOIC127P600X175-8N (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 25.6 -43.449999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U7 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value SOIC127P600X175-8N (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 8 smd rect (at 2.6924 -1.905) (size 1.549999 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (pad 7 smd rect (at 2.6924 -0.635) (size 1.549999 0.6) (layers F.Cu F.Paste F.Mask)
      (net 288 RTC_MFP))
    (pad 6 smd rect (at 2.6924 0.635) (size 1.549999 0.6) (layers F.Cu F.Paste F.Mask)
      (net 289 RTC_SCL))
    (pad 5 smd rect (at 2.6924 1.905) (size 1.549999 0.6) (layers F.Cu F.Paste F.Mask)
      (net 290 RTC_SDA))
    (pad 4 smd rect (at -2.7178 1.905) (size 1.549999 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 3 smd rect (at -2.7178 0.635) (size 1.549999 0.6) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (pad 2 smd rect (at -2.7178 -0.635) (size 1.549999 0.6) (layers F.Cu F.Paste F.Mask)
      (net 229 NetC71_2))
    (pad 1 smd rect (at -2.7178 -1.905) (size 1.549999 0.6) (layers F.Cu F.Paste F.Mask)
      (net 228 NetC70_2))
  )

  (module LQFP-48 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 13.818601 -9.635998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U8 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "TSQFP, 48-Leads, Body 9,3x9,3mm (max), Pitch 0,50mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 48 smd rect (at 2.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 47 smd rect (at 2.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 46 smd rect (at 1.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 45 smd rect (at 1.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 44 smd rect (at 0.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 43 smd rect (at 0.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 42 smd rect (at -0.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 41 smd rect (at -0.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 40 smd rect (at -1.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 205 FT_VREGIN))
    (pad 39 smd rect (at -1.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 38 smd rect (at -2.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 202 FT_VCCORE))
    (pad 37 smd rect (at -2.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 200 FT_VCCA))
    (pad 36 smd rect (at -4.05 2.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 35 smd rect (at -4.05 2.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 34 smd rect (at -4.05 1.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 192 FT_RESET))
    (pad 33 smd rect (at -4.05 1.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 32 smd rect (at -4.05 0.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 31 smd rect (at -4.05 0.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 30 smd rect (at -4.05 -0.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 29 smd rect (at -4.05 -0.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 28 smd rect (at -4.05 -1.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 27 smd rect (at -4.05 -1.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 26 smd rect (at -4.05 -2.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 25 smd rect (at -4.05 -2.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 24 smd rect (at -2.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 23 smd rect (at -2.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 22 smd rect (at -1.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 21 smd rect (at -1.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 20 smd rect (at -0.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 19 smd rect (at -0.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 18 smd rect (at 0.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 17 smd rect (at 0.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 177 FT_DTR))
    (pad 16 smd rect (at 1.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 176 FT_CTS))
    (pad 15 smd rect (at 1.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 193 FT_RTS))
    (pad 14 smd rect (at 2.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 194 FT_RXD1))
    (pad 13 smd rect (at 2.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 196 FT_TXD1))
    (pad 12 smd rect (at 4.05 -2.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 198 FT_VCC3V3))
    (pad 11 smd rect (at 4.05 -2.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 10 smd rect (at 4.05 -1.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 9 smd rect (at 4.05 -1.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 8 smd rect (at 4.05 -0.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 204 FT_VPLL))
    (pad 7 smd rect (at 4.05 -0.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 298 USB_P))
    (pad 6 smd rect (at 4.05 0.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 297 USB_N))
    (pad 5 smd rect (at 4.05 0.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 190 FT_REF))
    (pad 4 smd rect (at 4.05 1.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 3 smd rect (at 4.05 1.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 203 FT_VPHY))
    (pad 2 smd rect (at 4.05 2.25 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 231 NetC78_2))
    (pad 1 smd rect (at 4.05 2.75 270) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 230 NetC75_2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/6B6B27F8-B7AC.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module LQFP-48 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 86.3854 -17.849599)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U9 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "TSQFP, 48-Leads, Body 9,3x9,3mm (max), Pitch 0,50mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -2.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 232 NetC90_2))
    (pad 2 smd rect (at -2.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 233 NetC93_2))
    (pad 3 smd rect (at -1.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 186 FT_MGMT_VPHY))
    (pad 4 smd rect (at -1.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 5 smd rect (at -0.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 189 FT_REF1))
    (pad 6 smd rect (at -0.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 295 USB_MGMT_N))
    (pad 7 smd rect (at 0.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 296 USB_MGMT_P))
    (pad 8 smd rect (at 0.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 187 FT_MGMT_VPLL))
    (pad 9 smd rect (at 1.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 10 smd rect (at 1.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 11 smd rect (at 2.25 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 12 smd rect (at 2.75 4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 13 smd rect (at 4.05 2.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 183 FT_MGMT_TXD1))
    (pad 14 smd rect (at 4.05 2.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 181 FT_MGMT_RXD1))
    (pad 15 smd rect (at 4.05 1.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 180 FT_MGMT_RTS))
    (pad 16 smd rect (at 4.05 1.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 178 FT_MGMT_CTS))
    (pad 17 smd rect (at 4.05 0.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 179 FT_MGMT_DTR))
    (pad 18 smd rect (at 4.05 0.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 19 smd rect (at 4.05 -0.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 20 smd rect (at 4.05 -0.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 21 smd rect (at 4.05 -1.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 22 smd rect (at 4.05 -1.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 23 smd rect (at 4.05 -2.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 24 smd rect (at 4.05 -2.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 25 smd rect (at 2.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 26 smd rect (at 2.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 27 smd rect (at 1.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 28 smd rect (at 1.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 29 smd rect (at 0.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 30 smd rect (at 0.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 31 smd rect (at -0.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 32 smd rect (at -0.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 33 smd rect (at -1.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 34 smd rect (at -1.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 191 FT_RESET1))
    (pad 35 smd rect (at -2.25 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 36 smd rect (at -2.75 -4.05 180) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 37 smd rect (at -4.05 -2.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 199 FT_VCCA1))
    (pad 38 smd rect (at -4.05 -2.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 201 FT_VCCORE1))
    (pad 39 smd rect (at -4.05 -1.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 40 smd rect (at -4.05 -1.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 188 FT_MGMT_VREGIN))
    (pad 41 smd rect (at -4.05 -0.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 42 smd rect (at -4.05 -0.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 43 smd rect (at -4.05 0.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 44 smd rect (at -4.05 0.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 45 smd rect (at -4.05 1.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask))
    (pad 46 smd rect (at -4.05 1.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 185 FT_MGMT_VCC3V3))
    (pad 47 smd rect (at -4.05 2.25 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 48 smd rect (at -4.05 2.75 90) (size 0.299999 1.799999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/6B6B27F8-B7AC.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module LQFP-32 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 53.083198 -38.549999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U10 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "TQFP, 32-Leads, Body 9,0x9,0mm (max), Pitch 0,80mm, IPC Medium Density" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd oval (at -2.8 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 19 AVR_GPIO_2))
    (pad 2 smd rect (at -2 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 20 AVR_GPIO_3))
    (pad 3 smd rect (at -1.2 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 21 AVR_GPIO_4))
    (pad 4 smd rect (at -0.4 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (pad 5 smd rect (at 0.4 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 6 smd rect (at 1.2 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 22 AVR_GPIO_5))
    (pad 7 smd rect (at 2 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 23 AVR_GPIO_6))
    (pad 8 smd rect (at 2.8 4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 24 AVR_GPIO_7))
    (pad 9 smd rect (at 4.475 2.8 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 33 AVR_LED1))
    (pad 10 smd rect (at 4.475 2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 34 AVR_LED2))
    (pad 11 smd rect (at 4.475 1.2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 35 AVR_LED3))
    (pad 12 smd rect (at 4.475 0.4 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 36 AVR_LED4))
    (pad 13 smd rect (at 4.475 -0.4 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 37 AVR_PANIC))
    (pad 14 smd rect (at 4.475 -1.2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 210 MKM_AVR_CS_N))
    (pad 15 smd rect (at 4.475 -2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 214 MKM_CONTROL_AVR_ENA))
    (pad 16 smd rect (at 4.475 -2.8 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 215 MKM_CONTROL_FPGA_DIS))
    (pad 17 smd rect (at 2.8 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 25 AVR_GPIO_ARM_0))
    (pad 18 smd rect (at 2 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 3 3V3_BATT))
    (pad 19 smd rect (at 1.2 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 26 AVR_GPIO_ARM_1))
    (pad 20 smd rect (at 0.4 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 27 AVR_GPIO_ARM_2))
    (pad 21 smd rect (at -0.4 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 22 smd rect (at -1.2 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 28 AVR_GPIO_ARM_3))
    (pad 23 smd rect (at -2 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 29 AVR_GPIO_FPGA_0))
    (pad 24 smd rect (at -2.8 -4.475 180) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 30 AVR_GPIO_FPGA_1))
    (pad 25 smd rect (at -4.475 -2.8 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 31 AVR_GPIO_FPGA_2))
    (pad 26 smd rect (at -4.475 -2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 32 AVR_GPIO_FPGA_3))
    (pad 27 smd rect (at -4.475 -1.2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 212 MKM_AVR_MOSI))
    (pad 28 smd rect (at -4.475 -0.4 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 211 MKM_AVR_MISO))
    (pad 29 smd rect (at -4.475 0.4 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 38 AVR_RESET))
    (pad 30 smd rect (at -4.475 1.2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 213 MKM_AVR_SCK))
    (pad 31 smd rect (at -4.475 2 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 17 AVR_GPIO_0))
    (pad 32 smd rect (at -4.475 2.8 90) (size 0.549999 1.549999) (layers F.Cu F.Paste F.Mask)
      (net 18 AVR_GPIO_1))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/590BE70C-A1C3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module SOIC127P600X175-8N (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 80.4418 -30.717998)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U12 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value SOIC127P600X175-8N (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -1.905 -2.7178 270) (size 1.549999 0.6) (layers B.Cu B.Paste B.Mask)
      (net 216 MKM_CS_N))
    (pad 2 smd rect (at -0.635 -2.7178 270) (size 1.549999 0.6) (layers B.Cu B.Paste B.Mask)
      (net 221 MKM_MISO))
    (pad 3 smd rect (at 0.635 -2.7178 270) (size 1.549999 0.6) (layers B.Cu B.Paste B.Mask))
    (pad 4 smd rect (at 1.905 -2.7178 270) (size 1.549999 0.6) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 5 smd rect (at 1.905 2.6924 270) (size 1.549999 0.6) (layers B.Cu B.Paste B.Mask)
      (net 222 MKM_MOSI))
    (pad 6 smd rect (at 0.635 2.6924 270) (size 1.549999 0.6) (layers B.Cu B.Paste B.Mask)
      (net 223 MKM_SCK))
    (pad 7 smd rect (at -0.635 2.6924 270) (size 1.549999 0.6) (layers B.Cu B.Paste B.Mask)
      (net 267 NetR33_2))
    (pad 8 smd rect (at -1.905 2.6924 270) (size 1.549999 0.6) (layers B.Cu B.Paste B.Mask)
      (net 3 3V3_BATT))
  )

  (module BGA484C100P22X22_2300X2300X254 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 56.4534 -68.8848)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U13 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "BGA, 484-Leads, Body 23,00x23,00mmx2,54mm, Pitch 1,00mm" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad AB22 smd circle (at -10.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 63 FMC_A20))
    (pad AB21 smd circle (at -9.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 62 FMC_A19))
    (pad AB20 smd circle (at -8.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 64 FMC_A21))
    (pad AB19 smd circle (at -7.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad AB18 smd circle (at -6.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 67 FMC_A24))
    (pad AB17 smd circle (at -5.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 47 FMC_A4))
    (pad AB16 smd circle (at -4.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 44 FMC_A1))
    (pad AB15 smd circle (at -3.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 51 FMC_A8))
    (pad AB14 smd circle (at -2.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad AB13 smd circle (at -1.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 49 FMC_A6))
    (pad AB12 smd circle (at -0.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 57 FMC_A14))
    (pad AB11 smd circle (at 0.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 74 FMC_D4))
    (pad AB10 smd circle (at 1.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 55 FMC_A12))
    (pad AB9 smd circle (at 2.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad AB8 smd circle (at 3.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 58 FMC_A15))
    (pad AB7 smd circle (at 4.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 70 FMC_D0))
    (pad AB6 smd circle (at 5.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 71 FMC_D1))
    (pad AB5 smd circle (at 6.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 90 FMC_D20))
    (pad AB4 smd circle (at 7.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad AB3 smd circle (at 8.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 86 FMC_D16))
    (pad AB2 smd circle (at 9.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 85 FMC_D15))
    (pad AB1 smd circle (at 10.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 84 FMC_D14))
    (pad AA22 smd circle (at -10.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad AA21 smd circle (at -9.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 79 FMC_D9))
    (pad AA20 smd circle (at -8.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 152 FPGA_GPIO_LED_3))
    (pad AA19 smd circle (at -7.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 68 FMC_A25))
    (pad AA18 smd circle (at -6.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad AA17 smd circle (at -5.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad AA16 smd circle (at -4.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 45 FMC_A2))
    (pad AA15 smd circle (at -3.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 50 FMC_A7))
    (pad AA14 smd circle (at -2.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 53 FMC_A10))
    (pad AA13 smd circle (at -1.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 48 FMC_A5))
    (pad AA12 smd circle (at -0.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad AA11 smd circle (at 0.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 75 FMC_D5))
    (pad AA10 smd circle (at 1.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad AA9 smd circle (at 2.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 59 FMC_A16))
    (pad AA8 smd circle (at 3.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 60 FMC_A17))
    (pad AA7 smd circle (at 4.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad AA6 smd circle (at 5.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 110 FMC_NWE))
    (pad AA5 smd circle (at 6.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 89 FMC_D19))
    (pad AA4 smd circle (at 7.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 92 FMC_D22))
    (pad AA3 smd circle (at 8.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 88 FMC_D18))
    (pad AA2 smd circle (at 9.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad AA1 smd circle (at 10.5 9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 83 FMC_D13))
    (pad Y22 smd circle (at -10.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 66 FMC_A23))
    (pad Y21 smd circle (at -9.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 65 FMC_A22))
    (pad Y20 smd circle (at -8.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad Y19 smd circle (at -7.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad Y18 smd circle (at -6.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 78 FMC_D8))
    (pad Y17 smd circle (at -5.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 43 FMC_A0))
    (pad Y16 smd circle (at -4.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 46 FMC_A3))
    (pad Y15 smd circle (at -3.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad Y14 smd circle (at -2.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 54 FMC_A11))
    (pad Y13 smd circle (at -1.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 52 FMC_A9))
    (pad Y12 smd circle (at -0.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 77 FMC_D7))
    (pad Y11 smd circle (at 0.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 76 FMC_D6))
    (pad Y10 smd circle (at 1.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad Y9 smd circle (at 2.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad Y8 smd circle (at 3.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad Y7 smd circle (at 4.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 61 FMC_A18))
    (pad Y6 smd circle (at 5.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 109 FMC_NWAIT))
    (pad Y5 smd circle (at 6.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad Y4 smd circle (at 7.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 91 FMC_D21))
    (pad Y3 smd circle (at 8.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 87 FMC_D17))
    (pad Y2 smd circle (at 9.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad Y1 smd circle (at 10.5 8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 218 MKM_FPGA_MISO))
    (pad W22 smd circle (at -10.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 151 FPGA_GPIO_LED_2))
    (pad W21 smd circle (at -9.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad W20 smd circle (at -8.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 80 FMC_D10))
    (pad W19 smd circle (at -7.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 42 DIGITIZED_NOISE))
    (pad W18 smd circle (at -6.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad W17 smd circle (at -5.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 107 FMC_NL))
    (pad W16 smd circle (at -4.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 108 FMC_NOE))
    (pad W15 smd circle (at -3.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad W14 smd circle (at -2.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 97 FMC_D27))
    (pad W13 smd circle (at -1.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad W12 smd circle (at -0.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 96 FMC_D26))
    (pad W11 smd circle (at 0.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 69 FMC_CLK))
    (pad W10 smd circle (at 1.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 94 FMC_D24))
    (pad W9 smd circle (at 2.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad W8 smd circle (at 3.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad W7 smd circle (at 4.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad W6 smd circle (at 5.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad W5 smd circle (at 6.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad W4 smd circle (at 7.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad W3 smd circle (at 8.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad W2 smd circle (at 9.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 217 MKM_FPGA_CS_N))
    (pad W1 smd circle (at 10.5 7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 219 MKM_FPGA_MOSI))
    (pad V22 smd circle (at -10.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V21 smd circle (at -9.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad V20 smd circle (at -8.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 98 FMC_D28))
    (pad V19 smd circle (at -7.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V18 smd circle (at -6.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 99 FMC_D29))
    (pad V17 smd circle (at -5.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V16 smd circle (at -4.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad V15 smd circle (at -3.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V14 smd circle (at -2.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V13 smd circle (at -1.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V12 smd circle (at -0.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 160 FPGA_JTAG_TCK))
    (pad V11 smd circle (at 0.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad V10 smd circle (at 1.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V9 smd circle (at 2.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V8 smd circle (at 3.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V7 smd circle (at 4.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad V6 smd circle (at 5.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad V5 smd circle (at 6.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 106 FMC_NE1))
    (pad V4 smd circle (at 7.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 93 FMC_D23))
    (pad V3 smd circle (at 8.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 220 MKM_FPGA_SCK))
    (pad V2 smd circle (at 9.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 56 FMC_A13))
    (pad V1 smd circle (at 10.5 6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad U22 smd circle (at -10.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 272 NetR65_1))
    (pad U21 smd circle (at -9.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad U20 smd circle (at -8.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 82 FMC_D12))
    (pad U19 smd circle (at -7.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad U18 smd circle (at -6.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad U17 smd circle (at -5.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad U16 smd circle (at -4.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad U15 smd circle (at -3.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad U14 smd circle (at -2.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad U13 smd circle (at -1.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 162 FPGA_JTAG_TDO))
    (pad U12 smd circle (at -0.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 153 FPGA_INIT_B_INT1))
    (pad U11 smd circle (at 0.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 164 FPGA_M0))
    (pad U10 smd circle (at 1.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 165 FPGA_M1))
    (pad U9 smd circle (at 2.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 166 FPGA_M2))
    (pad U8 smd circle (at 3.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad U7 smd circle (at 4.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad U6 smd circle (at 5.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad U5 smd circle (at 6.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad U4 smd circle (at 7.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad U3 smd circle (at 8.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 149 FPGA_GPIO_LED_0))
    (pad U2 smd circle (at 9.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 73 FMC_D3))
    (pad U1 smd circle (at 10.5 5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 72 FMC_D2))
    (pad T22 smd circle (at -10.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad T21 smd circle (at -9.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T20 smd circle (at -8.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T19 smd circle (at -7.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 119 FPGA_CFG_CS_N1))
    (pad T18 smd circle (at -6.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T17 smd circle (at -5.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad T16 smd circle (at -4.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T15 smd circle (at -3.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T14 smd circle (at -2.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T13 smd circle (at -1.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 163 FPGA_JTAG_TMS))
    (pad T12 smd circle (at -0.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad T11 smd circle (at 0.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad T10 smd circle (at 1.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad T9 smd circle (at 2.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad T8 smd circle (at 3.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad T7 smd circle (at 4.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad T6 smd circle (at 5.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T5 smd circle (at 6.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T4 smd circle (at 7.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T3 smd circle (at 8.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad T2 smd circle (at 9.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad T1 smd circle (at 10.5 4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 150 FPGA_GPIO_LED_1))
    (pad R22 smd circle (at -10.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 123 FPGA_CFG_MISO1))
    (pad R21 smd circle (at -9.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 100 FMC_D30))
    (pad R20 smd circle (at -8.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad R19 smd circle (at -7.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad R18 smd circle (at -6.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad R17 smd circle (at -5.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad R16 smd circle (at -4.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad R15 smd circle (at -3.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad R14 smd circle (at -2.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad R13 smd circle (at -1.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 161 FPGA_JTAG_TDI))
    (pad R12 smd circle (at -0.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad R11 smd circle (at 0.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad R10 smd circle (at 1.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad R9 smd circle (at 2.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad R8 smd circle (at 3.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad R7 smd circle (at 4.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad R6 smd circle (at 5.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad R5 smd circle (at 6.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad R4 smd circle (at 7.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 95 FMC_D25))
    (pad R3 smd circle (at 8.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad R2 smd circle (at 9.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad R1 smd circle (at 10.5 3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P22 smd circle (at -10.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 125 FPGA_CFG_MOSI1))
    (pad P21 smd circle (at -9.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 101 FMC_D31))
    (pad P20 smd circle (at -8.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P19 smd circle (at -7.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P18 smd circle (at -6.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad P17 smd circle (at -5.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P16 smd circle (at -4.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P15 smd circle (at -3.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P14 smd circle (at -2.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P13 smd circle (at -1.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad P12 smd circle (at -0.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad P11 smd circle (at 0.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad P10 smd circle (at 1.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad P9 smd circle (at 2.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad P8 smd circle (at 3.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad P7 smd circle (at 4.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad P6 smd circle (at 5.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P5 smd circle (at 6.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P4 smd circle (at 7.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P3 smd circle (at 8.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad P2 smd circle (at 9.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad P1 smd circle (at 10.5 2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N22 smd circle (at -10.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N21 smd circle (at -9.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad N20 smd circle (at -8.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N19 smd circle (at -7.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N18 smd circle (at -6.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N17 smd circle (at -5.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N16 smd circle (at -4.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad N15 smd circle (at -3.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 81 FMC_D11))
    (pad N14 smd circle (at -2.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N13 smd circle (at -1.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N12 smd circle (at -0.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 167 FPGA_PROGRAM_B1))
    (pad N11 smd circle (at 0.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad N10 smd circle (at 1.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad N9 smd circle (at 2.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad N8 smd circle (at 3.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad N7 smd circle (at 4.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad N6 smd circle (at 5.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad N5 smd circle (at 6.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N4 smd circle (at 7.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N3 smd circle (at 8.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N2 smd circle (at 9.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad N1 smd circle (at 10.5 1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad M22 smd circle (at -10.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M21 smd circle (at -9.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M20 smd circle (at -8.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M19 smd circle (at -7.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad M18 smd circle (at -6.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M17 smd circle (at -5.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M16 smd circle (at -4.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M15 smd circle (at -3.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M14 smd circle (at -2.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad M13 smd circle (at -1.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M12 smd circle (at -0.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad M11 smd circle (at 0.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad M10 smd circle (at 1.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad M9 smd circle (at 2.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M8 smd circle (at 3.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad M7 smd circle (at 4.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad M6 smd circle (at 5.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M5 smd circle (at 6.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M4 smd circle (at 7.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad M3 smd circle (at 8.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M2 smd circle (at 9.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad M1 smd circle (at 10.5 0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L22 smd circle (at -10.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad L21 smd circle (at -9.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L20 smd circle (at -8.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L19 smd circle (at -7.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L18 smd circle (at -6.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L17 smd circle (at -5.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad L16 smd circle (at -4.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L15 smd circle (at -3.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L14 smd circle (at -2.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L13 smd circle (at -1.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L12 smd circle (at -0.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 127 FPGA_CFG_SCLK1))
    (pad L11 smd circle (at 0.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad L10 smd circle (at 1.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L9 smd circle (at 2.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad L8 smd circle (at 3.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad L7 smd circle (at 4.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad L6 smd circle (at 5.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L5 smd circle (at 6.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L4 smd circle (at 7.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L3 smd circle (at 8.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad L2 smd circle (at 9.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad L1 smd circle (at 10.5 -0.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K22 smd circle (at -10.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K21 smd circle (at -9.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K20 smd circle (at -8.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad K19 smd circle (at -7.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K18 smd circle (at -6.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K17 smd circle (at -5.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K16 smd circle (at -4.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K15 smd circle (at -3.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad K14 smd circle (at -2.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K13 smd circle (at -1.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K12 smd circle (at -0.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad K11 smd circle (at 0.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad K10 smd circle (at 1.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad K9 smd circle (at 2.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad K8 smd circle (at 3.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad K7 smd circle (at 4.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad K6 smd circle (at 5.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K5 smd circle (at 6.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad K4 smd circle (at 7.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K3 smd circle (at 8.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K2 smd circle (at 9.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad K1 smd circle (at 10.5 -1.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J22 smd circle (at -10.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J21 smd circle (at -9.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J20 smd circle (at -8.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J19 smd circle (at -7.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J18 smd circle (at -6.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad J17 smd circle (at -5.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J16 smd circle (at -4.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J15 smd circle (at -3.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J14 smd circle (at -2.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J13 smd circle (at -1.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad J12 smd circle (at -0.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad J11 smd circle (at 0.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad J10 smd circle (at 1.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad J9 smd circle (at 2.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad J8 smd circle (at 3.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad J7 smd circle (at 4.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad J6 smd circle (at 5.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J5 smd circle (at 6.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J4 smd circle (at 7.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J3 smd circle (at 8.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad J2 smd circle (at 9.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad J1 smd circle (at 10.5 -2.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H22 smd circle (at -10.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H21 smd circle (at -9.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad H20 smd circle (at -8.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H19 smd circle (at -7.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H18 smd circle (at -6.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H17 smd circle (at -5.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H16 smd circle (at -4.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad H15 smd circle (at -3.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H14 smd circle (at -2.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H13 smd circle (at -1.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H12 smd circle (at -0.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 174 FPGA_VCCAUX_1V8))
    (pad H11 smd circle (at 0.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad H10 smd circle (at 1.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad H9 smd circle (at 2.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad H8 smd circle (at 3.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 175 FPGA_VCCINT_1V0))
    (pad H7 smd circle (at 4.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad H6 smd circle (at 5.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad H5 smd circle (at 6.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H4 smd circle (at 7.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H3 smd circle (at 8.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H2 smd circle (at 9.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad H1 smd circle (at 10.5 -3.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G22 smd circle (at -10.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G21 smd circle (at -9.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G20 smd circle (at -8.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G19 smd circle (at -7.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad G18 smd circle (at -6.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G17 smd circle (at -5.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G16 smd circle (at -4.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G15 smd circle (at -3.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G14 smd circle (at -2.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G13 smd circle (at -1.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G12 smd circle (at -0.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G11 smd circle (at 0.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 129 FPGA_DONE_INT))
    (pad G10 smd circle (at 1.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G9 smd circle (at 2.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G8 smd circle (at 3.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G7 smd circle (at 4.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G6 smd circle (at 5.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G5 smd circle (at 6.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad G4 smd circle (at 7.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G3 smd circle (at 8.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G2 smd circle (at 9.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad G1 smd circle (at 10.5 -4.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F22 smd circle (at -10.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad F21 smd circle (at -9.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F20 smd circle (at -8.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F19 smd circle (at -7.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F18 smd circle (at -6.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F17 smd circle (at -5.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad F16 smd circle (at -4.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 157 FPGA_IRQ_N_1))
    (pad F15 smd circle (at -3.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F14 smd circle (at -2.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 156 FPGA_IRQ_N_0))
    (pad F13 smd circle (at -1.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F12 smd circle (at -0.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad F11 smd circle (at 0.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad F10 smd circle (at 1.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F9 smd circle (at 2.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F8 smd circle (at 3.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F7 smd circle (at 4.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F6 smd circle (at 5.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F5 smd circle (at 6.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad F4 smd circle (at 7.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F3 smd circle (at 8.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad F2 smd circle (at 9.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad F1 smd circle (at 10.5 -5.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E22 smd circle (at -10.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E21 smd circle (at -9.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E20 smd circle (at -8.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad E19 smd circle (at -7.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E18 smd circle (at -6.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E17 smd circle (at -5.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 158 FPGA_IRQ_N_2))
    (pad E16 smd circle (at -4.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E15 smd circle (at -3.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad E14 smd circle (at -2.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 133 FPGA_GPIO_A_0))
    (pad E13 smd circle (at -1.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 134 FPGA_GPIO_A_1))
    (pad E12 smd circle (at -0.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad E11 smd circle (at 0.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad E10 smd circle (at 1.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E9 smd circle (at 2.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad E8 smd circle (at 3.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E7 smd circle (at 4.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad E6 smd circle (at 5.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E5 smd circle (at 6.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad E4 smd circle (at 7.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad E3 smd circle (at 8.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E2 smd circle (at 9.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad E1 smd circle (at 10.5 -6.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D22 smd circle (at -10.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D21 smd circle (at -9.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D20 smd circle (at -8.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D19 smd circle (at -7.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D18 smd circle (at -6.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad D17 smd circle (at -5.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 132 FPGA_GCLK))
    (pad D16 smd circle (at -4.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D15 smd circle (at -3.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D14 smd circle (at -2.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 144 FPGA_GPIO_B_3))
    (pad D13 smd circle (at -1.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad D12 smd circle (at -0.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad D11 smd circle (at 0.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D10 smd circle (at 1.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D9 smd circle (at 2.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D8 smd circle (at 3.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad D7 smd circle (at 4.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D6 smd circle (at 5.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D5 smd circle (at 6.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D4 smd circle (at 7.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad D3 smd circle (at 8.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad D2 smd circle (at 9.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad D1 smd circle (at 10.5 -7.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C22 smd circle (at -10.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 148 FPGA_GPIO_B_7))
    (pad C21 smd circle (at -9.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad C20 smd circle (at -8.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 147 FPGA_GPIO_B_6))
    (pad C19 smd circle (at -7.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C18 smd circle (at -6.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 145 FPGA_GPIO_B_4))
    (pad C17 smd circle (at -5.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C16 smd circle (at -4.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad C15 smd circle (at -3.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 142 FPGA_GPIO_B_1))
    (pad C14 smd circle (at -2.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 159 FPGA_IRQ_N_3))
    (pad C13 smd circle (at -1.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 137 FPGA_GPIO_A_4))
    (pad C12 smd circle (at -0.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad C11 smd circle (at 0.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C10 smd circle (at 1.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad C9 smd circle (at 2.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C8 smd circle (at 3.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C7 smd circle (at 4.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C6 smd circle (at 5.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad C5 smd circle (at 6.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C4 smd circle (at 7.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C3 smd circle (at 8.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad C2 smd circle (at 9.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad C1 smd circle (at 10.5 -8.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad B22 smd circle (at -10.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B21 smd circle (at -9.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B20 smd circle (at -8.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 29 AVR_GPIO_FPGA_0))
    (pad B19 smd circle (at -7.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad B18 smd circle (at -6.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 131 FPGA_ENTROPY_DISABLE))
    (pad B17 smd circle (at -5.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B16 smd circle (at -4.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 143 FPGA_GPIO_B_2))
    (pad B15 smd circle (at -3.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 140 FPGA_GPIO_A_7))
    (pad B14 smd circle (at -2.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad B13 smd circle (at -1.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 138 FPGA_GPIO_A_5))
    (pad B12 smd circle (at -0.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad B11 smd circle (at 0.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B10 smd circle (at 1.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B9 smd circle (at 2.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B8 smd circle (at 3.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B7 smd circle (at 4.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B6 smd circle (at 5.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B5 smd circle (at 6.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B4 smd circle (at 7.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B3 smd circle (at 8.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad B2 smd circle (at 9.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad B1 smd circle (at 10.5 -9.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad A22 smd circle (at -10.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad A21 smd circle (at -9.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 146 FPGA_GPIO_B_5))
    (pad A20 smd circle (at -8.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 30 AVR_GPIO_FPGA_1))
    (pad A19 smd circle (at -7.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 32 AVR_GPIO_FPGA_3))
    (pad A18 smd circle (at -6.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 31 AVR_GPIO_FPGA_2))
    (pad A17 smd circle (at -5.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 302 VCCO_3V3))
    (pad A16 smd circle (at -4.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 141 FPGA_GPIO_B_0))
    (pad A15 smd circle (at -3.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 139 FPGA_GPIO_A_6))
    (pad A14 smd circle (at -2.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 136 FPGA_GPIO_A_3))
    (pad A13 smd circle (at -1.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 135 FPGA_GPIO_A_2))
    (pad A12 smd circle (at -0.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad A11 smd circle (at 0.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad A10 smd circle (at 1.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad A9 smd circle (at 2.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad A8 smd circle (at 3.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad A7 smd circle (at 4.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad A6 smd circle (at 5.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad A5 smd circle (at 6.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad A4 smd circle (at 7.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (pad A3 smd circle (at 8.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad A2 smd circle (at 9.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad A1 smd circle (at 10.5 -10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/041B98A5-F02D.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module QFN38 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 35.4584 -76.5556)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U14 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value QFN38_4X7X1.85 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad PAD3 smd oval (at 0 1.26 180) (size 2.6 1.940001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 38 smd oval (at -1.905 -3) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 37 smd oval (at -1.905 -2.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 36 smd oval (at -1.905 -2) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 35 smd oval (at -1.905 -1.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 34 smd oval (at -1.905 -1) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 33 smd oval (at -1.905 -0.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 32 smd oval (at -1.905 0) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 31 smd oval (at -1.905 0.508) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 237 NetC117_2))
    (pad 30 smd oval (at -1.905 1.016) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 234 NetC115_1))
    (pad 29 smd oval (at -1.905 1.524) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 269 NetR53_2))
    (pad 28 smd oval (at -1.905 2.0066) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 280 POK_VCCAUX))
    (pad 27 smd oval (at -1.905 2.5146) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 284 PWR_ENA_VCCAUX))
    (pad 26 smd oval (at -1.905 3.0226) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 268 NetR52_1))
    (pad 25 smd oval (at -1.27 3.4036 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 24 smd oval (at -0.762 3.4036 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 23 smd oval (at -0.254 3.4036 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 22 smd oval (at 0.25 3.4036 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 21 smd oval (at 0.75 3.4036 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 20 smd oval (at 1.25 3.4036 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 19 smd oval (at 1.9 3.0226 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 18 smd oval (at 1.9 2.5146 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 17 smd oval (at 1.9 2.0066 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 16 smd oval (at 1.9 1.524 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 15 smd oval (at 1.9 1.016 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 14 smd oval (at 1.9 0.508 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 13 smd oval (at 1.9 0 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 12 smd oval (at 1.9 -0.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 11 smd oval (at 1.9 -1 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (pad 10 smd oval (at 1.9 -1.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (pad 9 smd oval (at 1.9 -2 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (pad 8 smd oval (at 1.9 -2.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (pad 7 smd oval (at 1.9 -3 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (pad 6 smd oval (at 1.25 -3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (pad 5 smd oval (at 0.75 -3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 236 NetC117_1))
    (pad 4 smd oval (at 0.25 -3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 3 smd oval (at -0.254 -3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 2 smd oval (at -0.762 -3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 1 smd oval (at -1.27 -3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
  )

  (module QFN38 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 10.8458 -41.0972)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U15 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value QFN38_4X7X1.85 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd oval (at 1.27 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 2 smd oval (at 0.762 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 3 smd oval (at 0.254 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 4 smd oval (at -0.25 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 5 smd oval (at -0.75 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 6 smd oval (at -1.25 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 7 smd oval (at -1.9 3) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 8 smd oval (at -1.9 2.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 9 smd oval (at -1.9 2) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 10 smd oval (at -1.9 1.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 11 smd oval (at -1.9 1) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 238 NetC118_1))
    (pad 12 smd oval (at -1.9 0.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 13 smd oval (at -1.9 0) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 14 smd oval (at -1.9 -0.508) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 15 smd oval (at -1.9 -1.016) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 16 smd oval (at -1.9 -1.524) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 17 smd oval (at -1.9 -2.0066) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 18 smd oval (at -1.9 -2.5146) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 19 smd oval (at -1.9 -3.0226) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 20 smd oval (at -1.25 -3.4036 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 21 smd oval (at -0.75 -3.4036 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 22 smd oval (at -0.25 -3.4036 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 23 smd oval (at 0.254 -3.4036 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 24 smd oval (at 0.762 -3.4036 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 25 smd oval (at 1.27 -3.4036 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 26 smd oval (at 1.905 -3.0226 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 270 NetR54_1))
    (pad 27 smd oval (at 1.905 -2.5146 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 286 PWR_ENA_VCCO))
    (pad 28 smd oval (at 1.905 -2.0066 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 282 POK_VCCO))
    (pad 29 smd oval (at 1.905 -1.524 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 271 NetR55_2))
    (pad 30 smd oval (at 1.905 -1.016 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 235 NetC116_1))
    (pad 31 smd oval (at 1.905 -0.508 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 239 NetC118_2))
    (pad 32 smd oval (at 1.905 0 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 33 smd oval (at 1.905 0.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 34 smd oval (at 1.905 1 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 35 smd oval (at 1.905 1.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 36 smd oval (at 1.905 2 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 37 smd oval (at 1.905 2.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 38 smd oval (at 1.905 3 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad PAD3 smd oval (at 0 -1.26) (size 2.6 1.940001) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
  )

  (module QFN68 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 25.9842 -57.4802)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference U16 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value QFN68_8X11X1.85 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd oval (at 5.5 -3.5052 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 2 smd oval (at 5.5 -3.0226 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 3 smd oval (at 5.5 -2.5146 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 4 smd oval (at 5.5 -2.0066 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 5 smd oval (at 5.5 -1.524 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 6 smd oval (at 5.5 -1.016 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 7 smd oval (at 5.5 -0.508 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 8 smd oval (at 5.5 0 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 9 smd oval (at 5.5 0.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 10 smd oval (at 5.5 1 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 11 smd oval (at 5.5 1.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 12 smd oval (at 5.5 2 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 13 smd oval (at 5.5 2.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 241 NetC208_1))
    (pad 14 smd oval (at 5.5 3 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 15 smd oval (at 5.5 3.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 16 smd oval (at 4.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 17 smd oval (at 4 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 18 smd oval (at 3.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 19 smd oval (at 3 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 20 smd oval (at 2.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 21 smd oval (at 2 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 22 smd oval (at 1.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 23 smd oval (at 1 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 24 smd oval (at 0.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 25 smd oval (at 0 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 26 smd oval (at -0.508 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 27 smd oval (at -1.016 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 28 smd oval (at -1.524 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 29 smd oval (at -2.0066 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 30 smd oval (at -2.5146 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 31 smd oval (at -3.0226 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 32 smd oval (at -3.5052 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 33 smd oval (at -4.0132 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 34 smd oval (at -4.5212 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 35 smd oval (at -5.5118 3.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 36 smd oval (at -5.5118 3) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 37 smd oval (at -5.5118 2.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 38 smd oval (at -5.5118 2) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 39 smd oval (at -5.5118 1.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 40 smd oval (at -5.5118 1) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 41 smd oval (at -5.5118 0.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 42 smd oval (at -5.5118 0) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 43 smd oval (at -5.5118 -0.508) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 44 smd oval (at -5.5118 -1.016) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 45 smd oval (at -5.5118 -1.524) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 46 smd oval (at -5.5118 -2.0066) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 47 smd oval (at -5.5118 -2.5146) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 48 smd oval (at -5.5118 -3.0226) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 49 smd oval (at -5.5118 -3.5052) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 50 smd oval (at -4.5212 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 51 smd oval (at -4.0132 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 273 NetR66_1))
    (pad 52 smd oval (at -3.5052 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 285 PWR_ENA_VCCINT))
    (pad 53 smd oval (at -3.0226 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 301 VCC_5V0))
    (pad 54 smd oval (at -2.5146 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 281 POK_VCCINT))
    (pad 55 smd oval (at -2.0066 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 56 smd oval (at -1.524 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 242 NetC208_2))
    (pad 57 smd oval (at -1.016 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 58 smd oval (at -0.508 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 59 smd oval (at 0 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 240 NetC207_1))
    (pad 60 smd oval (at 0.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 61 smd oval (at 1 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 62 smd oval (at 1.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
    (pad 63 smd oval (at 2 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 274 NetR67_1))
    (pad 64 smd oval (at 2.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 65 smd oval (at 3 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 66 smd oval (at 3.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 67 smd oval (at 4 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad 68 smd oval (at 4.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad PAD6 smd oval (at -2.175 0.625 90) (size 5.35 2.35) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
    (pad PAD7 smd oval (at 3.55 -2.65 180) (size 2.5 1.3) (layers B.Cu B.Paste B.Mask)
      (net 6 GND))
  )

  (module XTAL3215 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 19.275001 -45.6)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference X1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value XTAL3215 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad P$1 smd rect (at 0 -1.2192 90) (size 1.1176 1.905) (layers F.Cu F.Paste F.Mask)
      (net 228 NetC70_2))
    (pad P$2 smd rect (at 0 1.2 270) (size 1.1176 1.905) (layers F.Cu F.Paste F.Mask)
      (net 229 NetC71_2))
  )

  (module CRYSTAL_3.2X2.5 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 23.075001 -5.499999)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference Y1 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value CRYSTAL_3.2X2.5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at -0.8382 -1.1176 270) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
      (net 231 NetC78_2))
    (pad 2 smd rect (at -0.8382 1.0922 270) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 3 smd rect (at 0.8636 1.0922 90) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
      (net 230 NetC75_2))
    (pad 4 smd rect (at 0.8636 -1.1176 90) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
  )

  (module CRYSTAL_3.2X2.5 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 82.524999 -8.8)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference Y2 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value CRYSTAL_3.2X2.5 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 4 smd rect (at 1.1176 0.8636) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 3 smd rect (at -1.0922 0.8636) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
      (net 232 NetC90_2))
    (pad 2 smd rect (at -1.0922 -0.8382 180) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 1 smd rect (at 1.1176 -0.8382 180) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
      (net 233 NetC93_2))
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 59.400001 -62.4)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R35 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0 0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (pad 2 smd rect (at 0 -0.5 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 166 FPGA_M2))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 180))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 37.091 -59.175701)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R36 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 165 FPGA_M1))
    (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 6 GND))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 360))
    )
  )

  (module R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
    (at 37.091003 -60.407601)
    (path /539EEC0F)
    (attr smd)
    (fp_text reference R37 (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (fp_text value "" (at 0 0) (layer F.SilkS) hide
      (effects (font (thickness 0.05)))
    )
    (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 164 FPGA_M0))
    (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
      (net 302 VCCO_3V3))
    (model /home/ft/work/cryptech/official/user/ft/alpha_to_kicad/rev03-Altium/wrlshp/537E0B02-A9B3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (gr_line (start 31.2 8.00002) (end 31.2 9) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 31.2 9) (end 31.8 9) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 31.8 9) (end 31.8 8.00002) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 31.8 8.00002) (end 31.2 8.00002) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 55.6 15.15) (end 56.5 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 56.5 15.15) (end 56.5 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 56.5 16.85) (end 55.6 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 55.6 16.85) (end 55.6 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 55.6 15.15) (end 55.6 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 53.59999 15.15) (end 54.5 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 54.5 15.15) (end 54.5 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 54.5 16.85) (end 53.59999 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 53.59999 16.85) (end 53.59999 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 53.59999 15.15) (end 53.59999 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 51.6 15.15) (end 52.5 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 52.5 15.15) (end 52.5 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 52.5 16.85) (end 51.6 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 51.6 16.85) (end 51.6 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 51.6 15.15) (end 51.6 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 49.6 15.15) (end 50.5 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 50.5 15.15) (end 50.5 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 50.5 16.85) (end 49.6 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 49.6 16.85) (end 49.6 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 49.6 15.15) (end 49.6 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 27.9 15.15) (end 28.8 15.15) (angle 90) (layer F.CrtYd) (width 0.2))
  (gr_line (start 28.8 15.15) (end 28.8 16.85) (angle 90) (layer F.CrtYd) (width 0.2))
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