| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2014-12-05 | Adding ise project file. | Joachim Strömbergson | |
| 2014-12-05 | Adding the generated bit file. | Joachim Strömbergson | |
| 2014-12-05 | Adding test programs for the trng and one for the rosc specifically. | Joachim Strömbergson | |
| 2014-12-05 | Hard coded the connections between the trng and the i2c to remove the ↵ | Joachim Strömbergson | |
| address multiplexer. This now builds a novena FPGA design with what seems to be a working trng. | |||
| 2014-12-04 | Adjusted address bits and widths. | Joachim Strömbergson | |
| 2014-12-04 | Fixes for syntax errors found during synthesis. | Joachim Strömbergson | |
| 2014-12-04 | An instance, not a module. | Joachim Strömbergson | |
| 2014-12-04 | Corrected names. | Joachim Strömbergson | |
| 2014-12-04 | Integrating the trng core. | Joachim Strömbergson | |
| 2014-12-03 | Adding top level module. | Joachim Strömbergson | |
| 2014-12-03 | Adding readme and license file. | Joachim Strömbergson | |
 |
index : test/novena_trng | |
| Experimental HW system for the Novena platform | git repositories |
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