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authorJoachim StroĢˆmbergson <joachim@secworks.se>2014-12-04 11:12:57 +0100
committerJoachim StroĢˆmbergson <joachim@secworks.se>2014-12-04 11:12:57 +0100
commit432abac3ff58d7dd376aefea1b0dc52d3d921d9c (patch)
tree6872f430b67075470cef5168be260b7164329ecc /src/rtl
parent33a7d969eb056c24a77dfbc8144b7701ba6aa3a1 (diff)
Fixes for syntax errors found during synthesis.
Diffstat (limited to 'src/rtl')
-rw-r--r--src/rtl/coretest_trng.v14
1 files changed, 1 insertions, 13 deletions
diff --git a/src/rtl/coretest_trng.v b/src/rtl/coretest_trng.v
index f422008..826506f 100644
--- a/src/rtl/coretest_trng.v
+++ b/src/rtl/coretest_trng.v
@@ -89,7 +89,7 @@ module coretest_trng(
wire [7 : 0] i2c_debug;
// trng connections.
- wire trng_noise
+ wire trng_noise;
reg trng_cs;
reg trng_we;
reg [7 : 0] trng_address;
@@ -216,18 +216,6 @@ module coretest_trng(
coretest_error = i2c_error;
end
-
- AVALANCHE_ADDR_PREFIX:
- begin
- avalanche_cs = coretest_cs;
- avalanche_we = coretest_we;
- avalanche_address = coretest_address[7 : 0];
- avalanche_write_data = coretest_write_data;
- coretest_read_data = avalanche_read_data;
- coretest_error = avalanche_error;
- end
-
-
TRNG_ADDR_PREFIX:
begin
trng_cs = coretest_cs;