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| author | Joachim StroĢmbergson <joachim@secworks.se> | 2014-12-04 12:42:32 +0100 |
|---|---|---|
| committer | Joachim StroĢmbergson <joachim@secworks.se> | 2014-12-04 12:42:32 +0100 |
| commit | 7c52a3180cd8a6538841328ad83e435a7035e5b2 (patch) | |
| tree | 00eee31c188b3c4860a6485cbc9b1449e0d578aa | |
| parent | 432abac3ff58d7dd376aefea1b0dc52d3d921d9c (diff) | |
Adjusted address bits and widths.
| -rw-r--r-- | src/rtl/coretest_trng.v | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/rtl/coretest_trng.v b/src/rtl/coretest_trng.v index 826506f..a935f4e 100644 --- a/src/rtl/coretest_trng.v +++ b/src/rtl/coretest_trng.v @@ -57,8 +57,8 @@ module coretest_trng( //---------------------------------------------------------------- // Internal constant and parameter definitions. //---------------------------------------------------------------- - parameter I2C_ADDR_PREFIX = 8'h00; - parameter TRNG_ADDR_PREFIX = 8'h20; + parameter I2C_ADDR_PREFIX = 4'h0; + parameter TRNG_ADDR_PREFIX = 4'h2; //---------------------------------------------------------------- @@ -205,7 +205,7 @@ module coretest_trng( trng_write_data = 32'h00000000; - case (coretest_address[15 : 8]) + case (coretest_address[15 : 12]) I2C_ADDR_PREFIX: begin i2c_cs = coretest_cs; @@ -220,7 +220,7 @@ module coretest_trng( begin trng_cs = coretest_cs; trng_we = coretest_we; - trng_address = coretest_address[7 : 0]; + trng_address = coretest_address[11 : 0]; trng_write_data = coretest_write_data; coretest_read_data = trng_read_data; coretest_error = trng_error; |