From 5150947e0bfc393b03e49bcb37e1168eb02f5b67 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Stro=CC=88mbergson?= Date: Sun, 1 Feb 2015 09:03:37 +0100 Subject: Updated the dcm to generate sys_clk at 50 MHz. Added Pavels project files. --- rtl/iseconfig/novena_baseline.projectmgr | 170 +++++++++++++++++++++++++++++++ 1 file changed, 170 insertions(+) create mode 100644 rtl/iseconfig/novena_baseline.projectmgr (limited to 'rtl/iseconfig/novena_baseline.projectmgr') diff --git a/rtl/iseconfig/novena_baseline.projectmgr b/rtl/iseconfig/novena_baseline.projectmgr new file mode 100644 index 0000000..21c43f4 --- /dev/null +++ b/rtl/iseconfig/novena_baseline.projectmgr @@ -0,0 +1,170 @@ + + + + + + + + + 2 + /novena_baseline_top E:|__DNSSEC|novena_baseline|src|verilog|novena_baseline_top.v/clkmgr - novena_clkmgr + /novena_baseline_top E:|__DNSSEC|novena_baseline|src|verilog|novena_baseline_top.v/core_mux - core_selector + /novena_baseline_top E:|__DNSSEC|novena_baseline|src|verilog|novena_baseline_top.v/eim - eim_arbiter + /novena_baseline_top E:|__DNSSEC|novena_baseline|src|verilog|novena_baseline_top.v/eim - eim_arbiter/eim_cdc - eim_arbiter_cdc + + + novena_baseline_top (E:/__DNSSEC/novena_baseline/src/verilog/novena_baseline_top.v) + + 0 + 0 + 000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000148000000020000000000000000000000000200000064ffffffff000000810000000300000002000001480000000100000003000000000000000100000003 + true + novena_baseline_top (E:/__DNSSEC/novena_baseline/src/verilog/novena_baseline_top.v) + + + + 1 + Design Utilities + + + + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000000000000000001bd000000010000000100000000000000000000000064ffffffff000000810000000000000001000001bd0000000100000000 + false + + + + + 1 + + + 0 + 0 + 000000ff000000000000000100000000000000000100000000000000000000000000000000000003a3000000040101000100000000000000000000000064ffffffff000000810000000000000004000000420000000100000000000000240000000100000000000000660000000100000000000002d70000000100000000 + false + clkmgr_dcm.xco + + + + 1 + work + + + 0 + 0 + 000000ff00000000000000010000000000000000010000000000000000000000000000000000000109000000010001000100000000000000000000000064ffffffff000000810000000000000001000001090000000100000000 + false + work + + + + 1 + Configure Target Device + Design Utilities + Implement Design/Map + Implement Design/Place & Route + Implement Design/Translate + Synthesize - XST + User Constraints + + + Generate Programming File + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000000000000000001bd000000010000000100000000000000000000000064ffffffff000000810000000000000001000001bd0000000100000000 + false + Generate Programming File + + + + 1 + + + + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000000000000000001bd000000010000000100000000000000000000000064ffffffff000000810000000000000001000001bd0000000100000000 + false + + + 000000ff00000000000000020000011b0000011b01000000050100000002 + Implementation + + + 1 + User Constraints + + + + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000000000000000001bd000000010000000100000000000000000000000064ffffffff000000810000000000000001000001bd0000000100000000 + false + + + + + 1 + + + + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000000000000000001bd000000010000000100000000000000000000000064ffffffff000000810000000000000001000001bd0000000100000000 + false + + + + + 2 + /novena_baseline_top E:|__DNSSEC|novena_baseline|src|verilog|novena_baseline_top.v/clkmgr - novena_clkmgr + /novena_baseline_top E:|__DNSSEC|novena_baseline|src|verilog|novena_baseline_top.v/core_mux - core_selector + /novena_baseline_top E:|__DNSSEC|novena_baseline|src|verilog|novena_baseline_top.v/eim - eim_arbiter + /tb_demo_adder E:|__DNSSEC|novena_baseline|src|testbench|tb_demo_adder.v/uut - novena_baseline_top/clkmgr - novena_clkmgr + /tb_demo_adder E:|__DNSSEC|novena_baseline|src|testbench|tb_demo_adder.v/uut - novena_baseline_top/core_mux - core_selector + /tb_demo_adder E:|__DNSSEC|novena_baseline|src|testbench|tb_demo_adder.v/uut - novena_baseline_top/eim - eim_arbiter + + + tb_demo_adder (E:/__DNSSEC/novena_baseline/src/testbench/tb_demo_adder.v) + + 0 + 0 + 000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000165000000020000000000000000000000000200000064ffffffff000000810000000300000002000001650000000100000003000000000000000100000003 + true + tb_demo_adder (E:/__DNSSEC/novena_baseline/src/testbench/tb_demo_adder.v) + + + + 1 + Design Utilities + ISim Simulator + + + + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000000000000000001bd000000010000000100000000000000000000000064ffffffff000000810000000000000001000001bd0000000100000000 + false + + + + + 1 + + + Simulate Behavioral Model + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000000000000000001bd000000010000000100000000000000000000000064ffffffff000000810000000000000001000001bd0000000100000000 + false + Simulate Behavioral Model + + -- cgit v1.2.3