From b2d1815e4788f9c3c737c9235e5b102718111373 Mon Sep 17 00:00:00 2001
From: Paul Selkirk <paul@psgd.org>
Date: Mon, 2 Feb 2015 18:06:50 -0500
Subject: add a command-line build, for those who like that sort of thing

---
 rtl/build/Makefile | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 rtl/build/Makefile

(limited to 'rtl/build/Makefile')

diff --git a/rtl/build/Makefile b/rtl/build/Makefile
new file mode 100644
index 0000000..aa5aeb4
--- /dev/null
+++ b/rtl/build/Makefile
@@ -0,0 +1,22 @@
+project = novena_baseline_top
+vendor = xilinx
+family = spartan6
+part = xc6slx45csg324-3
+top_module = novena_baseline_top
+isedir = /opt/Xilinx/14.7/ISE_DS
+xil_env = . $(isedir)/settings64.sh
+
+vfiles = \
+	../src/verilog/novena_baseline_top.v \
+	../src/verilog/novena_clkmgr.v \
+	../src/verilog/cdc_bus_pulse.v \
+	../src/verilog/eim_arbiter.v \
+	../src/verilog/demo_adder.v \
+	../src/verilog/eim_da_phy.v \
+	../src/verilog/eim_arbiter_cdc.v \
+	../src/verilog/core_selector.v \
+	../src/testbench/tb_demo_adder.v \
+	../src/verilog/eim_indicator.v \
+	../src/ipcore/clkmgr_dcm.v
+
+include xilinx.mk
-- 
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