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Diffstat (limited to 'sw/test-sha256/novena-eim.c')
-rw-r--r--sw/test-sha256/novena-eim.c143
1 files changed, 72 insertions, 71 deletions
diff --git a/sw/test-sha256/novena-eim.c b/sw/test-sha256/novena-eim.c
index 9ea76ef..1effff1 100644
--- a/sw/test-sha256/novena-eim.c
+++ b/sw/test-sha256/novena-eim.c
@@ -11,6 +11,7 @@
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
+#include <stdint.h>
#include <sys/mman.h>
#include "novena-eim.h"
@@ -38,7 +39,7 @@ int eim_setup()
// determine memory page size to use in mmap()
mem_page_size = sysconf(_SC_PAGESIZE);
if (mem_page_size < 1)
- { printf("ERROR: sysconf(_SC_PAGESIZE) == %l\n", mem_page_size);
+ { printf("ERROR: sysconf(_SC_PAGESIZE) == %ld\n", mem_page_size);
return -1;
}
@@ -117,52 +118,52 @@ void _eim_setup_iomuxc()
reg_pad.reserved_31_17 = 0; // must be 0
// all the pins must be configured to use the same ALT0 mode
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_CS0_B, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_OE_B, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_RW, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_LBA_B, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD00, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD01, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD02, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD03, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD04, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD05, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD06, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD07, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD08, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD09, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD10, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD11, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD12, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD13, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD14, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD15, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_WAIT_B, (unsigned int *)&reg_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_BCLK, (unsigned int *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_CS0_B, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_OE_B, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_RW, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_LBA_B, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD00, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD01, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD02, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD03, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD04, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD05, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD06, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD07, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD08, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD09, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD10, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD11, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD12, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD13, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD14, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD15, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_WAIT_B, (uint32_t *)&reg_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_BCLK, (uint32_t *)&reg_mux);
// we need to configure all the I/O pads too
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_CS0_B, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_OE_B, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_RW, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_LBA_B, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD00, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD01, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD02, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD03, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD04, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD05, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD06, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD07, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD08, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD09, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD10, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD11, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD12, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD13, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD14, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD15, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_WAIT_B, (unsigned int *)&reg_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_BCLK, (unsigned int *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_CS0_B, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_OE_B, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_RW, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_LBA_B, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD00, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD01, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD02, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD03, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD04, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD05, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD06, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD07, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD08, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD09, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD10, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD11, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD12, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD13, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD14, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD15, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_WAIT_B, (uint32_t *)&reg_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_BCLK, (uint32_t *)&reg_pad);
}
@@ -174,7 +175,7 @@ void _eim_setup_ccm()
struct CCM_CCGR6 ccm_ccgr6;
// read register
- eim_read_32(CCM_CCGR6, (unsigned int *)&ccm_ccgr6);
+ eim_read_32(CCM_CCGR6, (uint32_t *)&ccm_ccgr6);
// modify register
ccm_ccgr6.cg0_usboh3 = CCM_CGR_ON_EXCEPT_STOP;
@@ -197,7 +198,7 @@ void _eim_setup_ccm()
ccm_ccgr6.cg15_reserved = 0;
// write register
- eim_write_32(CCM_CCGR6, (unsigned int *)&ccm_ccgr6);
+ eim_write_32(CCM_CCGR6, (uint32_t *)&ccm_ccgr6);
}
@@ -218,16 +219,16 @@ void _eim_setup_eim()
struct EIM_EAR ear;
// read all the registers
- eim_read_32(EIM_CS0GCR1, (unsigned int *)&gcr1);
- eim_read_32(EIM_CS0GCR2, (unsigned int *)&gcr2);
- eim_read_32(EIM_CS0RCR1, (unsigned int *)&rcr1);
- eim_read_32(EIM_CS0RCR2, (unsigned int *)&rcr2);
- eim_read_32(EIM_CS0WCR1, (unsigned int *)&wcr1);
- eim_read_32(EIM_CS0WCR2, (unsigned int *)&wcr2);
+ eim_read_32(EIM_CS0GCR1, (uint32_t *)&gcr1);
+ eim_read_32(EIM_CS0GCR2, (uint32_t *)&gcr2);
+ eim_read_32(EIM_CS0RCR1, (uint32_t *)&rcr1);
+ eim_read_32(EIM_CS0RCR2, (uint32_t *)&rcr2);
+ eim_read_32(EIM_CS0WCR1, (uint32_t *)&wcr1);
+ eim_read_32(EIM_CS0WCR2, (uint32_t *)&wcr2);
- eim_read_32(EIM_WCR, (unsigned int *)&wcr);
- eim_read_32(EIM_WIAR, (unsigned int *)&wiar);
- eim_read_32(EIM_EAR, (unsigned int *)&ear);
+ eim_read_32(EIM_WCR, (uint32_t *)&wcr);
+ eim_read_32(EIM_WIAR, (uint32_t *)&wiar);
+ eim_read_32(EIM_EAR, (uint32_t *)&ear);
// manipulate registers as needed
gcr1.csen = 1; // chip select is enabled |
@@ -319,38 +320,38 @@ void _eim_setup_eim()
//ear.error_addr = x; // read-only |
// write modified registers
- eim_write_32(EIM_CS0GCR1, (unsigned int *)&gcr1);
- eim_write_32(EIM_CS0GCR2, (unsigned int *)&gcr2);
- eim_write_32(EIM_CS0RCR1, (unsigned int *)&rcr1);
- eim_write_32(EIM_CS0RCR2, (unsigned int *)&rcr2);
- eim_write_32(EIM_CS0WCR1, (unsigned int *)&wcr1);
- eim_write_32(EIM_CS0WCR2, (unsigned int *)&wcr2);
- eim_write_32(EIM_WCR, (unsigned int *)&wcr);
- eim_write_32(EIM_WIAR, (unsigned int *)&wiar);/*
- eim_write_32(EIM_EAR, (unsigned int *)&ear);*/
+ eim_write_32(EIM_CS0GCR1, (uint32_t *)&gcr1);
+ eim_write_32(EIM_CS0GCR2, (uint32_t *)&gcr2);
+ eim_write_32(EIM_CS0RCR1, (uint32_t *)&rcr1);
+ eim_write_32(EIM_CS0RCR2, (uint32_t *)&rcr2);
+ eim_write_32(EIM_CS0WCR1, (uint32_t *)&wcr1);
+ eim_write_32(EIM_CS0WCR2, (uint32_t *)&wcr2);
+ eim_write_32(EIM_WCR, (uint32_t *)&wcr);
+ eim_write_32(EIM_WIAR, (uint32_t *)&wiar);/*
+ eim_write_32(EIM_EAR, (uint32_t *)&ear);*/
}
//------------------------------------------------------------------------------
-void eim_write_32(off_t offset, unsigned int *pvalue)
+void eim_write_32(off_t offset, uint32_t *pvalue)
//------------------------------------------------------------------------------
{
// calculate memory offset
- unsigned int *ptr = (unsigned int *)_eim_calc_offset(offset);
+ uint32_t *ptr = (uint32_t *)_eim_calc_offset(offset);
// write data to memory
- memcpy(ptr, pvalue, sizeof(unsigned int));
+ memcpy(ptr, pvalue, sizeof(uint32_t));
}
//------------------------------------------------------------------------------
-void eim_read_32(off_t offset, unsigned int *pvalue)
+void eim_read_32(off_t offset, uint32_t *pvalue)
//------------------------------------------------------------------------------
{
// calculate memory offset
- unsigned int *ptr = (unsigned int *)_eim_calc_offset(offset);
+ uint32_t *ptr = (uint32_t *)_eim_calc_offset(offset);
// read data from memory
- memcpy(pvalue, ptr, sizeof(unsigned int));
+ memcpy(pvalue, ptr, sizeof(uint32_t));
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 22:25:34 +0000