1 files changed, 4 insertions, 7 deletions
diff --git a/rtl/src/verilog/core_selector.v b/rtl/src/verilog/core_selector.v
index e39a8b1..8ac8909 100644
--- a/rtl/src/verilog/core_selector.v
+++ b/rtl/src/verilog/core_selector.v
@@ -1,7 +1,7 @@
 //======================================================================
 //
 // core_selector.v
-// -----------------
+// ---------------
 // Top level wrapper that creates the Cryptech coretest system.
 // The wrapper contains instances of external interface, coretest
 // and the core to be tested. And if more than one core is
@@ -170,8 +170,7 @@ module core_selector
 
 		.address(addr_core_reg),
 		.write_data(sys_write_data),
-      .read_data(read_data_sha1),
-		.error()
+      .read_data(read_data_sha1)
 	);
 	`endif
 	
@@ -192,8 +191,7 @@ module core_selector
 
 		.address(addr_core_reg),
 		.write_data(sys_write_data),
-      .read_data(read_data_sha256),
-		.error()
+      .read_data(read_data_sha256)
 	);
 	`endif
 		 
@@ -214,8 +212,7 @@ module core_selector
 
 		.address(addr_core_reg),
 		.write_data(sys_write_data),
-      .read_data(read_data_sha512),
-		.error()
+      .read_data(read_data_sha512)
 	);
 	`endif