diff options
| -rw-r--r-- | sw/novena-eim.c | 245 |
1 files changed, 127 insertions, 118 deletions
diff --git a/sw/novena-eim.c b/sw/novena-eim.c index 9b3d236..85bfac0 100644 --- a/sw/novena-eim.c +++ b/sw/novena-eim.c @@ -131,7 +131,6 @@ enum IMX6DQ_REGISTER_OFFSET EIM_WCR = 0x021B8090, EIM_WIAR = 0x021B8094, EIM_EAR = 0x021B8098, - }; @@ -140,163 +139,163 @@ enum IMX6DQ_REGISTER_OFFSET //------------------------------------------------------------------------------ struct IOMUXC_SW_MUX_CTL_PAD_EIM { - uint32_t mux_mode : 3; - uint32_t reserved_3 : 1; - uint32_t sion : 1; - uint32_t reserved_31_5 : 27; + unsigned int mux_mode : 3; + unsigned int reserved_3 : 1; + unsigned int sion : 1; + unsigned int reserved_31_5 : 27; }; struct IOMUXC_SW_PAD_CTL_PAD_EIM { - uint32_t sre : 1; - uint32_t reserved_2_1 : 2; - uint32_t dse : 3; - uint32_t speed : 2; - uint32_t reserved_10_8 : 3; - uint32_t ode : 1; - uint32_t pke : 1; - uint32_t pue : 1; - uint32_t pus : 2; - uint32_t hys : 1; - uint32_t reserved_31_17 : 15; + unsigned int sre : 1; + unsigned int reserved_2_1 : 2; + unsigned int dse : 3; + unsigned int speed : 2; + unsigned int reserved_10_8 : 3; + unsigned int ode : 1; + unsigned int pke : 1; + unsigned int pue : 1; + unsigned int pus : 2; + unsigned int hys : 1; + unsigned int reserved_31_17 : 15; }; struct CCM_CCGR6 { - uint32_t cg0_usboh3 : 2; - uint32_t cg1_usdhc1 : 2; - uint32_t cg2_usdhc2 : 2; - uint32_t cg3_usdhc3 : 2; + unsigned int cg0_usboh3 : 2; + unsigned int cg1_usdhc1 : 2; + unsigned int cg2_usdhc2 : 2; + unsigned int cg3_usdhc3 : 2; - uint32_t cg3_usdhc4 : 2; - uint32_t cg5_eim_slow : 2; - uint32_t cg6_vdoaxiclk : 2; - uint32_t cg7_vpu : 2; + unsigned int cg3_usdhc4 : 2; + unsigned int cg5_eim_slow : 2; + unsigned int cg6_vdoaxiclk : 2; + unsigned int cg7_vpu : 2; - uint32_t cg8_reserved : 2; - uint32_t cg9_reserved : 2; - uint32_t cg10_reserved : 2; - uint32_t cg11_reserved : 2; + unsigned int cg8_reserved : 2; + unsigned int cg9_reserved : 2; + unsigned int cg10_reserved : 2; + unsigned int cg11_reserved : 2; - uint32_t cg12_reserved : 2; - uint32_t cg13_reserved : 2; - uint32_t cg14_reserved : 2; - uint32_t cg15_reserved : 2; + unsigned int cg12_reserved : 2; + unsigned int cg13_reserved : 2; + unsigned int cg14_reserved : 2; + unsigned int cg15_reserved : 2; }; struct EIM_CS_GCR1 { - uint32_t csen : 1; - uint32_t swr : 1; - uint32_t srd : 1; - uint32_t mum : 1; - uint32_t wfl : 1; - uint32_t rfl : 1; - uint32_t cre : 1; - uint32_t crep : 1; - uint32_t bl : 3; - uint32_t wc : 1; - uint32_t bcd : 2; - uint32_t bcs : 2; - uint32_t dsz : 3; - uint32_t sp : 1; - uint32_t csrec : 3; - uint32_t aus : 1; - uint32_t gbc : 3; - uint32_t wp : 1; - uint32_t psz : 4; + unsigned int csen : 1; + unsigned int swr : 1; + unsigned int srd : 1; + unsigned int mum : 1; + unsigned int wfl : 1; + unsigned int rfl : 1; + unsigned int cre : 1; + unsigned int crep : 1; + unsigned int bl : 3; + unsigned int wc : 1; + unsigned int bcd : 2; + unsigned int bcs : 2; + unsigned int dsz : 3; + unsigned int sp : 1; + unsigned int csrec : 3; + unsigned int aus : 1; + unsigned int gbc : 3; + unsigned int wp : 1; + unsigned int psz : 4; }; struct EIM_CS_GCR2 { - uint32_t adh : 2; - uint32_t reserved_3_2 : 2; - uint32_t daps : 4; - uint32_t dae : 1; - uint32_t dap : 1; - uint32_t reserved_11_10 : 2; - uint32_t mux16_byp_grant : 1; - uint32_t reserved_31_13 : 19; + unsigned int adh : 2; + unsigned int reserved_3_2 : 2; + unsigned int daps : 4; + unsigned int dae : 1; + unsigned int dap : 1; + unsigned int reserved_11_10 : 2; + unsigned int mux16_byp_grant : 1; + unsigned int reserved_31_13 : 19; }; struct EIM_CS_RCR1 { - uint32_t rcsn : 3; - uint32_t reserved_3 : 1; - uint32_t rcsa : 3; - uint32_t reserved_7 : 1; - uint32_t oen : 3; - uint32_t reserved_11 : 1; - uint32_t oea : 3; - uint32_t reserved_15 : 1; - uint32_t radvn : 3; - uint32_t ral : 1; - uint32_t radva : 3; - uint32_t reserved_23 : 1; - uint32_t rwsc : 6; - uint32_t reserved_31_30 : 2; + unsigned int rcsn : 3; + unsigned int reserved_3 : 1; + unsigned int rcsa : 3; + unsigned int reserved_7 : 1; + unsigned int oen : 3; + unsigned int reserved_11 : 1; + unsigned int oea : 3; + unsigned int reserved_15 : 1; + unsigned int radvn : 3; + unsigned int ral : 1; + unsigned int radva : 3; + unsigned int reserved_23 : 1; + unsigned int rwsc : 6; + unsigned int reserved_31_30 : 2; }; struct EIM_CS_RCR2 { - uint32_t rben : 3; - uint32_t rbe : 1; - uint32_t rbea : 3; - uint32_t reserved_7 : 1; - uint32_t rl : 2; - uint32_t reserved_11_10 : 2; - uint32_t pat : 3; - uint32_t apr : 1; - uint32_t reserved_31_16 : 16; + unsigned int rben : 3; + unsigned int rbe : 1; + unsigned int rbea : 3; + unsigned int reserved_7 : 1; + unsigned int rl : 2; + unsigned int reserved_11_10 : 2; + unsigned int pat : 3; + unsigned int apr : 1; + unsigned int reserved_31_16 : 16; }; struct EIM_CS_WCR1 { - uint32_t wcsn : 3; - uint32_t wcsa : 3; - uint32_t wen : 3; - uint32_t wea : 3; - uint32_t wben : 3; - uint32_t wbea : 3; - uint32_t wadvn : 3; - uint32_t wadva : 3; - uint32_t wwsc : 6; - uint32_t wbed : 1; - uint32_t wal : 1; + unsigned int wcsn : 3; + unsigned int wcsa : 3; + unsigned int wen : 3; + unsigned int wea : 3; + unsigned int wben : 3; + unsigned int wbea : 3; + unsigned int wadvn : 3; + unsigned int wadva : 3; + unsigned int wwsc : 6; + unsigned int wbed : 1; + unsigned int wal : 1; }; struct EIM_CS_WCR2 { - uint32_t wbcdd : 1; - uint32_t reserved_31_1 : 31; + unsigned int wbcdd : 1; + unsigned int reserved_31_1 : 31; }; struct EIM_WCR { - uint32_t bcm : 1; - uint32_t gbcd : 2; - uint32_t reserved_3 : 1; - uint32_t inten : 1; - uint32_t intpol : 1; - uint32_t reserved_7_6 : 2; - uint32_t wdog_en : 1; - uint32_t wdog_limit : 2; - uint32_t reserved_31_11 : 21; + unsigned int bcm : 1; + unsigned int gbcd : 2; + unsigned int reserved_3 : 1; + unsigned int inten : 1; + unsigned int intpol : 1; + unsigned int reserved_7_6 : 2; + unsigned int wdog_en : 1; + unsigned int wdog_limit : 2; + unsigned int reserved_31_11 : 21; }; struct EIM_WIAR { - uint32_t ips_req : 1; - uint32_t ips_ack : 1; - uint32_t irq : 1; - uint32_t errst : 1; - uint32_t aclk_en : 1; - uint32_t reserved_31_5 : 27; + unsigned int ips_req : 1; + unsigned int ips_ack : 1; + unsigned int irq : 1; + unsigned int errst : 1; + unsigned int aclk_en : 1; + unsigned int reserved_31_5 : 27; }; struct EIM_EAR { - uint32_t error_addr : 32; + unsigned int error_addr : 32; }; @@ -308,6 +307,7 @@ static int mem_dev_fd = -1; static void * mem_map_ptr = MAP_FAILED; static off_t mem_base_addr = 0; + //------------------------------------------------------------------------------ // Prototypes //------------------------------------------------------------------------------ @@ -318,7 +318,9 @@ static void _eim_cleanup (void); static off_t _eim_calc_offset (off_t); static void _eim_remap_mem (off_t); + //------------------------------------------------------------------------------ +// Set up EIM bus. Returns 0 on success, -1 on failure. //------------------------------------------------------------------------------ int eim_setup(void) { @@ -342,15 +344,10 @@ int eim_setup(void) return -1; } - /* Several blocks in the CPU have common pins, we can use I/O MUX Controller - * to configure what block will actually use I/O pins. We wait EIM module to be able - * to communicate with the on-board FPGA. Let's configure IOMUXC accordingly. - */ + // configure IOMUXC _eim_setup_iomuxc(); - /* We need to enable clocking of EIM block in order to be able to use it. - * Let's configure Clock Controller Module accordingly. - */ + // configure Clock Controller Module _eim_setup_ccm(); /* We need to properly configure EIM mode and all the corresponding parameters. @@ -364,6 +361,7 @@ int eim_setup(void) //------------------------------------------------------------------------------ +// Shut down EIM bus. This is called automatically on exit(). //------------------------------------------------------------------------------ static void _eim_cleanup(void) { @@ -380,6 +378,9 @@ static void _eim_cleanup(void) //------------------------------------------------------------------------------ +// Several blocks in the CPU have common pins. We use the I/O MUX Controller +// to configure what block will actually use I/O pins. We wait for the EIM +// module to be able to communicate with the on-board FPGA. //------------------------------------------------------------------------------ static void _eim_setup_iomuxc(void) { @@ -457,6 +458,7 @@ static void _eim_setup_iomuxc(void) //------------------------------------------------------------------------------ +// Configure Clock Controller Module to enable clocking of EIM block. //------------------------------------------------------------------------------ static void _eim_setup_ccm(void) { @@ -492,6 +494,7 @@ static void _eim_setup_ccm(void) //------------------------------------------------------------------------------ +// Configure EIM mode and all the corresponding parameters. That's a lot of code. //------------------------------------------------------------------------------ static void _eim_setup_eim(void) { @@ -622,6 +625,8 @@ static void _eim_setup_eim(void) //------------------------------------------------------------------------------ +// Write a 32-bit word to EIM. +// If EIM is not set up correctly, this will abort with a bus error. //------------------------------------------------------------------------------ void eim_write_32(off_t offset, uint32_t *pvalue) { @@ -633,6 +638,8 @@ void eim_write_32(off_t offset, uint32_t *pvalue) } //------------------------------------------------------------------------------ +// Read a 32-bit word from EIM. +// If EIM is not set up correctly, this will abort with a bus error. //------------------------------------------------------------------------------ void eim_read_32(off_t offset, uint32_t *pvalue) { @@ -645,6 +652,7 @@ void eim_read_32(off_t offset, uint32_t *pvalue) //------------------------------------------------------------------------------ +// Calculate an offset into the currently-mapped EIM page. //------------------------------------------------------------------------------ static off_t _eim_calc_offset(off_t offset) { @@ -666,6 +674,7 @@ static off_t _eim_calc_offset(off_t offset) //------------------------------------------------------------------------------ +// Map in a new EIM page. //------------------------------------------------------------------------------ static void _eim_remap_mem(off_t offset) { |