aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)Author
2014-03-16Adding clock define.HEADmasterJoachim Strömbergson
2014-03-13Adding a prebuilt FPGA configuration file for the TerasIC C5G board.Joachim Strömbergson
2014-03-13Adding Makefile for building and running simulations.Joachim Strömbergson
2014-03-13Adding testbench for the coretest_test_core subsystem.Joachim Strömbergson
2014-03-13Adding the RTL that builds the subsystem.Joachim Strömbergson
2014-03-13Adding symbolic name and comment to highlight the serial port device.Joachim Strömbergson
2014-03-13Adding sw to run tests on a FPGA device connected to the FPGA board via a ser...Joachim Strömbergson
2014-03-13Adding license and readme file for the coretest_test_core subsystem.Joachim Strömbergson