stm-fmc.h


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/*
 * stm-fmc.h
 * ---------
 * Functions to set up and use the FMC bus.
 *
 * Copyright (c) 2015, NORDUnet A/S All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 *
 * - Neither the name of the NORDUnet nor the names of its contributors may
 *   be used to endorse or promote products derived from this software
 *   without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __STM_FMC_H
#define __STM_FMC_H

#include "stm32f4xx_hal.h"

#define FMC_FPGA_BASE_ADDR              0x60000000
#define FMC_FPGA_ADDR_MASK              0x03FFFFFC  // there are 26 physical lines, but "only" 24 usable for now
#define FMC_FPGA_NWAIT_MAX_POLL_TICKS   10

#define FMC_GPIO_PORT_NWAIT             GPIOD
#define FMC_GPIO_PIN_NWAIT              GPIO_PIN_6

#define FMC_NWAIT_IDLE                  GPIO_PIN_SET

#define fmc_af_gpio(port, pins)			       \
    GPIO_InitStruct.Pin = pins;			       \
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;	       \
    GPIO_InitStruct.Pull = GPIO_NOPULL;		       \
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; \
    GPIO_InitStruct.Alternate = GPIO_AF12_FMC;	       \
    __HAL_RCC_##port##_CLK_ENABLE();		       \
    HAL_GPIO_Init(port, &GPIO_InitStruct)


extern HAL_StatusTypeDef fmc_init(void);
extern void fmc_init_gpio(void);

extern int fmc_write_32(uint32_t addr, uint32_t *data);
extern int fmc_read_32(uint32_t addr, uint32_t *data);

#endif /* __STM_FMC_H */
/*
 * mkmif.c
 * -------
 * HAL interface to Cryptech Master Key Memory Interface.
 *
 * Copyright (c) 2016, NORDUnet A/S
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 *
 * - Neither the name of the NORDUnet nor the names of its contributors may
 *   be used to endorse or promote products derived from this software
 *   without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <stdlib.h>

#include "hal.h"
#include "hal_internal.h"

typedef union {
    uint8_t byte[4];
    uint32_t word;
} byteword_t;

hal_error_t hal_mkmif_init(hal_core_t *core)
{
    byteword_t cmd;
    hal_error_t err;

    cmd.word = htonl(MKMIF_CTRL_CMD_INIT);

    err = hal_core_alloc(MKMIF_NAME, &core) ||
        hal_io_write(core, MKMIF_ADDR_CTRL, cmd.byte, 4) ||
        hal_io_wait_ready(core);

    hal_core_free(core);
    return err;
}

hal_error_t hal_mkmif_set_clockspeed(hal_core_t *core, const uint32_t divisor)
{
    byteword_t data;
    hal_error_t err;

    data.word = htonl(divisor);

    err = hal_core_alloc(MKMIF_NAME, &core) ||
        hal_io_write(core, MKMIF_ADDR_SCLK_DIV, data.byte, 4);

    hal_core_free(core);
    return err;
}

hal_error_t hal_mkmif_get_clockspeed(hal_core_t *core, uint32_t *divisor)
{
    byteword_t data;
    hal_error_t err;

    err = hal_core_alloc(MKMIF_NAME, &core) ||
        hal_io_read(core, MKMIF_ADDR_SCLK_DIV, data.byte, 4);

    if (err == HAL_OK)
        *divisor = htonl(data.word);

    hal_core_free(core);
    return err;
}

hal_error_t hal_mkmif_write(hal_core_t *core, uint32_t addr, const uint8_t *buf, size_t len)
{
    byteword_t cmd;
    hal_error_t err;

    if (len % 4 != 0)
        return HAL_ERROR_IO_BAD_COUNT;

    cmd.word = htonl(MKMIF_CTRL_CMD_WRITE);

    if ((err = hal_core_alloc(MKMIF_NAME, &core)) == HAL_OK) {
        for (; len > 0; addr += 4, buf += 4, len -= 4) {
            byteword_t write_addr;
            write_addr.word = htonl((uint32_t)addr);
            if ((err = hal_io_write(core, MKMIF_ADDR_EMEM_ADDR, write_addr.byte, 4)) ||
                (err = hal_io_write(core, MKMIF_ADDR_EMEM_DATA, buf, 4)) ||
                (err = hal_io_write(core, MKMIF_ADDR_CTRL, cmd.byte, 4)) ||
                (err = hal_io_wait_ready(core)))
                return err;
        }
    }

    hal_core_free(core);
    return err;
}

hal_error_t hal_mkmif_write_word(hal_core_t *core, uint32_t addr, const uint32_t data)
{
    byteword_t d;

    d.word = htonl(data);

    return hal_mkmif_write(core, addr, d.byte, 4);
}

hal_error_t hal_mkmif_read(hal_core_t *core, uint32_t addr, uint8_t *buf, size_t len)
{
    byteword_t cmd;
    hal_error_t err;

    if (len % 4 != 0)
        return HAL_ERROR_IO_BAD_COUNT;

    cmd.word = htonl(MKMIF_CTRL_CMD_READ);

    if ((err = hal_core_alloc(MKMIF_NAME, &core)) == HAL_OK) {
        for (; len > 0; addr += 4, buf += 4, len -= 4) {
            byteword_t read_addr;
            read_addr.word = htonl((uint32_t)addr);
            if ((err = hal_io_write(core, MKMIF_ADDR_EMEM_ADDR, read_addr.byte, 4)) ||
                (err = hal_io_write(core, MKMIF_ADDR_CTRL, cmd.byte, 4)) ||
                (err = hal_io_wait_valid(core)) ||
                (err = hal_io_read(core, MKMIF_ADDR_EMEM_DATA, buf, 4)))
                goto out;
        }
    }

out:
    hal_core_free(core);
    return err;
}

hal_error_t hal_mkmif_read_word(hal_core_t *core, uint32_t addr, uint32_t *data)
{
    byteword_t d;
    hal_error_t err;

    if ((err = hal_mkmif_read(core, addr, d.byte, 4)) != HAL_OK)
        return err;

    *data = htonl(d.word);

    return HAL_OK;
}