#!/bin/sh -
# Voodoo to load a new bitstream image into the FPGA on a Novena PVT-1.
if test $# -ne 1 || test ! -f "$1"
then
echo 1>&2 "usage: $0 bitstream-file"
exit 1
fi
echo "Setting export of reset pin"
echo 135 > /sys/class/gpio/export
echo "Setting reset pin to out"
echo out > /sys/class/gpio/gpio135/direction
echo "Flipping reset"
echo 0 > /sys/class/gpio/gpio135/value
echo 1 > /sys/class/gpio/gpio135/value
echo "Configuring FPGA from $1"
dd if="$1" of=/dev/spidev2.0 bs=32
echo "Turning on clock to FPGA"
eim_peek_poke --write 0x020c8160 0x00000d2b
itle='sw/stm32' href='/sw/stm32/'>sw/stm32
blob: 1f7faf12edbb1072bdd7a0e0d35d634210110f7e (
plain) (
blame)
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TEST = cli-test
OBJS = \
crc32.o \
mgmt-cli.o \
mgmt-dfu.o \
mgmt-fpga.o \
mgmt-keystore.o \
mgmt-masterkey.o \
mgmt-misc.o \
mgmt-show.o \
mgmt-test.o \
test-fmc.o \
test-mkmif.o \
test_sdram.o
BOARD_OBJS = \
$(TOPLEVEL)/stm-init.o \
$(TOPLEVEL)/stm-fmc.o \
$(TOPLEVEL)/stm-uart.o \
$(TOPLEVEL)/syscalls.o \
$(TOPLEVEL)/stm-rtc.o \
$(TOPLEVEL)/spiflash_n25q128.o \
$(TOPLEVEL)/stm-fpgacfg.o \
$(TOPLEVEL)/stm-keystore.o \
$(TOPLEVEL)/stm-sdram.o \
$(TOPLEVEL)/stm-flash.o \
$(BOARD_DIR)/TOOLCHAIN_GCC_ARM/startup_stm32f429xx_rtos.o \
$(BOARD_DIR)/system_stm32f4xx.o \
$(BOARD_DIR)/stm32f4xx_hal_msp.o \
$(BOARD_DIR)/stm32f4xx_it_rtos.o
CFLAGS += -I$(LIBCLI_SRC) -I$(LIBHAL_SRC)
CFLAGS += -I$(RTOS_DIR)/rtos -I$(RTOS_DIR)/rtx/TARGET_CORTEX_M
LIBS += $(LIBCLI_BLD)/libcli.a $(LIBHAL_BLD)/libhal.a $(LIBTFM_BLD)/libtfm.a $(RTOS_DIR)/librtos.a
all: $(TEST:=.elf)
%.elf: %.o $(BOARD_OBJS) $(OBJS) $(LIBS)
$(CC) $(CFLAGS) $^ -o $@ -T$(LDSCRIPT) -g -Wl,-Map=$*.map
$(OBJCOPY) -O binary $*.elf $*.bin
$(SIZE) $*.elf
clean:
rm -f *.o
rm -f *.elf
rm -f *.bin
rm -f *.map
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