/*
 * stm-fpgacfg.h
 * ---------
 * Functions and defines for accessing the FPGA config memory.
 *
 * Copyright (c) 2016, NORDUnet A/S All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 *
 * - Neither the name of the NORDUnet nor the names of its contributors may
 *   be used to endorse or promote products derived from this software
 *   without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __STM32_FPGACFG_H
#define __STM32_FPGACFG_H

#include "stm32f4xx_hal.h"
#include "spiflash_n25q128.h"

#define PROM_FPGA_DIS_Pin              GPIO_PIN_14
#define PROM_FPGA_DIS_GPIO_Port        GPIOI
#define PROM_ARM_ENA_Pin               GPIO_PIN_6
#define PROM_ARM_ENA_GPIO_Port         GPIOF
#define PROM_CS_N_Pin                  GPIO_PIN_12
#define PROM_CS_N_GPIO_Port            GPIOB


enum fpgacfg_access_ctrl {
  ALLOW_NONE,
  ALLOW_FPGA,
  ALLOW_ARM,
};

extern int fpgacfg_check_id();
extern int fpgacfg_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len);
extern void fpgacfg_access_control(enum fpgacfg_access_ctrl access);

extern SPI_HandleTypeDef hspi_fpgacfg;

#endif /* __STM32_FPGACFG_H */