From 076b211d5e5d0f2b6366597aaade223fac78d346 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Thu, 7 Apr 2016 14:51:01 -0400 Subject: Add HardFault_Handler for debugging. --- stm32f4xx_it.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) (limited to 'stm32f4xx_it.c') diff --git a/stm32f4xx_it.c b/stm32f4xx_it.c index b2b64bf..ea932fd 100644 --- a/stm32f4xx_it.c +++ b/stm32f4xx_it.c @@ -69,5 +69,60 @@ void SysTick_Handler(void) /* USER CODE BEGIN 1 */ +void hard_fault_handler_c (unsigned int * hardfault_args) +{ + volatile unsigned int stacked_r0; + volatile unsigned int stacked_r1; + volatile unsigned int stacked_r2; + volatile unsigned int stacked_r3; + volatile unsigned int stacked_r12; + volatile unsigned int stacked_lr; + volatile unsigned int stacked_pc; + volatile unsigned int stacked_psr; + + stacked_r0 = hardfault_args[0]; + stacked_r1 = hardfault_args[1]; + stacked_r2 = hardfault_args[2]; + stacked_r3 = hardfault_args[3]; + + stacked_r12 = hardfault_args[4]; + stacked_lr = hardfault_args[5]; + stacked_pc = hardfault_args[6]; + stacked_psr = hardfault_args[7]; + + printf ("\n[Hard fault handler]\n"); + printf ("R0 = %08x\n", stacked_r0); + printf ("R1 = %08x\n", stacked_r1); + printf ("R2 = %08x\n", stacked_r2); + printf ("R3 = %08x\n", stacked_r3); + printf ("R12 = %08x\n", stacked_r12); + printf ("LR [R14] = %08x subroutine call return address\n", stacked_lr); + printf ("PC [R15] = %08x program counter\n", stacked_pc); + printf ("PSR = %08x\n", stacked_psr); + printf ("BFAR = %08x\n", (*((volatile unsigned int *)(0xE000ED38)))); + printf ("CFSR = %08x\n", (*((volatile unsigned int *)(0xE000ED28)))); + printf ("HFSR = %08x\n", (*((volatile unsigned int *)(0xE000ED2C)))); + printf ("DFSR = %08x\n", (*((volatile unsigned int *)(0xE000ED30)))); + printf ("AFSR = %08x\n", (*((volatile unsigned int *)(0xE000ED3C)))); + + while (1); +} + +void HardFault_Handler(void) __attribute__( ( naked ) ); +void HardFault_Handler(void) +{ + __asm volatile ( + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " b hard_fault_handler_c \n" + " ldr r1, [r0, #24] \n" + " ldr r2, handler2_address_const \n" + " bx r2 \n" + " handler2_address_const: .word hard_fault_handler_c \n" + ); +} + /* USER CODE END 1 */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3