From e94bce23e3629e1229efe4d86660c2f5a375a1fc Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Wed, 8 Jun 2016 23:32:05 -0400 Subject: Include strings.h, for strcasecmp(). --- projects/cli-test/cli-test.c | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/cli-test/cli-test.c b/projects/cli-test/cli-test.c index a52dbec..7bac84e 100644 --- a/projects/cli-test/cli-test.c +++ b/projects/cli-test/cli-test.c @@ -42,6 +42,7 @@ #include "mgmt-test.h" #include +#include /* MGMT UART interrupt receive buffer (data will be put in a larger ring buffer) */ -- cgit v1.2.3 From 5a0c56d9b4d7076ddf8ed762c22519290de3f998 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Thu, 9 Jun 2016 11:47:00 -0400 Subject: Rename main.c to hsm.c for consistency and a slightly simpler Makefile. --- projects/hsm/Makefile | 13 ++- projects/hsm/hsm.c | 226 ++++++++++++++++++++++++++++++++++++++++++++++++++ projects/hsm/main.c | 226 -------------------------------------------------- 3 files changed, 232 insertions(+), 233 deletions(-) create mode 100644 projects/hsm/hsm.c delete mode 100644 projects/hsm/main.c diff --git a/projects/hsm/Makefile b/projects/hsm/Makefile index f5546d8..d8fd1f9 100644 --- a/projects/hsm/Makefile +++ b/projects/hsm/Makefile @@ -1,8 +1,7 @@ PROJ = hsm -SRCS = main.c - -OBJS = $(SRCS:.c=.o) +# objs in addition to $(PROJ).o +OBJS = CFLAGS += -I $(LIBHAL_DIR) @@ -10,10 +9,10 @@ LIBS += $(LIBHAL_DIR)/libhal.a $(LIBTFM_DIR)/libtfm.a all: $(PROJ:=.elf) -$(PROJ).elf: $(OBJS) $(BOARD_OBJS) $(LIBS) - $(CC) $(CFLAGS) $^ -o $@ -T$(LDSCRIPT) -g -Wl,-Map=$(PROJ).map - $(OBJCOPY) -O binary $(PROJ).elf $(PROJ).bin - $(SIZE) $(PROJ).elf +%.elf: %.o $(BOARD_OBJS) $(OBJS) $(LIBS) + $(CC) $(CFLAGS) $^ -o $@ -T$(LDSCRIPT) -g -Wl,-Map=$*.map + $(OBJCOPY) -O binary $*.elf $*.bin + $(SIZE) $*.elf clean: rm -f *.o diff --git a/projects/hsm/hsm.c b/projects/hsm/hsm.c new file mode 100644 index 0000000..79c567b --- /dev/null +++ b/projects/hsm/hsm.c @@ -0,0 +1,226 @@ +/* + * rpc_server.c + * ------------ + * Remote procedure call server-side private API implementation. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * This is the main RPC server moddule. It creates a new thread to deal + * with each request, to prevent a long-running request (e.g. RSA keygen) + * from blocking independent requests from other clients. This has a + * number of consequences. We can't do a blocking receive in the main + * thread, because that prevents the dispatch thread from transmitting the + * response (because they both want to lock the UART - see + * stm32f4xx_hal_uart.c). So we have to do a non-blocking receive with a + * callback routine. But we can't create a thread from the callback + * routine, because it's in the context of an ISR, so we raise a semaphore + * for the main thread to create the dispatch thread. + */ + +#include + +#include "cmsis_os.h" + +#include "stm-init.h" +#include "stm-led.h" +#include "stm-fmc.h" +#include "stm-uart.h" + +/* stm32f4xx_hal_def.h and hal.h both define HAL_OK as an enum value */ +#define HAL_OK HAL_OKAY + +#include "hal.h" +#include "hal_internal.h" +#include "slip_internal.h" +#include "xdr_internal.h" + +/* RPC buffers. For each active RPC, there will be two - input and output. + */ + +#ifndef NUM_RPC_BUFFER +/* An arbitrary number, but we don't expect to have more than 8 concurrent + * RPC requests. + */ +#define NUM_RPC_BUFFER 16 +#endif + +#ifndef MAX_PKT_SIZE +/* Another arbitrary number, more or less driven by the 4096-bit RSA + * keygen test. + */ +#define MAX_PKT_SIZE 4096 +#endif + +/* The thread entry point takes a single void* argument, so we bundle the + * packet buffer and length arguments together. + */ +typedef struct { + size_t len; + uint8_t buf[MAX_PKT_SIZE]; +} rpc_buffer_t; + +osPoolDef(rpc_buffer_pool, NUM_RPC_BUFFER, rpc_buffer_t); +osPoolId rpc_buffer_pool; + +static rpc_buffer_t *rpc_buffer_alloc(void) +{ + return (rpc_buffer_t *)osPoolCAlloc(rpc_buffer_pool); +} + +/* A mutex to arbitrate concurrent UART transmits, from RPC responses. + */ +osMutexId uart_mutex; +osMutexDef(uart_mutex); + +/* Thread entry point for the RPC request handler. + */ +static void dispatch_thread(void const *args) +{ + rpc_buffer_t *ibuf = (rpc_buffer_t *)args; + rpc_buffer_t *obuf = rpc_buffer_alloc(); + if (obuf == NULL) { + uint8_t buf[8]; + uint8_t * bufptr = &buf[4]; + const uint8_t * const limit = buf + sizeof(buf); + memcpy(buf, ibuf->buf, 4); + hal_xdr_encode_int(&bufptr, limit, HAL_ERROR_ALLOCATION_FAILURE); + osMutexWait(uart_mutex, osWaitForever); + hal_rpc_sendto(ibuf->buf, sizeof(buf), NULL); + osMutexRelease(uart_mutex); + osPoolFree(rpc_buffer_pool, ibuf); + Error_Handler(); + } + /* copy client ID from request to response */ + memcpy(obuf->buf, ibuf->buf, 4); + obuf->len = sizeof(obuf->buf) - 4; + hal_rpc_server_dispatch(ibuf->buf + 4, ibuf->len - 4, obuf->buf + 4, &obuf->len); + osPoolFree(rpc_buffer_pool, ibuf); + osMutexWait(uart_mutex, osWaitForever); + hal_error_t ret = hal_rpc_sendto(obuf->buf, obuf->len + 4, NULL); + osMutexRelease(uart_mutex); + osPoolFree(rpc_buffer_pool, obuf); + if (ret != HAL_OK) + Error_Handler(); +} +osThreadDef(dispatch_thread, osPriorityNormal, DEFAULT_STACK_SIZE); + +/* Semaphore to inform the main thread that there's a new RPC request. + */ +osSemaphoreId rpc_sem; +osSemaphoreDef(rpc_sem); + +static uint8_t c; /* current character received from UART */ +static rpc_buffer_t *ibuf; /* current RPC input buffer */ + +/* Callback for HAL_UART_Receive_IT(). + */ +void HAL_UART2_RxCpltCallback(UART_HandleTypeDef *huart) +{ + int complete; + hal_slip_recv_char(ibuf->buf, &ibuf->len, sizeof(ibuf->buf), &complete); + if (complete) + osSemaphoreRelease(rpc_sem); + + HAL_UART_Receive_IT(huart, &c, 1); +} + +hal_error_t hal_serial_send_char(uint8_t c) +{ + return (uart_send_char(c) == 0) ? HAL_OK : HAL_ERROR_RPC_TRANSPORT; +} + +hal_error_t hal_serial_recv_char(uint8_t *cp) +{ + /* return the character from HAL_UART_Receive_IT */ + *cp = c; + return HAL_OK; +} + +/* The main thread. After the system setup, it waits for the RPC-request + * semaphore from HAL_UART_RxCpltCallback, and spawns a dispatch thread. + */ +int main() +{ + stm_init(); + +#ifdef TARGET_CRYPTECH_DEV_BRIDGE + /* Wait six seconds to not upset the Novena at boot. */ + led_on(LED_BLUE); + for (int i = 0; i < 12; i++) { + osDelay(500); + led_toggle(LED_BLUE); + } + led_off(LED_BLUE); +#endif + led_on(LED_GREEN); + /* Prepare FMC interface. */ + fmc_init(); + + /* Haaaack. probe_cores() calls malloc(), which works from the main + * thread, but not from a spawned thread. It would be better to + * rewrite it to use static memory, but for now, just force it to + * probe early. + */ + hal_core_iterate(NULL); + + rpc_buffer_pool = osPoolCreate(osPool(rpc_buffer_pool)); + uart_mutex = osMutexCreate(osMutex(uart_mutex)); + rpc_sem = osSemaphoreCreate(osSemaphore(rpc_sem), 0); + +#ifdef TARGET_CRYPTECH_ALPHA + /* Launch other threads: + * - admin thread on USART1 + * - csprng warm-up thread? + */ +#endif + + if (hal_rpc_server_init() != HAL_OK) + Error_Handler(); + + ibuf = rpc_buffer_alloc(); + if (ibuf == NULL) + /* Something is badly wrong. */ + Error_Handler(); + + /* Start the non-blocking receive */ + HAL_UART_Receive_IT(&huart_user, &c, 1); + + while (1) { + osSemaphoreWait(rpc_sem, osWaitForever); + if (osThreadCreate(osThread(dispatch_thread), (void *)ibuf) == NULL) + Error_Handler(); + while ((ibuf = rpc_buffer_alloc()) == NULL); + /* XXX There's a potential race condition, where another request + * could write into the old ibuf, or into the null pointer if + * we're out of ibufs. + */ + } +} diff --git a/projects/hsm/main.c b/projects/hsm/main.c deleted file mode 100644 index 79c567b..0000000 --- a/projects/hsm/main.c +++ /dev/null @@ -1,226 +0,0 @@ -/* - * rpc_server.c - * ------------ - * Remote procedure call server-side private API implementation. - * - * Copyright (c) 2016, NORDUnet A/S All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * - Neither the name of the NORDUnet nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS - * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * This is the main RPC server moddule. It creates a new thread to deal - * with each request, to prevent a long-running request (e.g. RSA keygen) - * from blocking independent requests from other clients. This has a - * number of consequences. We can't do a blocking receive in the main - * thread, because that prevents the dispatch thread from transmitting the - * response (because they both want to lock the UART - see - * stm32f4xx_hal_uart.c). So we have to do a non-blocking receive with a - * callback routine. But we can't create a thread from the callback - * routine, because it's in the context of an ISR, so we raise a semaphore - * for the main thread to create the dispatch thread. - */ - -#include - -#include "cmsis_os.h" - -#include "stm-init.h" -#include "stm-led.h" -#include "stm-fmc.h" -#include "stm-uart.h" - -/* stm32f4xx_hal_def.h and hal.h both define HAL_OK as an enum value */ -#define HAL_OK HAL_OKAY - -#include "hal.h" -#include "hal_internal.h" -#include "slip_internal.h" -#include "xdr_internal.h" - -/* RPC buffers. For each active RPC, there will be two - input and output. - */ - -#ifndef NUM_RPC_BUFFER -/* An arbitrary number, but we don't expect to have more than 8 concurrent - * RPC requests. - */ -#define NUM_RPC_BUFFER 16 -#endif - -#ifndef MAX_PKT_SIZE -/* Another arbitrary number, more or less driven by the 4096-bit RSA - * keygen test. - */ -#define MAX_PKT_SIZE 4096 -#endif - -/* The thread entry point takes a single void* argument, so we bundle the - * packet buffer and length arguments together. - */ -typedef struct { - size_t len; - uint8_t buf[MAX_PKT_SIZE]; -} rpc_buffer_t; - -osPoolDef(rpc_buffer_pool, NUM_RPC_BUFFER, rpc_buffer_t); -osPoolId rpc_buffer_pool; - -static rpc_buffer_t *rpc_buffer_alloc(void) -{ - return (rpc_buffer_t *)osPoolCAlloc(rpc_buffer_pool); -} - -/* A mutex to arbitrate concurrent UART transmits, from RPC responses. - */ -osMutexId uart_mutex; -osMutexDef(uart_mutex); - -/* Thread entry point for the RPC request handler. - */ -static void dispatch_thread(void const *args) -{ - rpc_buffer_t *ibuf = (rpc_buffer_t *)args; - rpc_buffer_t *obuf = rpc_buffer_alloc(); - if (obuf == NULL) { - uint8_t buf[8]; - uint8_t * bufptr = &buf[4]; - const uint8_t * const limit = buf + sizeof(buf); - memcpy(buf, ibuf->buf, 4); - hal_xdr_encode_int(&bufptr, limit, HAL_ERROR_ALLOCATION_FAILURE); - osMutexWait(uart_mutex, osWaitForever); - hal_rpc_sendto(ibuf->buf, sizeof(buf), NULL); - osMutexRelease(uart_mutex); - osPoolFree(rpc_buffer_pool, ibuf); - Error_Handler(); - } - /* copy client ID from request to response */ - memcpy(obuf->buf, ibuf->buf, 4); - obuf->len = sizeof(obuf->buf) - 4; - hal_rpc_server_dispatch(ibuf->buf + 4, ibuf->len - 4, obuf->buf + 4, &obuf->len); - osPoolFree(rpc_buffer_pool, ibuf); - osMutexWait(uart_mutex, osWaitForever); - hal_error_t ret = hal_rpc_sendto(obuf->buf, obuf->len + 4, NULL); - osMutexRelease(uart_mutex); - osPoolFree(rpc_buffer_pool, obuf); - if (ret != HAL_OK) - Error_Handler(); -} -osThreadDef(dispatch_thread, osPriorityNormal, DEFAULT_STACK_SIZE); - -/* Semaphore to inform the main thread that there's a new RPC request. - */ -osSemaphoreId rpc_sem; -osSemaphoreDef(rpc_sem); - -static uint8_t c; /* current character received from UART */ -static rpc_buffer_t *ibuf; /* current RPC input buffer */ - -/* Callback for HAL_UART_Receive_IT(). - */ -void HAL_UART2_RxCpltCallback(UART_HandleTypeDef *huart) -{ - int complete; - hal_slip_recv_char(ibuf->buf, &ibuf->len, sizeof(ibuf->buf), &complete); - if (complete) - osSemaphoreRelease(rpc_sem); - - HAL_UART_Receive_IT(huart, &c, 1); -} - -hal_error_t hal_serial_send_char(uint8_t c) -{ - return (uart_send_char(c) == 0) ? HAL_OK : HAL_ERROR_RPC_TRANSPORT; -} - -hal_error_t hal_serial_recv_char(uint8_t *cp) -{ - /* return the character from HAL_UART_Receive_IT */ - *cp = c; - return HAL_OK; -} - -/* The main thread. After the system setup, it waits for the RPC-request - * semaphore from HAL_UART_RxCpltCallback, and spawns a dispatch thread. - */ -int main() -{ - stm_init(); - -#ifdef TARGET_CRYPTECH_DEV_BRIDGE - /* Wait six seconds to not upset the Novena at boot. */ - led_on(LED_BLUE); - for (int i = 0; i < 12; i++) { - osDelay(500); - led_toggle(LED_BLUE); - } - led_off(LED_BLUE); -#endif - led_on(LED_GREEN); - /* Prepare FMC interface. */ - fmc_init(); - - /* Haaaack. probe_cores() calls malloc(), which works from the main - * thread, but not from a spawned thread. It would be better to - * rewrite it to use static memory, but for now, just force it to - * probe early. - */ - hal_core_iterate(NULL); - - rpc_buffer_pool = osPoolCreate(osPool(rpc_buffer_pool)); - uart_mutex = osMutexCreate(osMutex(uart_mutex)); - rpc_sem = osSemaphoreCreate(osSemaphore(rpc_sem), 0); - -#ifdef TARGET_CRYPTECH_ALPHA - /* Launch other threads: - * - admin thread on USART1 - * - csprng warm-up thread? - */ -#endif - - if (hal_rpc_server_init() != HAL_OK) - Error_Handler(); - - ibuf = rpc_buffer_alloc(); - if (ibuf == NULL) - /* Something is badly wrong. */ - Error_Handler(); - - /* Start the non-blocking receive */ - HAL_UART_Receive_IT(&huart_user, &c, 1); - - while (1) { - osSemaphoreWait(rpc_sem, osWaitForever); - if (osThreadCreate(osThread(dispatch_thread), (void *)ibuf) == NULL) - Error_Handler(); - while ((ibuf = rpc_buffer_alloc()) == NULL); - /* XXX There's a potential race condition, where another request - * could write into the old ibuf, or into the null pointer if - * we're out of ibufs. - */ - } -} -- cgit v1.2.3 From 2a14d36ebd7bde9a3a6c98871050b14b54598389 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Thu, 9 Jun 2016 18:53:31 -0400 Subject: Put thread stack buffers in SDRAM, because pkey uses a lot of stack. Also rearchitect the way we handle RPC requests - have a bunch of waiting dispatch threads rather than continually creating and deleting threads. --- .../TOOLCHAIN_GCC_ARM/STM32F429BI.ld | 52 +++++++- .../TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c | 1 + projects/hsm/hsm.c | 138 ++++++++++++--------- 3 files changed, 125 insertions(+), 66 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld index ad7ddaf..2f80bce 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld @@ -10,9 +10,11 @@ MEMORY BOOTLOADER (rx) : ORIGIN = 0x08000000, LENGTH = 128K FIRMWARE (rx) : ORIGIN = 0x08000000 + 128K, LENGTH = 2048K - 128K FLASH (rx) : ORIGIN = 0x08000000 + 128K, LENGTH = 2048K - 128K - RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192K - 4 + CCMRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192K - 4 + SDRAM1 (rwx) : ORIGIN = 0xC0000000, LENGTH = 64M + SDRAM2 (rwx) : ORIGIN = 0xD0000000, LENGTH = 64M } -/* original: FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K */ /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. @@ -86,7 +88,7 @@ SECTIONS __etext = .; _sidata = .; - .data : AT (__etext) + .data : { __data_start__ = .; _sdata = .; @@ -120,7 +122,49 @@ SECTIONS __data_end__ = .; _edata = .; - } > RAM + } > RAM AT> FLASH + + /* If initialized variables are placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; + } >CCMRAM AT> FLASH + + /* If initialized variables are placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .sdram1 : + { + . = ALIGN(4); + _ssdram1 = .; + *(.sdram1) + *(.sdram1*) + + . = ALIGN(4); + _esdram1 = .; + } >SDRAM1 AT> FLASH + + /* If initialized variables are placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .sdram2 : + { + . = ALIGN(4); + _ssdram2 = .; + *(.sdram2) + *(.sdram2*) + + . = ALIGN(4); + _esdram2 = .; + } >SDRAM2 AT> FLASH .bss : { diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c index fbd0adf..7eeb6df 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c @@ -190,6 +190,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) hdma->Init.PeriphBurst = DMA_PBURST_SINGLE; */ if (HAL_DMA_Init(hdma) != HAL_OK) { + extern void mbed_die(void); mbed_die(); } } diff --git a/projects/hsm/hsm.c b/projects/hsm/hsm.c index 79c567b..e3c1c36 100644 --- a/projects/hsm/hsm.c +++ b/projects/hsm/hsm.c @@ -53,6 +53,7 @@ #include "stm-led.h" #include "stm-fmc.h" #include "stm-uart.h" +#include "stm-sdram.h" /* stm32f4xx_hal_def.h and hal.h both define HAL_OK as an enum value */ #define HAL_OK HAL_OKAY @@ -65,13 +66,24 @@ /* RPC buffers. For each active RPC, there will be two - input and output. */ -#ifndef NUM_RPC_BUFFER +#ifndef NUM_RPC_TASK /* An arbitrary number, but we don't expect to have more than 8 concurrent * RPC requests. */ -#define NUM_RPC_BUFFER 16 +#define NUM_RPC_TASK 8 #endif +#ifndef TASK_STACK_SIZE +/* Define an absurdly large task stack, because some pkey operation use a + * lot of stack variables. + */ +#define TASK_STACK_SIZE 64*1024 +#endif + +/* Put the task stack buffers in SDRAM, because ARM RAM is too small. + */ +__attribute__((section(".sdram1"))) uint8_t stack[NUM_RPC_TASK][TASK_STACK_SIZE]; + #ifndef MAX_PKT_SIZE /* Another arbitrary number, more or less driven by the 4096-bit RSA * keygen test. @@ -87,65 +99,30 @@ typedef struct { uint8_t buf[MAX_PKT_SIZE]; } rpc_buffer_t; -osPoolDef(rpc_buffer_pool, NUM_RPC_BUFFER, rpc_buffer_t); -osPoolId rpc_buffer_pool; - -static rpc_buffer_t *rpc_buffer_alloc(void) -{ - return (rpc_buffer_t *)osPoolCAlloc(rpc_buffer_pool); -} - /* A mutex to arbitrate concurrent UART transmits, from RPC responses. */ osMutexId uart_mutex; osMutexDef(uart_mutex); -/* Thread entry point for the RPC request handler. +/* A mutex so only one dispatch thread can receive requests. */ -static void dispatch_thread(void const *args) -{ - rpc_buffer_t *ibuf = (rpc_buffer_t *)args; - rpc_buffer_t *obuf = rpc_buffer_alloc(); - if (obuf == NULL) { - uint8_t buf[8]; - uint8_t * bufptr = &buf[4]; - const uint8_t * const limit = buf + sizeof(buf); - memcpy(buf, ibuf->buf, 4); - hal_xdr_encode_int(&bufptr, limit, HAL_ERROR_ALLOCATION_FAILURE); - osMutexWait(uart_mutex, osWaitForever); - hal_rpc_sendto(ibuf->buf, sizeof(buf), NULL); - osMutexRelease(uart_mutex); - osPoolFree(rpc_buffer_pool, ibuf); - Error_Handler(); - } - /* copy client ID from request to response */ - memcpy(obuf->buf, ibuf->buf, 4); - obuf->len = sizeof(obuf->buf) - 4; - hal_rpc_server_dispatch(ibuf->buf + 4, ibuf->len - 4, obuf->buf + 4, &obuf->len); - osPoolFree(rpc_buffer_pool, ibuf); - osMutexWait(uart_mutex, osWaitForever); - hal_error_t ret = hal_rpc_sendto(obuf->buf, obuf->len + 4, NULL); - osMutexRelease(uart_mutex); - osPoolFree(rpc_buffer_pool, obuf); - if (ret != HAL_OK) - Error_Handler(); -} -osThreadDef(dispatch_thread, osPriorityNormal, DEFAULT_STACK_SIZE); +osMutexId dispatch_mutex; +osMutexDef(dispatch_mutex); -/* Semaphore to inform the main thread that there's a new RPC request. +/* Semaphore to inform the dispatch thread that there's a new RPC request. */ -osSemaphoreId rpc_sem; +osSemaphoreId rpc_sem; osSemaphoreDef(rpc_sem); -static uint8_t c; /* current character received from UART */ -static rpc_buffer_t *ibuf; /* current RPC input buffer */ +static uint8_t c; /* current character received from UART */ +static rpc_buffer_t * volatile rbuf; /* current RPC input buffer */ /* Callback for HAL_UART_Receive_IT(). */ void HAL_UART2_RxCpltCallback(UART_HandleTypeDef *huart) { int complete; - hal_slip_recv_char(ibuf->buf, &ibuf->len, sizeof(ibuf->buf), &complete); + hal_slip_recv_char(rbuf->buf, &rbuf->len, sizeof(rbuf->buf), &complete); if (complete) osSemaphoreRelease(rpc_sem); @@ -164,8 +141,47 @@ hal_error_t hal_serial_recv_char(uint8_t *cp) return HAL_OK; } -/* The main thread. After the system setup, it waits for the RPC-request - * semaphore from HAL_UART_RxCpltCallback, and spawns a dispatch thread. +/* Thread entry point for the RPC request handler. + */ +static void dispatch_thread(void const *args) +{ + rpc_buffer_t ibuf, obuf; + + while (1) { + memset(&ibuf, 0, sizeof(ibuf)); + memset(&obuf, 0, sizeof(obuf)); + + /* Wait for access to the uart */ + osMutexWait(dispatch_mutex, osWaitForever); + + /* Wait for the complete rpc request */ + rbuf = &ibuf; + osSemaphoreWait(rpc_sem, osWaitForever); + + /* Let the next thread handle the next request */ + osMutexRelease(dispatch_mutex); + /* Let the next thread take the mutex */ + osThreadYield(); + + /* Copy client ID from request to response */ + memcpy(obuf.buf, ibuf.buf, 4); + obuf.len = sizeof(obuf.buf) - 4; + + /* Process the request */ + hal_rpc_server_dispatch(ibuf.buf + 4, ibuf.len - 4, obuf.buf + 4, &obuf.len); + + /* Send the response */ + osMutexWait(uart_mutex, osWaitForever); + hal_error_t ret = hal_rpc_sendto(obuf.buf, obuf.len + 4, NULL); + osMutexRelease(uart_mutex); + if (ret != HAL_OK) + Error_Handler(); + } +} +osThreadDef_t thread_def[NUM_RPC_TASK]; + +/* The main thread. This does all the setup, and the worker threads handle + * the rest. */ int main() { @@ -183,6 +199,7 @@ int main() led_on(LED_GREEN); /* Prepare FMC interface. */ fmc_init(); + sdram_init(); /* Haaaack. probe_cores() calls malloc(), which works from the main * thread, but not from a spawned thread. It would be better to @@ -191,8 +208,8 @@ int main() */ hal_core_iterate(NULL); - rpc_buffer_pool = osPoolCreate(osPool(rpc_buffer_pool)); uart_mutex = osMutexCreate(osMutex(uart_mutex)); + dispatch_mutex = osMutexCreate(osMutex(dispatch_mutex)); rpc_sem = osSemaphoreCreate(osSemaphore(rpc_sem), 0); #ifdef TARGET_CRYPTECH_ALPHA @@ -205,22 +222,19 @@ int main() if (hal_rpc_server_init() != HAL_OK) Error_Handler(); - ibuf = rpc_buffer_alloc(); - if (ibuf == NULL) - /* Something is badly wrong. */ - Error_Handler(); + /* Create the rpc dispatch threads */ + for (int i = 0; i < NUM_RPC_TASK; ++i) { + osThreadDef_t *ot = &thread_def[i]; + ot->pthread = dispatch_thread; + ot->tpriority = osPriorityNormal; + ot->stacksize = TASK_STACK_SIZE; + ot->stack_pointer = (uint32_t *)stack[i]; + if (osThreadCreate(ot, (void *)i) == NULL) + Error_Handler(); + } /* Start the non-blocking receive */ HAL_UART_Receive_IT(&huart_user, &c, 1); - while (1) { - osSemaphoreWait(rpc_sem, osWaitForever); - if (osThreadCreate(osThread(dispatch_thread), (void *)ibuf) == NULL) - Error_Handler(); - while ((ibuf = rpc_buffer_alloc()) == NULL); - /* XXX There's a potential race condition, where another request - * could write into the old ibuf, or into the null pointer if - * we're out of ibufs. - */ - } + while (1) { ; } } -- cgit v1.2.3 From f76f5e172fc7c177b042df64d6aa040d2864cef3 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Mon, 13 Jun 2016 14:50:28 -0400 Subject: Use a delay loop, so sdram can be initialized from the startup code, before the clock is running. --- stm-sdram.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/stm-sdram.c b/stm-sdram.c index 0ec8065..52bab98 100644 --- a/stm-sdram.c +++ b/stm-sdram.c @@ -51,7 +51,7 @@ HAL_StatusTypeDef sdram_init(void) static int initialized = 0; if (initialized) { - return; + return HAL_OK; } initialized = 1; @@ -184,6 +184,8 @@ HAL_StatusTypeDef _sdram_init_params(SDRAM_HandleTypeDef *sdram1, SDRAM_HandleTy HAL_StatusTypeDef ok; // status FMC_SDRAM_CommandTypeDef cmd; // command +#define HAL_Delay(n) for (int i = 0; i < 1000 * n; ++i) + /* * enable clocking */ -- cgit v1.2.3 From db67f40e5002c78b3efd155d2ebd3b1b7b5d95e5 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Mon, 13 Jun 2016 14:52:04 -0400 Subject: Hide sdram initialization functions and defines. --- stm-sdram.c | 29 +++++++++++++++++++++++------ stm-sdram.h | 17 ----------------- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/stm-sdram.c b/stm-sdram.c index 52bab98..8648d47 100644 --- a/stm-sdram.c +++ b/stm-sdram.c @@ -37,12 +37,29 @@ #include "stm-fmc.h" #include "stm-led.h" +/* Mode Register Bits */ +#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000) +#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001) +#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002) +#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004) + +#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000) +#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008) + +#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020) +#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030) + +#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000) + +#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) +#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200) + SDRAM_HandleTypeDef hsdram1; SDRAM_HandleTypeDef hsdram2; -void _sdram_init_gpio(void); -HAL_StatusTypeDef _sdram_init_fmc(void); -HAL_StatusTypeDef _sdram_init_params(SDRAM_HandleTypeDef *sdram1, SDRAM_HandleTypeDef *sdram2); +static void _sdram_init_gpio(void); +static HAL_StatusTypeDef _sdram_init_fmc(void); +static HAL_StatusTypeDef _sdram_init_params(SDRAM_HandleTypeDef *sdram1, SDRAM_HandleTypeDef *sdram2); HAL_StatusTypeDef sdram_init(void) @@ -74,7 +91,7 @@ HAL_StatusTypeDef sdram_init(void) return HAL_OK; } -void _sdram_init_gpio(void) +static void _sdram_init_gpio(void) { GPIO_InitTypeDef GPIO_InitStruct; @@ -90,7 +107,7 @@ void _sdram_init_gpio(void) fmc_af_gpio(GPIOI, GPIO_PIN_4 | GPIO_PIN_5); } -HAL_StatusTypeDef _sdram_init_fmc() +static HAL_StatusTypeDef _sdram_init_fmc() { HAL_StatusTypeDef status; FMC_SDRAM_TimingTypeDef SdramTiming; @@ -179,7 +196,7 @@ HAL_StatusTypeDef _sdram_init_fmc() return HAL_SDRAM_Init(&hsdram2, &SdramTiming); } -HAL_StatusTypeDef _sdram_init_params(SDRAM_HandleTypeDef *sdram1, SDRAM_HandleTypeDef *sdram2) +static HAL_StatusTypeDef _sdram_init_params(SDRAM_HandleTypeDef *sdram1, SDRAM_HandleTypeDef *sdram2) { HAL_StatusTypeDef ok; // status FMC_SDRAM_CommandTypeDef cmd; // command diff --git a/stm-sdram.h b/stm-sdram.h index 8f58b34..8307ed3 100644 --- a/stm-sdram.h +++ b/stm-sdram.h @@ -41,23 +41,6 @@ /* Memory Size, 64 MBytes (512 Mbits) */ #define SDRAM_SIZE 0x4000000 -/* Mode Register Bits */ -#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000) -#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001) -#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002) -#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004) - -#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000) -#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008) - -#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020) -#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030) - -#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000) - -#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) -#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200) - extern SDRAM_HandleTypeDef hsdram1; extern SDRAM_HandleTypeDef hsdram2; -- cgit v1.2.3 From 6d51768a00ffcc013134056098e1480420da9eb7 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Mon, 13 Jun 2016 15:05:50 -0400 Subject: SDRAM is for uninitialized data only. We don't plan to put initialized data in SDRAM, and we don't have startup code to copy initialized data, so don't even bother. Further, the linker will reserve space in FLASH, even for uninitialized data, so just don't. --- .../TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld index 2f80bce..cc6dc4d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld @@ -138,9 +138,6 @@ SECTIONS _eccmram = .; } >CCMRAM AT> FLASH - /* If initialized variables are placed in this section, - * the startup code needs to be modified to copy the init-values. - */ .sdram1 : { . = ALIGN(4); @@ -150,11 +147,8 @@ SECTIONS . = ALIGN(4); _esdram1 = .; - } >SDRAM1 AT> FLASH + } >SDRAM1 - /* If initialized variables are placed in this section, - * the startup code needs to be modified to copy the init-values. - */ .sdram2 : { . = ALIGN(4); @@ -164,7 +158,7 @@ SECTIONS . = ALIGN(4); _esdram2 = .; - } >SDRAM2 AT> FLASH + } >SDRAM2 .bss : { -- cgit v1.2.3 From 1cb09aab17066f72c6f439e23741bcd23c8408de Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Mon, 13 Jun 2016 15:08:14 -0400 Subject: Add __end symbols for CCMRAM and SDRAM sections. This lets us, say, use these sections for stack or heap. --- .../TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld index cc6dc4d..29ddfcf 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld @@ -138,6 +138,8 @@ SECTIONS _eccmram = .; } >CCMRAM AT> FLASH + __end_ccmram = ORIGIN(CCMRAM) + LENGTH(CCMRAM); + .sdram1 : { . = ALIGN(4); @@ -149,6 +151,8 @@ SECTIONS _esdram1 = .; } >SDRAM1 + __end_sdram1 = ORIGIN(SDRAM1) + LENGTH(SDRAM1); + .sdram2 : { . = ALIGN(4); @@ -160,6 +164,8 @@ SECTIONS _esdram2 = .; } >SDRAM2 + __end_sdram2 = ORIGIN(SDRAM2) + LENGTH(SDRAM2); + .bss : { . = ALIGN(4); -- cgit v1.2.3 From a5850b450733141f320a817c523b85dff49f52eb Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Mon, 13 Jun 2016 15:49:09 -0400 Subject: Only the HSM project needs the RTOS; most of the test projects can use the STM32 HAL code directly. --- Makefile | 24 +- .../TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S | 9 +- .../TOOLCHAIN_GCC_ARM/startup_stm32f429xx_rtos.S | 566 +++++++++++++++++++++ .../TARGET_CRYPTECH_ALPHA/stm32f4xx_it.c | 6 +- .../TARGET_CRYPTECH_ALPHA/stm32f4xx_it_rtos.c | 233 +++++++++ projects/bootloader/Makefile | 4 +- projects/bootloader/stm32f4xx_it.c | 220 -------- projects/cli-test/Makefile | 20 +- projects/hsm/Makefile | 21 +- projects/rtos-test/Makefile | 4 + stm-init.h | 3 - 11 files changed, 860 insertions(+), 250 deletions(-) create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/startup_stm32f429xx_rtos.S create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it_rtos.c delete mode 100644 projects/bootloader/stm32f4xx_it.c diff --git a/Makefile b/Makefile index b96ea64..51461c1 100644 --- a/Makefile +++ b/Makefile @@ -32,6 +32,7 @@ export TOPLEVEL = $(shell pwd) # define board: dev-bridge or alpha BOARD = TARGET_CRYPTECH_ALPHA +#BOARD = TARGET_CRYPTECH_DEV_BRIDGE # Location of the Libraries folder from the STM32F4 Standard Peripheral Library export LIBS_DIR = $(TOPLEVEL)/libraries @@ -43,7 +44,7 @@ export LIBTFM_DIR = $(LIBS_DIR)/thirdparty/libtfm export LIBHAL_DIR = $(LIBS_DIR)/libhal export LIBCLI_DIR = $(LIBS_DIR)/libcli -export LIBS = $(MBED_DIR)/libstmf4.a $(RTOS_DIR)/librtos.a +export LIBS = $(MBED_DIR)/libstmf4.a # linker script export LDSCRIPT = $(BOARD_DIR)/TOOLCHAIN_GCC_ARM/STM32F429BI.ld @@ -87,15 +88,14 @@ CFLAGS += -DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F429xx CFLAGS += -D__CORTEX_M4 -DTARGET_STM -DTARGET_STM32F4 -DTARGET_STM32F429ZI -DTOOLCHAIN_GCC -D__FPU_PRESENT=1 -D$(BOARD) CFLAGS += -ffunction-sections -fdata-sections -Wl,--gc-sections CFLAGS += -std=c99 -CFLAGS += -I $(TOPLEVEL) -CFLAGS += -I $(MBED_DIR)/api -CFLAGS += -I $(MBED_DIR)/rtos/rtos -CFLAGS += -I $(MBED_DIR)/rtos/rtx/TARGET_CORTEX_M -CFLAGS += -I $(MBED_DIR)/targets/cmsis -CFLAGS += -I $(MBED_DIR)/targets/cmsis/TARGET_STM/TARGET_STM32F4 -CFLAGS += -I $(MBED_DIR)/targets/cmsis/TARGET_STM/TARGET_STM32F4/$(BOARD) -CFLAGS += -I $(MBED_DIR)/targets/hal/TARGET_STM/TARGET_STM32F4 -CFLAGS += -I $(MBED_DIR)/targets/hal/TARGET_STM/TARGET_STM32F4/$(BOARD) +CFLAGS += -I$(TOPLEVEL) +CFLAGS += -I$(MBED_DIR)/api +CFLAGS += -I$(MBED_DIR)/targets/cmsis +CFLAGS += -I$(MBED_DIR)/targets/cmsis/TARGET_STM/TARGET_STM32F4 +CFLAGS += -I$(MBED_DIR)/targets/cmsis/TARGET_STM/TARGET_STM32F4/$(BOARD) +CFLAGS += -I$(MBED_DIR)/targets/hal/TARGET_STM/TARGET_STM32F4 +CFLAGS += -I$(MBED_DIR)/targets/hal/TARGET_STM/TARGET_STM32F4/$(BOARD) +CFLAGS += -DHAL_RSA_USE_MODEXP=0 export CFLAGS %.o : %.c @@ -121,7 +121,7 @@ cli-test: $(BOARD_OBJS) $(LIBS) $(LIBCLI_DIR)/libcli.a $(RTOS_DIR)/librtos.a: $(MAKE) -C $(RTOS_DIR) -rtos-test: $(RTOS_OBJS) $(LIBS) +rtos-test: $(RTOS_OBJS) $(LIBS) $(RTOS_DIR)/librtos.a $(MAKE) -C projects/rtos-test $(LIBTFM_DIR)/libtfm.a: @@ -136,7 +136,7 @@ $(LIBCLI_DIR)/libcli.a: libhal-test: $(BOARD_OBJS) $(LIBS) $(LIBHAL_DIR)/libhal.a $(MAKE) -C projects/libhal-test -hsm: $(BOARD_OBJS) $(LIBS) $(LIBHAL_DIR)/libhal.a +hsm: $(BOARD_OBJS) $(LIBS) $(LIBHAL_DIR)/libhal.a $(RTOS_DIR)/librtos.a $(MAKE) -C projects/hsm bootloader: $(BOARD_OBJS) $(LIBS) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S index c431df8..7b4f6ff 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S @@ -110,14 +110,9 @@ LoopFillZerobss: /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ - //bl __libc_init_array + bl __libc_init_array /* Call the application's entry point.*/ - //bl main - // Calling the crt0 'cold-start' entry point. There __libc_init_array is called - // and when existing hardware_init_hook() and software_init_hook() before - // starting main(). software_init_hook() is available and has to be called due - // to initializsation when using rtos. - bl _start + bl main bx lr .size Reset_Handler, .-Reset_Handler diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/startup_stm32f429xx_rtos.S b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/startup_stm32f429xx_rtos.S new file mode 100644 index 0000000..c431df8 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/startup_stm32f429xx_rtos.S @@ -0,0 +1,566 @@ +/** + ****************************************************************************** + * @file startup_stm32f429xx.s + * @author MCD Application Team + * @version V2.3.0 + * @date 02-March-2015 + * @brief STM32F429xx Devices vector table for Atollic TrueSTUDIO toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2015 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + //bl __libc_init_array +/* Call the application's entry point.*/ + //bl main + // Calling the crt0 'cold-start' entry point. There __libc_init_array is called + // and when existing hardware_init_hook() and software_init_hook() before + // starting main(). software_init_hook() is available and has to be called due + // to initializsation when using rtos. + bl _start + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FMC_IRQHandler /* FMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word 0 /* Reserved */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + .word UART7_IRQHandler /* UART7 */ + .word UART8_IRQHandler /* UART8 */ + .word SPI4_IRQHandler /* SPI4 */ + .word SPI5_IRQHandler /* SPI5 */ + .word SPI6_IRQHandler /* SPI6 */ + .word SAI1_IRQHandler /* SAI1 */ + .word LTDC_IRQHandler /* LTDC_IRQHandler */ + .word LTDC_ER_IRQHandler /* LTDC_ER_IRQHandler */ + .word DMA2D_IRQHandler /* DMA2D */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak UART7_IRQHandler + .thumb_set UART7_IRQHandler,Default_Handler + + .weak UART8_IRQHandler + .thumb_set UART8_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SPI5_IRQHandler + .thumb_set SPI5_IRQHandler,Default_Handler + + .weak SPI6_IRQHandler + .thumb_set SPI6_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak LTDC_IRQHandler + .thumb_set LTDC_IRQHandler,Default_Handler + + .weak LTDC_ER_IRQHandler + .thumb_set LTDC_ER_IRQHandler,Default_Handler + + .weak DMA2D_IRQHandler + .thumb_set DMA2D_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + + + diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it.c index 7c30228..7b8e97f 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it.c @@ -65,6 +65,10 @@ void NMI_Handler(void) */ void HardFault_Handler(void) { +#ifdef HAL_GPIO_MODULE_ENABLED + //HAL_GPIO_WritePin(LED_PORT, LED_RED, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOK, GPIO_PIN_7, GPIO_PIN_SET); +#endif /* Go to infinite loop when Hard Fault exception occurs */ while (1) { ; } } @@ -103,7 +107,6 @@ void UsageFault_Handler(void) } -#if 0 /* already defined in libraries/mbed/rtos/ */ /** * @brief This function handles SVCall exception. * @param None @@ -140,7 +143,6 @@ void SysTick_Handler(void) { HAL_IncTick(); } -#endif /******************************************************************************/ /* STM32F4xx Peripherals Interrupt Handlers */ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it_rtos.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it_rtos.c new file mode 100644 index 0000000..1118db2 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it_rtos.c @@ -0,0 +1,233 @@ +/** +****************************************************************************** +* @file GPIO/GPIO_IOToggle/Src/stm32f4xx_it.c +* @author MCD Application Team +* @version V1.0.1 +* @date 26-February-2014 +* @brief Main Interrupt Service Routines. +* This file provides template for all exceptions handler and +* peripherals interrupt service routine. +****************************************************************************** +* @attention +* +*

© COPYRIGHT(c) 2014 STMicroelectronics

+* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* 3. Neither the name of STMicroelectronics nor the names of its contributors +* may be used to endorse or promote products derived from this software +* without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +*/ + +#include "cmsis_os.h" + +#include "stm-init.h" +#include "stm-uart.h" + +/******************************************************************************/ +/* Cortex-M4 Processor Exceptions Handlers */ +/******************************************************************************/ + +/* + * We define these to make debugging easier, because otherwise gdb reports + * HardFault_Handler as WWDG_IRQHandler. + */ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +void HardFault_Handler(void) +{ +#ifdef HAL_GPIO_MODULE_ENABLED + //HAL_GPIO_WritePin(LED_PORT, LED_RED, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOK, GPIO_PIN_7, GPIO_PIN_SET); +#endif + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) { ; } +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) { ; } +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) { ; } +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) { ; } +} + + +#if 0 /* already defined in libraries/mbed/rtos/ */ +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief This function handles PendSVC exception. + * @param None + * @retval None + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} +#endif + +/******************************************************************************/ +/* STM32F4xx Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32f4xx.s). */ +/******************************************************************************/ + +/** +* @brief This function handles DMA1 stream5 global interrupt. +*/ +void DMA1_Stream5_IRQHandler(void) +{ + HAL_DMA_IRQHandler(&hdma_usart_user_rx); +} + +/** +* @brief This function handles DMA2 stream2 global interrupt. +*/ +void DMA2_Stream2_IRQHandler(void) +{ + HAL_DMA_IRQHandler(&hdma_usart_mgmt_rx); +} + +/** + * @brief This function handles UART interrupt request. + * @param None + * @retval None + * @Note HAL_UART_IRQHandler will call HAL_UART_RxCpltCallback in main.c. + */ +void USART1_IRQHandler(void) +{ + HAL_UART_IRQHandler(&huart_mgmt); +} + +/** + * @brief This function handles UART interrupt request. + * @param None + * @retval None + * @Note HAL_UART_IRQHandler will call HAL_UART_RxCpltCallback below. + */ +void USART2_IRQHandler(void) +{ + HAL_UART_IRQHandler(&huart_user); +} + +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) +{ + extern void HAL_UART1_RxCpltCallback(UART_HandleTypeDef *huart); + extern void HAL_UART2_RxCpltCallback(UART_HandleTypeDef *huart); + + if (huart->Instance == USART1) + HAL_UART1_RxCpltCallback(huart); + + else if (huart->Instance == USART2) + HAL_UART2_RxCpltCallback(huart); +} + +/** + * @brief Rx Transfer completed callbacks. + * @param huart: pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART module. + * @retval None + */ +__weak void HAL_UART1_RxCpltCallback(UART_HandleTypeDef *huart) +{ + /* NOTE: This function Should not be modified, when the callback is needed, + the HAL_UART_RxCpltCallback could be implemented in the user file + */ +} + +__weak void HAL_UART2_RxCpltCallback(UART_HandleTypeDef *huart) +{ + /* NOTE: This function Should not be modified, when the callback is needed, + the HAL_UART_TxCpltCallback could be implemented in the user file + */ +} + +void HAL_Delay(__IO uint32_t Delay) +{ + osDelay(Delay); +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/projects/bootloader/Makefile b/projects/bootloader/Makefile index fe75849..a63d29c 100644 --- a/projects/bootloader/Makefile +++ b/projects/bootloader/Makefile @@ -10,9 +10,7 @@ BOARD_OBJS = \ $(BOARD_DIR)/system_stm32f4xx.o \ $(BOARD_DIR)/stm32f4xx_hal_msp.o \ ./startup_stm32f429xx.o \ - ./stm32f4xx_it.o - -LIBS = $(MBED_DIR)/libstmf4.a + $(BOARD_DIR)/stm32f4xx_it.o all: $(PROG:=.elf) diff --git a/projects/bootloader/stm32f4xx_it.c b/projects/bootloader/stm32f4xx_it.c deleted file mode 100644 index 7aed16b..0000000 --- a/projects/bootloader/stm32f4xx_it.c +++ /dev/null @@ -1,220 +0,0 @@ -/** -****************************************************************************** -* @file GPIO/GPIO_IOToggle/Src/stm32f4xx_it.c -* @author MCD Application Team -* @version V1.0.1 -* @date 26-February-2014 -* @brief Main Interrupt Service Routines. -* This file provides template for all exceptions handler and -* peripherals interrupt service routine. -****************************************************************************** -* @attention -* -*

© COPYRIGHT(c) 2014 STMicroelectronics

-* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* 1. Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* 2. Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* 3. Neither the name of STMicroelectronics nor the names of its contributors -* may be used to endorse or promote products derived from this software -* without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE -* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -****************************************************************************** -*/ - -#include "stm-init.h" -#include "stm-uart.h" - -/******************************************************************************/ -/* Cortex-M4 Processor Exceptions Handlers */ -/******************************************************************************/ - -/* - * We define these to make debugging easier, because otherwise gdb reports - * HardFault_Handler as WWDG_IRQHandler. - */ - -/** - * @brief This function handles NMI exception. - * @param None - * @retval None - */ -void NMI_Handler(void) -{ -} - -/** - * @brief This function handles Hard Fault exception. - * @param None - * @retval None - */ -void HardFault_Handler(void) -{ - /* Go to infinite loop when Hard Fault exception occurs */ - while (1) { ; } -} - -/** - * @brief This function handles Memory Manage exception. - * @param None - * @retval None - */ -void MemManage_Handler(void) -{ - /* Go to infinite loop when Memory Manage exception occurs */ - while (1) { ; } -} - -/** - * @brief This function handles Bus Fault exception. - * @param None - * @retval None - */ -void BusFault_Handler(void) -{ - /* Go to infinite loop when Bus Fault exception occurs */ - while (1) { ; } -} - -/** - * @brief This function handles Usage Fault exception. - * @param None - * @retval None - */ -void UsageFault_Handler(void) -{ - /* Go to infinite loop when Usage Fault exception occurs */ - while (1) { ; } -} - - -/** - * @brief This function handles SVCall exception. - * @param None - * @retval None - */ -void SVC_Handler(void) -{ -} - -/** - * @brief This function handles Debug Monitor exception. - * @param None - * @retval None - */ -void DebugMon_Handler(void) -{ -} - -/** - * @brief This function handles PendSVC exception. - * @param None - * @retval None - */ -void PendSV_Handler(void) -{ -} - -/** - * @brief This function handles SysTick Handler. - * @param None - * @retval None - */ -void SysTick_Handler(void) -{ - HAL_IncTick(); -} - -/******************************************************************************/ -/* STM32F4xx Peripherals Interrupt Handlers */ -/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ -/* available peripheral interrupt handler's name please refer to the startup */ -/* file (startup_stm32f4xx.s). */ -/******************************************************************************/ - -/** -* @brief This function handles DMA1 stream5 global interrupt. -*/ -void DMA1_Stream5_IRQHandler(void) -{ - HAL_DMA_IRQHandler(&hdma_usart_user_rx); -} - -/** -* @brief This function handles DMA2 stream2 global interrupt. -*/ -void DMA2_Stream2_IRQHandler(void) -{ - HAL_DMA_IRQHandler(&hdma_usart_mgmt_rx); -} - -/** - * @brief This function handles UART interrupt request. - * @param None - * @retval None - * @Note HAL_UART_IRQHandler will call HAL_UART_RxCpltCallback in main.c. - */ -void USART1_IRQHandler(void) -{ - HAL_UART_IRQHandler(&huart_mgmt); -} - -/** - * @brief This function handles UART interrupt request. - * @param None - * @retval None - * @Note HAL_UART_IRQHandler will call HAL_UART_RxCpltCallback in main.c. - */ -void USART2_IRQHandler(void) -{ - HAL_UART_IRQHandler(&huart_user); -} - -void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) -{ - extern void HAL_UART1_RxCpltCallback(UART_HandleTypeDef *huart); - extern void HAL_UART2_RxCpltCallback(UART_HandleTypeDef *huart); - - if (huart->Instance == USART1) - HAL_UART1_RxCpltCallback(huart); - - else if (huart->Instance == USART2) - HAL_UART2_RxCpltCallback(huart); -} - -/** - * @brief Rx Transfer completed callbacks. - * @param huart: pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART1_RxCpltCallback(UART_HandleTypeDef *huart) -{ - /* NOTE: This function Should not be modified, when the callback is needed, - the HAL_UART_TxCpltCallback could be implemented in the user file - */ -} - -__weak void HAL_UART2_RxCpltCallback(UART_HandleTypeDef *huart) -{ - /* NOTE: This function Should not be modified, when the callback is needed, - the HAL_UART_TxCpltCallback could be implemented in the user file - */ -} - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/projects/cli-test/Makefile b/projects/cli-test/Makefile index acf2720..e043566 100644 --- a/projects/cli-test/Makefile +++ b/projects/cli-test/Makefile @@ -2,8 +2,26 @@ TEST = cli-test OBJS = crc32.o test_sdram.o mgmt-cli.o mgmt-dfu.c mgmt-fpga.c mgmt-misc.c mgmt-show.c mgmt-test.c +BOARD_OBJS = \ + $(TOPLEVEL)/stm-init.o \ + $(TOPLEVEL)/stm-fmc.o \ + $(TOPLEVEL)/stm-uart.o \ + $(TOPLEVEL)/syscalls.o \ + $(TOPLEVEL)/stm-rtc.o \ + $(TOPLEVEL)/spiflash_n25q128.o \ + $(TOPLEVEL)/stm-fpgacfg.o \ + $(TOPLEVEL)/stm-keystore.o \ + $(TOPLEVEL)/stm-sdram.o \ + $(TOPLEVEL)/stm-flash.o \ + $(BOARD_DIR)/TOOLCHAIN_GCC_ARM/startup_stm32f429xx_rtos.o \ + $(BOARD_DIR)/system_stm32f4xx.o \ + $(BOARD_DIR)/stm32f4xx_hal_msp.o \ + $(BOARD_DIR)/stm32f4xx_it_rtos.o + CFLAGS += -I$(LIBCLI_DIR) -LIBS += $(LIBCLI_DIR)/libcli.a +CFLAGS += -I$(RTOS_DIR)/rtos -I$(RTOS_DIR)/rtx/TARGET_CORTEX_M + +LIBS += $(LIBCLI_DIR)/libcli.a $(RTOS_DIR)/librtos.a all: $(TEST:=.elf) diff --git a/projects/hsm/Makefile b/projects/hsm/Makefile index d8fd1f9..1ee5323 100644 --- a/projects/hsm/Makefile +++ b/projects/hsm/Makefile @@ -3,9 +3,26 @@ PROJ = hsm # objs in addition to $(PROJ).o OBJS = -CFLAGS += -I $(LIBHAL_DIR) +BOARD_OBJS = \ + $(TOPLEVEL)/stm-init.o \ + $(TOPLEVEL)/stm-fmc.o \ + $(TOPLEVEL)/stm-uart.o \ + $(TOPLEVEL)/syscalls.o \ + $(TOPLEVEL)/stm-rtc.o \ + $(TOPLEVEL)/spiflash_n25q128.o \ + $(TOPLEVEL)/stm-fpgacfg.o \ + $(TOPLEVEL)/stm-keystore.o \ + $(TOPLEVEL)/stm-sdram.o \ + $(TOPLEVEL)/stm-flash.o \ + $(BOARD_DIR)/TOOLCHAIN_GCC_ARM/startup_stm32f429xx_rtos.o \ + $(BOARD_DIR)/system_stm32f4xx.o \ + $(BOARD_DIR)/stm32f4xx_hal_msp.o \ + $(BOARD_DIR)/stm32f4xx_it_rtos.o -LIBS += $(LIBHAL_DIR)/libhal.a $(LIBTFM_DIR)/libtfm.a +CFLAGS += -I$(LIBHAL_DIR) +CFLAGS += -I$(RTOS_DIR)/rtos -I$(RTOS_DIR)/rtx/TARGET_CORTEX_M + +LIBS += $(LIBHAL_DIR)/libhal.a $(LIBTFM_DIR)/libtfm.a $(RTOS_DIR)/librtos.a all: $(PROJ:=.elf) diff --git a/projects/rtos-test/Makefile b/projects/rtos-test/Makefile index dd2cab5..9e58a41 100644 --- a/projects/rtos-test/Makefile +++ b/projects/rtos-test/Makefile @@ -1,5 +1,9 @@ TEST = thread-test semaphore-test mutex-test +CFLAGS += -I$(RTOS_DIR)/rtos -I$(RTOS_DIR)/rtx/TARGET_CORTEX_M + +LIBS += $(RTOS_DIR)/librtos.a + all: $(TEST:=.elf) %.elf: %.o $(BOARD_OBJS) $(LIBS) diff --git a/stm-init.h b/stm-init.h index dd19311..252485d 100644 --- a/stm-init.h +++ b/stm-init.h @@ -35,7 +35,6 @@ #ifndef __STM_INIT_H #define __STM_INIT_H -#include "cmsis_os.h" #include "stm32f4xx_hal.h" /* Macros used to make GPIO pin setup (in stm-init.c) easier */ @@ -60,6 +59,4 @@ extern void stm_init(void); extern void Error_Handler(void); -#define HAL_Delay osDelay - #endif /* __STM_INIT_H */ -- cgit v1.2.3 From b7f9d44fe7a35c33bd6a5ee7db1cbd9a53e21ee2 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Mon, 13 Jun 2016 15:55:56 -0400 Subject: RSA keygen needs even more stack space than I thought. Also, it turns out the linker wants to include initializers for sdram variables in the .elf and .bin files, even though it should handle it like bss. So now we manage sdram directly with a pseudo-malloc. --- projects/hsm/hsm.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/projects/hsm/hsm.c b/projects/hsm/hsm.c index e3c1c36..70a7691 100644 --- a/projects/hsm/hsm.c +++ b/projects/hsm/hsm.c @@ -77,13 +77,9 @@ /* Define an absurdly large task stack, because some pkey operation use a * lot of stack variables. */ -#define TASK_STACK_SIZE 64*1024 +#define TASK_STACK_SIZE 200*1024 #endif -/* Put the task stack buffers in SDRAM, because ARM RAM is too small. - */ -__attribute__((section(".sdram1"))) uint8_t stack[NUM_RPC_TASK][TASK_STACK_SIZE]; - #ifndef MAX_PKT_SIZE /* Another arbitrary number, more or less driven by the 4096-bit RSA * keygen test. @@ -180,6 +176,28 @@ static void dispatch_thread(void const *args) } osThreadDef_t thread_def[NUM_RPC_TASK]; +/* Allocate memory from SDRAM1. There is only malloc, no free, so we don't + * worry about fragmentation. */ +static uint8_t *sdram_malloc(size_t size) +{ + /* end of variables declared with __attribute__((section(".sdram1"))) */ + extern uint8_t _esdram1 __asm ("_esdram1"); + /* end of SDRAM1 section */ + extern uint8_t __end_sdram1 __asm ("__end_sdram1"); + + static uint8_t *sdram_heap = &_esdram1; + uint8_t *p = sdram_heap; + +#define pad(n) (((n) + 3) & ~3) + size = pad(size); + + if (p + size > &__end_sdram1) + return NULL; + + sdram_heap += size; + return p; +} + /* The main thread. This does all the setup, and the worker threads handle * the rest. */ @@ -228,7 +246,9 @@ int main() ot->pthread = dispatch_thread; ot->tpriority = osPriorityNormal; ot->stacksize = TASK_STACK_SIZE; - ot->stack_pointer = (uint32_t *)stack[i]; + ot->stack_pointer = (uint32_t *)(sdram_malloc(TASK_STACK_SIZE)); + if (ot->stack_pointer == NULL) + Error_Handler(); if (osThreadCreate(ot, (void *)i) == NULL) Error_Handler(); } @@ -236,5 +256,5 @@ int main() /* Start the non-blocking receive */ HAL_UART_Receive_IT(&huart_user, &c, 1); - while (1) { ; } + return 0; } -- cgit v1.2.3 From 91db5e0c49b77c7a21a3b6d1c70b7128dcfa55a9 Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Mon, 13 Jun 2016 22:38:00 -0400 Subject: Change gpio setups from macros to inline functions. --- stm-init.c | 4 +--- stm-init.h | 43 ++++++++++++++++++++++++++----------------- 2 files changed, 27 insertions(+), 20 deletions(-) diff --git a/stm-init.c b/stm-init.c index d2d8d65..0016e13 100644 --- a/stm-init.c +++ b/stm-init.c @@ -157,8 +157,6 @@ static void MX_USART2_UART_Init(void) /* Configure General Purpose Input/Output pins */ static void MX_GPIO_Init(void) { - GPIO_InitTypeDef GPIO_InitStruct; - /* GPIO Ports Clock Enable */ LED_CLK_ENABLE(); @@ -217,7 +215,7 @@ void MX_I2C2_Init(void) hi2c_rtc.Init.NoStretchMode = I2C_NOSTRETCH_DISABLED; if (HAL_I2C_Init(&hi2c_rtc) != HAL_OK) { - Error_Handler(); + Error_Handler(); } } #endif diff --git a/stm-init.h b/stm-init.h index 252485d..2c3ec99 100644 --- a/stm-init.h +++ b/stm-init.h @@ -37,24 +37,33 @@ #include "stm32f4xx_hal.h" -/* Macros used to make GPIO pin setup (in stm-init.c) easier */ -#define gpio_output(output_port, output_pins, output_level) \ - /* Configure GPIO pin Output Level */ \ - HAL_GPIO_WritePin(output_port, output_pins, output_level); \ - /* Configure pin as output */ \ - GPIO_InitStruct.Pin = output_pins; \ - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; \ - GPIO_InitStruct.Pull = GPIO_NOPULL; \ - GPIO_InitStruct.Speed = GPIO_SPEED_LOW; \ - HAL_GPIO_Init(output_port, &GPIO_InitStruct) - -#define gpio_input(input_port, input_pin, input_pull) \ - GPIO_InitStruct.Pin = input_pin; \ - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; \ - GPIO_InitStruct.Pull = input_pull; \ - GPIO_InitStruct.Speed = GPIO_SPEED_LOW; \ - HAL_GPIO_Init(input_port, &GPIO_InitStruct) +/* Functions used to make GPIO pin setup (in stm-init.c) easier */ +inline void gpio_output(GPIO_TypeDef* output_port, uint16_t output_pins, GPIO_PinState output_level) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(output_port, output_pins, output_level); + + /* Configure pin as output */ + GPIO_InitStruct.Pin = output_pins; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_LOW; + HAL_GPIO_Init(output_port, &GPIO_InitStruct); +} + +inline void gpio_input(GPIO_TypeDef* input_port, uint16_t input_pin, GPIO_PinState input_pull) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + GPIO_InitStruct.Pin = input_pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = input_pull; + GPIO_InitStruct.Speed = GPIO_SPEED_LOW; + HAL_GPIO_Init(input_port, &GPIO_InitStruct); +} extern void stm_init(void); extern void Error_Handler(void); -- cgit v1.2.3 From 3e31061ff6cbba7ea5bcb16dd0fa55b65ebf586f Mon Sep 17 00:00:00 2001 From: Paul Selkirk Date: Tue, 14 Jun 2016 12:03:15 -0400 Subject: Import cli-test into hsm pretty much as-is. --- projects/hsm/Makefile | 7 +- projects/hsm/crc32.c | 62 ++++++++++++++ projects/hsm/hsm.c | 12 +-- projects/hsm/mgmt-cli.c | 214 +++++++++++++++++++++++++++++++++++++++++++++++ projects/hsm/mgmt-cli.h | 80 ++++++++++++++++++ projects/hsm/mgmt-dfu.c | 123 +++++++++++++++++++++++++++ projects/hsm/mgmt-dfu.h | 48 +++++++++++ projects/hsm/mgmt-fpga.c | 136 ++++++++++++++++++++++++++++++ projects/hsm/mgmt-fpga.h | 50 +++++++++++ projects/hsm/mgmt-misc.c | 138 ++++++++++++++++++++++++++++++ projects/hsm/mgmt-misc.h | 49 +++++++++++ projects/hsm/mgmt-show.c | 133 +++++++++++++++++++++++++++++ projects/hsm/mgmt-show.h | 43 ++++++++++ 13 files changed, 1088 insertions(+), 7 deletions(-) create mode 100644 projects/hsm/crc32.c create mode 100644 projects/hsm/mgmt-cli.c create mode 100644 projects/hsm/mgmt-cli.h create mode 100644 projects/hsm/mgmt-dfu.c create mode 100644 projects/hsm/mgmt-dfu.h create mode 100644 projects/hsm/mgmt-fpga.c create mode 100644 projects/hsm/mgmt-fpga.h create mode 100644 projects/hsm/mgmt-misc.c create mode 100644 projects/hsm/mgmt-misc.h create mode 100644 projects/hsm/mgmt-show.c create mode 100644 projects/hsm/mgmt-show.h diff --git a/projects/hsm/Makefile b/projects/hsm/Makefile index 1ee5323..55e021f 100644 --- a/projects/hsm/Makefile +++ b/projects/hsm/Makefile @@ -1,7 +1,7 @@ PROJ = hsm # objs in addition to $(PROJ).o -OBJS = +OBJS = crc32.o mgmt-cli.o mgmt-dfu.c mgmt-fpga.c mgmt-misc.c mgmt-show.c BOARD_OBJS = \ $(TOPLEVEL)/stm-init.o \ @@ -20,9 +20,12 @@ BOARD_OBJS = \ $(BOARD_DIR)/stm32f4xx_it_rtos.o CFLAGS += -I$(LIBHAL_DIR) +CFLAGS += -I$(LIBCLI_DIR) CFLAGS += -I$(RTOS_DIR)/rtos -I$(RTOS_DIR)/rtx/TARGET_CORTEX_M -LIBS += $(LIBHAL_DIR)/libhal.a $(LIBTFM_DIR)/libtfm.a $(RTOS_DIR)/librtos.a +LIBS += $(LIBHAL_DIR)/libhal.a $(LIBTFM_DIR)/libtfm.a +LIBS += $(RTOS_DIR)/librtos.a +LIBS += $(LIBCLI_DIR)/libcli.a all: $(PROJ:=.elf) diff --git a/projects/hsm/crc32.c b/projects/hsm/crc32.c new file mode 100644 index 0000000..4d1a0bc --- /dev/null +++ b/projects/hsm/crc32.c @@ -0,0 +1,62 @@ +/* Reference code from RFC1952. Not meant to be used outside test code. */ + +#include "stm32f4xx_hal.h" + + +/* Table of CRCs of all 8-bit messages. */ +unsigned long crc_table[256]; + +/* Flag: has the table been computed? Initially false. */ +int crc_table_computed = 0; + +/* Make the table for a fast CRC. */ +void make_crc_table(void) +{ + unsigned long c; + + int n, k; + for (n = 0; n < 256; n++) { + c = (unsigned long) n; + for (k = 0; k < 8; k++) { + if (c & 1) { + c = 0xedb88320L ^ (c >> 1); + } else { + c = c >> 1; + } + } + crc_table[n] = c; + } + crc_table_computed = 1; +} + +/* + Update a running crc with the bytes buf[0..len-1] and return + the updated crc. The crc should be initialized to zero. Pre- and + post-conditioning (one's complement) is performed within this + function so it shouldn't be done by the caller. Usage example: + + unsigned long crc = 0L; + + while (read_buffer(buffer, length) != EOF) { + crc = update_crc(crc, buffer, length); + } + if (crc != original_crc) error(); +*/ +uint32_t update_crc(uint32_t crc, uint8_t *buf, int len) +{ + unsigned long c = crc ^ 0xffffffffL; + int n; + + if (!crc_table_computed) + make_crc_table(); + for (n = 0; n < len; n++) { + c = crc_table[(c ^ buf[n]) & 0xff] ^ (c >> 8); + } + return c ^ 0xffffffffL; +} + +/* Return the CRC of the bytes buf[0..len-1]. */ +unsigned long crc(unsigned char *buf, int len) +{ + return update_crc(0L, buf, len); +} diff --git a/projects/hsm/hsm.c b/projects/hsm/hsm.c index 70a7691..5758f05 100644 --- a/projects/hsm/hsm.c +++ b/projects/hsm/hsm.c @@ -55,6 +55,8 @@ #include "stm-uart.h" #include "stm-sdram.h" +#include "mgmt-cli.h" + /* stm32f4xx_hal_def.h and hal.h both define HAL_OK as an enum value */ #define HAL_OK HAL_OKAY @@ -110,7 +112,7 @@ osMutexDef(dispatch_mutex); osSemaphoreId rpc_sem; osSemaphoreDef(rpc_sem); -static uint8_t c; /* current character received from UART */ +static volatile uint8_t uart_rx; /* current character received from UART */ static rpc_buffer_t * volatile rbuf; /* current RPC input buffer */ /* Callback for HAL_UART_Receive_IT(). @@ -122,7 +124,7 @@ void HAL_UART2_RxCpltCallback(UART_HandleTypeDef *huart) if (complete) osSemaphoreRelease(rpc_sem); - HAL_UART_Receive_IT(huart, &c, 1); + HAL_UART_Receive_IT(huart, (uint8_t *)&uart_rx, 1); } hal_error_t hal_serial_send_char(uint8_t c) @@ -133,7 +135,7 @@ hal_error_t hal_serial_send_char(uint8_t c) hal_error_t hal_serial_recv_char(uint8_t *cp) { /* return the character from HAL_UART_Receive_IT */ - *cp = c; + *cp = uart_rx; return HAL_OK; } @@ -254,7 +256,7 @@ int main() } /* Start the non-blocking receive */ - HAL_UART_Receive_IT(&huart_user, &c, 1); + HAL_UART_Receive_IT(&huart_user, (uint8_t *)&uart_rx, 1); - return 0; + return cli_main(); } diff --git a/projects/hsm/mgmt-cli.c b/projects/hsm/mgmt-cli.c new file mode 100644 index 0000000..bef530e --- /dev/null +++ b/projects/hsm/mgmt-cli.c @@ -0,0 +1,214 @@ +/* + * mgmt-cli.c + * --------- + * Management CLI code. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#include "stm-init.h" +#include "stm-uart.h" +#include "stm-led.h" + +#include "mgmt-cli.h" +#include "mgmt-dfu.h" +#include "mgmt-fpga.h" +#include "mgmt-misc.h" +#include "mgmt-show.h" + +/* MGMT UART interrupt receive buffer (data will be put in a larger ring buffer) */ +volatile uint8_t uart_rx; + +#ifndef CLI_UART_RECVBUF_SIZE +#define CLI_UART_RECVBUF_SIZE 256 /* This must be a power of 2 */ +#endif +#define CLI_UART_RECVBUF_MASK (CLI_UART_RECVBUF_SIZE - 1) + +typedef struct { + uint32_t enabled, ridx; + mgmt_cli_dma_state_t rx_state; + uint8_t buf[CLI_UART_RECVBUF_SIZE]; +} uart_ringbuf_t; + +volatile uart_ringbuf_t uart_ringbuf = {1, 0, DMA_RX_STOP, {0}}; + +#define RINGBUF_RIDX(rb) (rb.ridx & CLI_UART_RECVBUF_MASK) +#define RINGBUF_WIDX(rb) (sizeof(rb.buf) - __HAL_DMA_GET_COUNTER(huart_mgmt.hdmarx)) +#define RINGBUF_COUNT(rb) ((unsigned)(RINGBUF_WIDX(rb) - RINGBUF_RIDX(rb))) +#define RINGBUF_READ(rb, dst) {dst = rb.buf[RINGBUF_RIDX(rb)]; rb.buf[RINGBUF_RIDX(rb)] = '.'; rb.ridx++;} + +static void uart_cli_print(struct cli_def *cli __attribute__ ((unused)), const char *buf) +{ + char crlf[] = "\r\n"; + uart_send_string2(STM_UART_MGMT, buf); + uart_send_string2(STM_UART_MGMT, crlf); +} + +static int uart_cli_read(struct cli_def *cli __attribute__ ((unused)), void *buf, size_t count) +{ + uint32_t timeout = 0xffffff; + while (count && timeout) { + if (RINGBUF_COUNT(uart_ringbuf)) { + RINGBUF_READ(uart_ringbuf, *(uint8_t *) buf); + buf++; + count--; + } + timeout--; + } + if (! timeout) return 0; + + return 1; +} + +static int uart_cli_write(struct cli_def *cli __attribute__ ((unused)), const void *buf, size_t count) +{ + uart_send_bytes(STM_UART_MGMT, (uint8_t *) buf, count); + return (int) count; +} + +int control_mgmt_uart_dma_rx(mgmt_cli_dma_state_t state) +{ + if (state == DMA_RX_START) { + if (uart_ringbuf.rx_state != DMA_RX_START) { + memset((void *) uart_ringbuf.buf, 0, sizeof(uart_ringbuf.buf)); + + /* Start receiving data from the UART using DMA */ + HAL_UART_Receive_DMA(&huart_mgmt, (uint8_t *) uart_ringbuf.buf, sizeof(uart_ringbuf.buf)); + uart_ringbuf.ridx = 0; + uart_ringbuf.rx_state = DMA_RX_START; + } + return 1; + } else if (state == DMA_RX_STOP) { + if (HAL_UART_DMAStop(&huart_mgmt) != HAL_OK) return 0; + uart_ringbuf.rx_state = DMA_RX_STOP; + return 1; + } + return 0; +} + +static int embedded_cli_loop(struct cli_def *cli) +{ + unsigned char c; + int n = 0; + static struct cli_loop_ctx ctx; + + memset(&ctx, 0, sizeof(ctx)); + ctx.insertmode = 1; + + cli->state = CLI_STATE_LOGIN; + + /* start off in unprivileged mode */ + cli_set_privilege(cli, PRIVILEGE_UNPRIVILEGED); + cli_set_configmode(cli, MODE_EXEC, NULL); + + cli_error(cli, "%s", cli->banner); + + while (1) { + cli_loop_start_new_command(cli, &ctx); + + control_mgmt_uart_dma_rx(DMA_RX_START); + + while (1) { + cli_loop_show_prompt(cli, &ctx); + + n = cli_loop_read_next_char(cli, &ctx, &c); + + /* + cli_print(cli, "Next char: '%c'/%i, ringbuf ridx %i, widx %i", + c, (int) c, + uart_ringbuf.ridx, + RINGBUF_WIDX(uart_ringbuf) + */ + if (n == CLI_LOOP_CTRL_BREAK) + break; + if (n == CLI_LOOP_CTRL_CONTINUE) + continue; + + n = cli_loop_process_char(cli, &ctx, c); + if (n == CLI_LOOP_CTRL_BREAK) + break; + if (n == CLI_LOOP_CTRL_CONTINUE) + continue; + } + + if (ctx.l < 0) + continue; + + /* cli_print(cli, "Process command: '%s'", ctx.cmd); */ + n = cli_loop_process_cmd(cli, &ctx); + if (n == CLI_LOOP_CTRL_BREAK) + break; + } + + return CLI_OK; +} + +static void mgmt_cli_init(struct cli_def *cli) +{ + cli_init(cli); + cli_read_callback(cli, uart_cli_read); + cli_write_callback(cli, uart_cli_write); + cli_print_callback(cli, uart_cli_print); + cli_set_banner(cli, "Cryptech Alpha"); + cli_set_hostname(cli, "cryptech"); + cli_telnet_protocol(cli, 0); +} + +static int check_auth(const char *username, const char *password) +{ + if (strcasecmp(username, "ct") != 0) + return CLI_ERROR; + if (strcasecmp(password, "ct") != 0) + return CLI_ERROR; + return CLI_OK; +} + +int cli_main(void) +{ + static struct cli_def cli; + + mgmt_cli_init(&cli); + cli_set_auth_callback(&cli, check_auth); + + configure_cli_show(&cli); + configure_cli_fpga(&cli); + configure_cli_misc(&cli); + configure_cli_dfu(&cli); + + while (1) { + embedded_cli_loop(&cli); + /* embedded_cli_loop returns when the user enters 'quit' or 'exit' */ + cli_print(&cli, "\nLogging out...\n"); + } + + /*NOTREACHED*/ + return -1; +} diff --git a/projects/hsm/mgmt-cli.h b/projects/hsm/mgmt-cli.h new file mode 100644 index 0000000..c96dae6 --- /dev/null +++ b/projects/hsm/mgmt-cli.h @@ -0,0 +1,80 @@ +/* + * mgmt-cli.h + * --------- + * Management CLI code. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __STM32_MGMT_CLI_H +#define __STM32_MGMT_CLI_H + +#include "stm-init.h" +#include + + +/* A bunch of defines to make it easier to add/maintain the CLI commands. + * + */ +#define _cli_cmd_struct(name, fullname, func, help) \ + static struct cli_command cmd_##fullname##_s = \ + {(char *) #name, func, 0, help, \ + PRIVILEGE_UNPRIVILEGED, MODE_EXEC, NULL, NULL, NULL} + +/* ROOT is a top-level label with no command */ +#define cli_command_root(name) \ + _cli_cmd_struct(name, name, NULL, NULL); \ + cli_register_command2(cli, &cmd_##name##_s, NULL) + +/* BRANCH is a label with a parent, but no command */ +#define cli_command_branch(parent, name) \ + _cli_cmd_struct(name, parent##_##name, NULL, NULL); \ + cli_register_command2(cli, &cmd_##parent##_##name##_s, &cmd_##parent##_s) + +/* NODE is a label with a parent and with a command associated with it */ +#define cli_command_node(parent, name, help) \ + _cli_cmd_struct(name, parent##_##name, cmd_##parent##_##name, (char *) help); \ + cli_register_command2(cli, &cmd_##parent##_##name##_s, &cmd_##parent##_s) + +/* ROOT NODE is a label without a parent, but with a command associated with it */ +#define cli_command_root_node(name, help) \ + _cli_cmd_struct(name, name, cmd_##name, (char *) help); \ + cli_register_command2(cli, &cmd_##name##_s, NULL) + + +typedef enum { + DMA_RX_STOP, + DMA_RX_START, +} mgmt_cli_dma_state_t; + +extern int control_mgmt_uart_dma_rx(mgmt_cli_dma_state_t state); + +extern int cli_main(void); + +#endif /* __STM32_MGMT_CLI_H */ diff --git a/projects/hsm/mgmt-dfu.c b/projects/hsm/mgmt-dfu.c new file mode 100644 index 0000000..e57c521 --- /dev/null +++ b/projects/hsm/mgmt-dfu.c @@ -0,0 +1,123 @@ +/* + * mgmt-dfu.c + * --------- + * CLI code for looking at, jumping to or erasing the loaded firmware. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "stm-init.h" +#include "mgmt-cli.h" +#include "stm-uart.h" +#include "stm-flash.h" +#include "mgmt-dfu.h" + +#include + +#define DFU_FIRMWARE_ADDR ((uint32_t) &CRYPTECH_FIRMWARE_START) +#define DFU_FIRMWARE_END_ADDR ((uint32_t) &CRYPTECH_FIRMWARE_END) +#define DFU_UPLOAD_CHUNK_SIZE 256 +#define HARDWARE_EARLY_DFU_JUMP 0xBADABADA + +extern uint32_t update_crc(uint32_t crc, uint8_t *buf, int len); + +/* Linker symbols are strange in C. Make regular pointers for sanity. */ +__IO uint32_t *dfu_control = &CRYPTECH_DFU_CONTROL; +__IO uint32_t *dfu_firmware = &CRYPTECH_FIRMWARE_START; +__IO uint32_t *dfu_firmware_end = &CRYPTECH_FIRMWARE_END; +/* The first word in the firmware is an address to the stack (msp) */ +__IO uint32_t *dfu_msp_ptr = &CRYPTECH_FIRMWARE_START; +/* The second word in the firmware is a pointer to the code + * (points at the Reset_Handler from the linker script). + */ +__IO uint32_t *dfu_code_ptr = &CRYPTECH_FIRMWARE_START + 1; + +static int cmd_dfu_dump(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + cli_print(cli, "First 256 bytes from DFU application address %p:\r\n", dfu_firmware); + + uart_send_hexdump(STM_UART_MGMT, (uint8_t *) dfu_firmware, 0, 0xff); + uart_send_string2(STM_UART_MGMT, (char *) "\r\n\r\n"); + + return CLI_OK; +} + +static int cmd_dfu_erase(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + int status; + + cli_print(cli, "Erasing flash sectors %i to %i (address %p to %p) - expect the CLI to crash now", + stm_flash_sector_num((uint32_t) dfu_firmware), + stm_flash_sector_num((uint32_t) dfu_firmware_end), + dfu_firmware, + dfu_firmware_end); + + if ((status = stm_flash_erase_sectors((uint32_t) dfu_firmware, (uint32_t) dfu_firmware_end)) != 0) { + cli_print(cli, "Failed erasing flash sectors (%i)", status); + } + + return CLI_OK; +} + +static int cmd_dfu_jump(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + uint32_t i; + /* Load first byte from the DFU_FIRMWARE_PTR to verify it contains an IVT before + * jumping there. + */ + cli_print(cli, "Checking for application at %p", dfu_firmware); + + i = *dfu_msp_ptr & 0xFF000000; + /* 'new_msp' is supposed to be a pointer to the new applications stack, it should + * point either at RAM (0x20000000) or at the CCM memory (0x10000000). + */ + if (i == 0x20000000 || i == 0x10000000) { + /* Set dfu_control to the magic value that will cause the us to jump to the + * firmware from the CLI main() function after rebooting. + */ + *dfu_control = HARDWARE_EARLY_DFU_JUMP; + cli_print(cli, "Making the leap"); + HAL_NVIC_SystemReset(); + while (1) { ; } + } else { + cli_print(cli, "No loaded application found at %p (read 0x%x)", + dfu_firmware, (unsigned int) *dfu_msp_ptr); + } + + return CLI_OK; +} + +void configure_cli_dfu(struct cli_def *cli) +{ + cli_command_root(dfu); + + cli_command_node(dfu, dump, "Show the first 256 bytes of the loaded firmware"); + cli_command_node(dfu, jump, "Jump to the loaded firmware"); + cli_command_node(dfu, erase, "Erase the firmware memory (will crash the CLI)"); +} diff --git a/projects/hsm/mgmt-dfu.h b/projects/hsm/mgmt-dfu.h new file mode 100644 index 0000000..047e30a --- /dev/null +++ b/projects/hsm/mgmt-dfu.h @@ -0,0 +1,48 @@ +/* + * mgmt-dfu.h + * --------- + * Management CLI Device Firmware Upgrade code. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __STM32_CLI_MGMT_DFU_H +#define __STM32_CLI_MGMT_DFU_H + +#include "stm-init.h" +#include + +/* symbols defined in the linker script (STM32F429BI.ld) */ +extern uint32_t CRYPTECH_FIRMWARE_START; +extern uint32_t CRYPTECH_FIRMWARE_END; +extern uint32_t CRYPTECH_DFU_CONTROL; + +extern void configure_cli_dfu(struct cli_def *cli); + +#endif /* __STM32_CLI_MGMT_DFU_H */ diff --git a/projects/hsm/mgmt-fpga.c b/projects/hsm/mgmt-fpga.c new file mode 100644 index 0000000..b6eea3d --- /dev/null +++ b/projects/hsm/mgmt-fpga.c @@ -0,0 +1,136 @@ +/* + * mgmt-fpga.c + * ----------- + * CLI code to manage the FPGA configuration etc. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "stm-init.h" +#include "stm-uart.h" +#include "stm-fpgacfg.h" + +#include "mgmt-cli.h" +#include "mgmt-fpga.h" +#include "mgmt-misc.h" + +#include + + +static volatile uint32_t dfu_offset = 0; + + +static int _flash_write_callback(uint8_t *buf, size_t len) { + int res = fpgacfg_write_data(dfu_offset, buf, BITSTREAM_UPLOAD_CHUNK_SIZE) == 1; + dfu_offset += BITSTREAM_UPLOAD_CHUNK_SIZE; + return res; +} + +static int cmd_fpga_bitstream_upload(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + uint8_t buf[BITSTREAM_UPLOAD_CHUNK_SIZE]; + + dfu_offset = 0; + + fpgacfg_access_control(ALLOW_ARM); + + cli_print(cli, "Checking if FPGA config memory is accessible"); + if (fpgacfg_check_id() != 1) { + cli_print(cli, "ERROR: FPGA config memory not accessible. Check that jumpers JP7 and JP8 are installed."); + return CLI_ERROR; + } + + cli_receive_data(cli, &buf[0], sizeof(buf), _flash_write_callback); + + fpgacfg_access_control(ALLOW_FPGA); + + cli_print(cli, "DFU offset now: %li (%li chunks)", dfu_offset, dfu_offset / BITSTREAM_UPLOAD_CHUNK_SIZE); + return CLI_OK; +} + +static int cmd_fpga_bitstream_erase(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + fpgacfg_access_control(ALLOW_ARM); + + cli_print(cli, "Checking if FPGA config memory is accessible"); + if (fpgacfg_check_id() != 1) { + cli_print(cli, "ERROR: FPGA config memory not accessible. Check that jumpers JP7 and JP8 are installed."); + return CLI_ERROR; + } + + /* Erasing the whole config memory takes a while, we just need to erase the first sector. + * The bitstream has an EOF marker, so even if the next bitstream uploaded is shorter than + * the current one there should be no problem. + * + * This command could be made to accept an argument indicating the whole memory should be erased. + */ + if (! fpgacfg_erase_sectors(1)) { + cli_print(cli, "Erasing first sector in FPGA config memory failed"); + return CLI_ERROR; + } + + cli_print(cli, "Erased FPGA config memory"); + fpgacfg_access_control(ALLOW_FPGA); + + return CLI_OK; +} + +static int cmd_fpga_reset(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + fpgacfg_access_control(ALLOW_FPGA); + fpgacfg_reset_fpga(RESET_FULL); + cli_print(cli, "FPGA has been reset"); + + return CLI_OK; +} + +static int cmd_fpga_reset_registers(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + fpgacfg_access_control(ALLOW_FPGA); + fpgacfg_reset_fpga(RESET_REGISTERS); + cli_print(cli, "FPGA registers have been reset"); + + return CLI_OK; +} + +void configure_cli_fpga(struct cli_def *cli) +{ + /* fpga */ + cli_command_root(fpga); + /* fpga reset */ + cli_command_node(fpga, reset, "Reset FPGA (config reset)"); + /* fpga reset registers */ + cli_command_node(fpga_reset, registers, "Reset FPGA registers (soft reset)"); + + cli_command_branch(fpga, bitstream); + /* fpga bitstream upload */ + cli_command_node(fpga_bitstream, upload, "Upload new FPGA bitstream"); + /* fpga bitstream erase */ + cli_command_node(fpga_bitstream, erase, "Erase FPGA config memory"); +} diff --git a/projects/hsm/mgmt-fpga.h b/projects/hsm/mgmt-fpga.h new file mode 100644 index 0000000..ce185de --- /dev/null +++ b/projects/hsm/mgmt-fpga.h @@ -0,0 +1,50 @@ +/* + * mgmt-fpga.h + * ----------- + * Management FPGA related code. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __STM32_CLI_MGMT_FPGA_H +#define __STM32_CLI_MGMT_FPGA_H + +#include "stm-init.h" +#include + + +/* The chunk size have to be a multiple of the SPI flash page size (256 bytes), + and it has to match the chunk size in the program sending the bitstream over the UART. +*/ +#define BITSTREAM_UPLOAD_CHUNK_SIZE 4096 + + +extern void configure_cli_fpga(struct cli_def *cli); + +#endif /* __STM32_CLI_MGMT_FPGA_H */ diff --git a/projects/hsm/mgmt-misc.c b/projects/hsm/mgmt-misc.c new file mode 100644 index 0000000..67bc875 --- /dev/null +++ b/projects/hsm/mgmt-misc.c @@ -0,0 +1,138 @@ +/* + * mgmt-misc.c + * ----------- + * Miscellaneous CLI functions. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "stm-init.h" +#include "stm-uart.h" + +#include "mgmt-cli.h" +#include "mgmt-misc.h" + +#include + + +extern uint32_t update_crc(uint32_t crc, uint8_t *buf, int len); + + +static volatile uint32_t demo_crc = 0; + +static int _count_bytes_callback(uint8_t *buf, size_t len) { + demo_crc = update_crc(demo_crc, buf, len); + return 1; +} + +int cli_receive_data(struct cli_def *cli, uint8_t *buf, size_t len, cli_data_callback data_callback) +{ + uint32_t filesize = 0, crc = 0, my_crc = 0, counter = 0; + size_t n = len; + + if (! control_mgmt_uart_dma_rx(DMA_RX_STOP)) { + cli_print(cli, "Failed stopping DMA"); + return CLI_OK; + } + + cli_print(cli, "OK, write size (4 bytes), data in %li byte chunks, CRC-32 (4 bytes)", (uint32_t) n); + + if (uart_receive_bytes(STM_UART_MGMT, (void *) &filesize, 4, 1000) != HAL_OK) { + cli_print(cli, "Receive timed out"); + return CLI_ERROR; + } + + cli_print(cli, "Send %li bytes of data", filesize); + + while (filesize) { + /* By initializing buf to the same value that erased flash has (0xff), we don't + * have to try and be smart when writing the last page of data to a flash memory. + */ + memset(buf, 0xff, len); + + if (filesize < n) n = filesize; + + if (uart_receive_bytes(STM_UART_MGMT, (void *) buf, n, 1000) != HAL_OK) { + cli_print(cli, "Receive timed out"); + return CLI_ERROR; + } + filesize -= n; + my_crc = update_crc(my_crc, buf, n); + + /* After reception of a chunk but before ACKing we have "all" the time in the world to + * calculate CRC and invoke the data_callback. + */ + if (data_callback != NULL && ! data_callback(buf, (size_t) n)) { + cli_print(cli, "Data processing failed"); + return CLI_OK; + } + + counter++; + uart_send_bytes(STM_UART_MGMT, (void *) &counter, 4); + } + + cli_print(cli, "Send CRC-32"); + uart_receive_bytes(STM_UART_MGMT, (void *) &crc, 4, 1000); + cli_print(cli, "CRC-32 0x%x, calculated CRC 0x%x", (unsigned int) crc, (unsigned int) my_crc); + if (crc == my_crc) { + cli_print(cli, "CRC checksum MATCHED"); + } else { + cli_print(cli, "CRC checksum did NOT match"); + } + + return CLI_OK; +} + +static int cmd_filetransfer(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + uint8_t buf[FILETRANSFER_UPLOAD_CHUNK_SIZE]; + + demo_crc = 0; + cli_receive_data(cli, &buf[0], sizeof(buf), _count_bytes_callback); + cli_print(cli, "Demo CRC is: %li/0x%x", demo_crc, (unsigned int) demo_crc); + return CLI_OK; +} + +static int cmd_reboot(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + cli_print(cli, "\n\n\nRebooting\n\n\n"); + HAL_NVIC_SystemReset(); + + /*NOTREACHED*/ + return CLI_OK; +} + +void configure_cli_misc(struct cli_def *cli) +{ + /* filetransfer */ + cli_command_root_node(filetransfer, "Test file transfering"); + /* reboot */ + cli_command_root_node(reboot, "Reboot the STM32"); +} + diff --git a/projects/hsm/mgmt-misc.h b/projects/hsm/mgmt-misc.h new file mode 100644 index 0000000..b7eb4f4 --- /dev/null +++ b/projects/hsm/mgmt-misc.h @@ -0,0 +1,49 @@ +/* + * mgmt-misc.h + * ----------- + * Management CLI miscellaneous functions. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __STM32_CLI_MGMT_MISC_H +#define __STM32_CLI_MGMT_MISC_H + +#include "stm-init.h" +#include + + +#define FILETRANSFER_UPLOAD_CHUNK_SIZE 256 + +typedef int (*cli_data_callback)(uint8_t *, size_t); + +extern void configure_cli_misc(struct cli_def *cli); +extern int cli_receive_data(struct cli_def *cli, uint8_t *buf, size_t len, cli_data_callback data_callback); + +#endif /* __STM32_CLI_MGMT_MISC_H */ diff --git a/projects/hsm/mgmt-show.c b/projects/hsm/mgmt-show.c new file mode 100644 index 0000000..c9eb22c --- /dev/null +++ b/projects/hsm/mgmt-show.c @@ -0,0 +1,133 @@ +/* + * mgmt-show.c + * ----------- + * CLI 'show' functions. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "stm-init.h" +#include "stm-keystore.h" +#include "stm-fpgacfg.h" +#include "stm-uart.h" + +#include "mgmt-cli.h" +#include "mgmt-show.h" + +#include + + +static int cmd_show_cpuspeed(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + volatile uint32_t hclk; + + hclk = HAL_RCC_GetHCLKFreq(); + cli_print(cli, "HSE_VALUE: %li", HSE_VALUE); + cli_print(cli, "HCLK: %li (%i MHz)", hclk, (int) hclk / 1000 / 1000); + cli_print(cli, "SystemCoreClock: %li (%i MHz)", SystemCoreClock, (int) SystemCoreClock / 1000 / 1000); + return CLI_OK; +} + +static int cmd_show_fpga_status(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + cli_print(cli, "FPGA has %sloaded a bitstream", fpgacfg_check_done() ? "":"NOT "); + return CLI_OK; +} + +static int cmd_show_keystore_status(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + cli_print(cli, "Keystore memory is %sonline", (keystore_check_id() != 1) ? "NOT ":""); + return CLI_OK; +} + +static int cmd_show_keystore_data(struct cli_def *cli, const char *command, char *argv[], int argc) +{ + uint8_t buf[KEYSTORE_PAGE_SIZE]; + uint32_t i; + + if (keystore_check_id() != 1) { + cli_print(cli, "ERROR: The keystore memory is not accessible."); + } + + memset(buf, 0, sizeof(buf)); + if ((i = keystore_read_data(0, buf, sizeof(buf))) != 1) { + cli_print(cli, "Failed reading first page from keystore memory: %li", i); + return CLI_ERROR; + } + + cli_print(cli, "First page from keystore memory:\r\n"); + uart_send_hexdump(STM_UART_MGMT, buf, 0, sizeof(buf) - 1); + uart_send_string2(STM_UART_MGMT, (char *) "\r\n\r\n"); + + for (i = 0; i < 8; i++) { + if (buf[i] == 0xff) break; /* never written */ + if (buf[i] != 0x55) break; /* something other than a tombstone */ + } + /* As a demo, tombstone byte after byte of the first 8 bytes in the keystore memory + * (as long as they do not appear to contain real data). + * If all of them are tombstones, erase the first sector to start over. + */ + if (i < 8) { + if (buf[i] == 0xff) { + cli_print(cli, "Tombstoning byte %li", i); + buf[i] = 0x55; + if ((i = keystore_write_data(0, buf, sizeof(buf))) != 1) { + cli_print(cli, "Failed writing data at offset 0: %li", i); + return CLI_ERROR; + } + } + } else { + cli_print(cli, "Erasing first sector since all the first 8 bytes are tombstones"); + if ((i = keystore_erase_sectors(1)) != 1) { + cli_print(cli, "Failed erasing the first sector: %li", i); + return CLI_ERROR; + } + cli_print(cli, "Erase result: %li", i); + } + + return CLI_OK; +} + +void configure_cli_show(struct cli_def *cli) +{ + /* show */ + cli_command_root(show); + + /* show cpuspeed */ + cli_command_node(show, cpuspeed, "Show the speed at which the CPU currently operates"); + + cli_command_branch(show, fpga); + /* show fpga status*/ + cli_command_node(show_fpga, status, "Show status about the FPGA"); + + cli_command_branch(show, keystore); + /* show keystore status*/ + cli_command_node(show_keystore, status, "Show status of the keystore memory"); + cli_command_node(show_keystore, data, "Show the first page of the keystore memory"); +} diff --git a/projects/hsm/mgmt-show.h b/projects/hsm/mgmt-show.h new file mode 100644 index 0000000..0d7ba3a --- /dev/null +++ b/projects/hsm/mgmt-show.h @@ -0,0 +1,43 @@ +/* + * mgmt-misc.h + * ----------- + * Management CLI 'show' functions. + * + * Copyright (c) 2016, NORDUnet A/S All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of the NORDUnet nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __STM32_CLI_MGMT_SHOW_H +#define __STM32_CLI_MGMT_SHOW_H + +#include "stm-init.h" +#include + +extern void configure_cli_show(struct cli_def *cli); + +#endif /* __STM32_CLI_MGMT_SHOW_H */ -- cgit v1.2.3 From 2ada11eddd1069dc9f82f39b0471711b605f1fab Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Tue, 14 Jun 2016 15:44:12 -0400 Subject: Bring sw/stm32 super-repository up to date with the ten zillion commits which have been made in other repositories since the last time anybody bothered to synchronize this. Poster child for why this kind of recursive hairball belongs in release engineering rather than in source code repositories which are under active development, but that yak can wait a little while longer for its shave. --- libraries/libcli | 2 +- libraries/libhal | 2 +- libraries/thirdparty/libtfm | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/libraries/libcli b/libraries/libcli index 1a5727c..8e48837 160000 --- a/libraries/libcli +++ b/libraries/libcli @@ -1 +1 @@ -Subproject commit 1a5727c568e36b927ef2088b2b02bae4c84933f3 +Subproject commit 8e488375459c3057f2f3865e5626a2009bb47415 diff --git a/libraries/libhal b/libraries/libhal index 60cce01..a20af99 160000 --- a/libraries/libhal +++ b/libraries/libhal @@ -1 +1 @@ -Subproject commit 60cce0124f2fc3eddca03ed3950da9238247a612 +Subproject commit a20af9980516d516f0403bb80551db8d283aa383 diff --git a/libraries/thirdparty/libtfm b/libraries/thirdparty/libtfm index e2eab10..357ca59 160000 --- a/libraries/thirdparty/libtfm +++ b/libraries/thirdparty/libtfm @@ -1 +1 @@ -Subproject commit e2eab1093a134e5a655d1ccad23a31b2b8252c66 +Subproject commit 357ca59060848fb72367b67ccae137d66de6fe34 -- cgit v1.2.3 From f296bc7c56d8ee8801871c843e759022faa9b8dc Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Tue, 14 Jun 2016 19:38:01 -0400 Subject: Track libhal RPC_MODE simplification; add bootloader to "all" target. --- Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 51461c1..db23eae 100644 --- a/Makefile +++ b/Makefile @@ -104,7 +104,7 @@ export CFLAGS %.o : %.S $(CC) $(CFLAGS) -c -o $@ $< -all: board-test cli-test libhal-test hsm +all: board-test cli-test libhal-test hsm bootloader init: git submodule update --init --recursive --remote @@ -128,7 +128,7 @@ $(LIBTFM_DIR)/libtfm.a: $(MAKE) -C $(LIBTFM_DIR) PREFIX=$(PREFIX) $(LIBHAL_DIR)/libhal.a: $(LIBTFM_DIR)/libtfm.a - $(MAKE) -C $(LIBHAL_DIR) IO_BUS=fmc RPC_SERVER=yes RPC_TRANSPORT=serial KS=volatile libhal.a + $(MAKE) -C $(LIBHAL_DIR) IO_BUS=fmc RPC_MODE=server RPC_TRANSPORT=serial KS=volatile libhal.a $(LIBCLI_DIR)/libcli.a: $(MAKE) -C $(LIBCLI_DIR) @@ -145,7 +145,7 @@ bootloader: $(BOARD_OBJS) $(LIBS) # don't automatically delete objects, to avoid a lot of unnecessary rebuilding .SECONDARY: $(BOARD_OBJS) -.PHONY: board-test rtos-test libhal-test cli-test +.PHONY: board-test rtos-test libhal-test cli-test hsm bootloader clean: rm -f $(BOARD_OBJS) -- cgit v1.2.3 From 4e5a603abbe9c5ea6b3370f5d3b183bc1c42d325 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Tue, 14 Jun 2016 19:45:44 -0400 Subject: Pull libhal changes into stm32 subrepo. --- libraries/libhal | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/libhal b/libraries/libhal index a20af99..34f3228 160000 --- a/libraries/libhal +++ b/libraries/libhal @@ -1 +1 @@ -Subproject commit a20af9980516d516f0403bb80551db8d283aa383 +Subproject commit 34f32288afd87073eb5ab9bafc3f4202ab9a0551 -- cgit v1.2.3 From 057b71c1010e40be56031a6324b9fe2cdaebd6b4 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Tue, 14 Jun 2016 21:18:51 -0400 Subject: Pull in sw/libhal CLIENT_TRANSPORT makefile fix. --- libraries/libhal | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/libhal b/libraries/libhal index 34f3228..1c3e489 160000 --- a/libraries/libhal +++ b/libraries/libhal @@ -1 +1 @@ -Subproject commit 34f32288afd87073eb5ab9bafc3f4202ab9a0551 +Subproject commit 1c3e4894ea9f1a6f9bc6602e6454a6efd9562efa -- cgit v1.2.3 From 764c6f6bd0d055c871e69f0af47d1fa0c7ae0924 Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Tue, 14 Jun 2016 22:38:06 -0400 Subject: hsm project was failing with obscure make error because makefile did not specify dependency on libcli. --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index db23eae..1bdb5fa 100644 --- a/Makefile +++ b/Makefile @@ -136,7 +136,7 @@ $(LIBCLI_DIR)/libcli.a: libhal-test: $(BOARD_OBJS) $(LIBS) $(LIBHAL_DIR)/libhal.a $(MAKE) -C projects/libhal-test -hsm: $(BOARD_OBJS) $(LIBS) $(LIBHAL_DIR)/libhal.a $(RTOS_DIR)/librtos.a +hsm: $(BOARD_OBJS) $(LIBS) $(LIBHAL_DIR)/libhal.a $(RTOS_DIR)/librtos.a $(LIBCLI_DIR)/libcli.a $(MAKE) -C projects/hsm bootloader: $(BOARD_OBJS) $(LIBS) -- cgit v1.2.3 From e961e9818193acbb18c503830a554e52285e096b Mon Sep 17 00:00:00 2001 From: Rob Austein Date: Tue, 14 Jun 2016 23:31:47 -0400 Subject: Whack shell scripts to work on Debian Jessie too. --- bin/debug | 6 +++++- bin/flash-target | 14 ++++++++++++-- bin/reset | 6 +++++- 3 files changed, 22 insertions(+), 4 deletions(-) diff --git a/bin/debug b/bin/debug index f87a3b5..14f3fa6 100755 --- a/bin/debug +++ b/bin/debug @@ -6,7 +6,11 @@ OPENOCD=openocd OPENOCD_BOARD_DIR=/usr/share/openocd/scripts/board OPENOCD_PROC_FILE=stm32f4discovery.cfg if [ "x`lsusb -d 0483:374b`" != "x" ]; then - OPENOCD_PROC_FILE=st_nucleo_f4.cfg + for fn in st_nucleo_f4.cfg st_nucleo_f401re.cfg; do + if [ -f "$OPENOCD_BOARD_DIR/$fn" ]; then + OPENOCD_PROC_FILE="$fn" + fi + done fi $OPENOCD -f $OPENOCD_BOARD_DIR/$OPENOCD_PROC_FILE & diff --git a/bin/flash-target b/bin/flash-target index 0d60c85..7149c9f 100755 --- a/bin/flash-target +++ b/bin/flash-target @@ -22,7 +22,17 @@ OPENOCD_BOARD_DIR=/usr/share/openocd/scripts/board # OPENOCD_PROC_FILE=stm32f4discovery.cfg if [ "x`lsusb -d 0483:374b`" != "x" ]; then - OPENOCD_PROC_FILE=st_nucleo_f4.cfg + for fn in st_nucleo_f4.cfg st_nucleo_f401re.cfg; do + if [ -f "$OPENOCD_BOARD_DIR/$fn" ]; then + OPENOCD_PROC_FILE="$fn" + fi + done fi -$OPENOCD -f $OPENOCD_BOARD_DIR/$OPENOCD_PROC_FILE -c "program $PROJ.elf verify reset exit" +# This used to be "... verify reset exit", but that fails on Debian Jessie. +# The Net of a Million Lies claims that the "exit" is unnecessary, so the +# simplest solution is just to omit it. Should this turn out to be a mistake, +# well, we'll have to do something more clever to deal with these silly version +# skew problems between the several versions of openocd in current use. + +$OPENOCD -f $OPENOCD_BOARD_DIR/$OPENOCD_PROC_FILE -c "program $PROJ.elf verify reset" # exit diff --git a/bin/reset b/bin/reset index 1c57f97..8190805 100755 --- a/bin/reset +++ b/bin/reset @@ -21,7 +21,11 @@ OPENOCD_BOARD_DIR=/usr/share/openocd/scripts/board # OPENOCD_PROC_FILE=stm32f4discovery.cfg if [ "x`lsusb -d 0483:374b`" != "x" ]; then - OPENOCD_PROC_FILE=st_nucleo_f4.cfg + for fn in st_nucleo_f4.cfg st_nucleo_f401re.cfg; do + if [ -f "$OPENOCD_BOARD_DIR/$fn" ]; then + OPENOCD_PROC_FILE="$fn" + fi + done fi $OPENOCD -f $OPENOCD_BOARD_DIR/$OPENOCD_PROC_FILE -c "init" -c "reset run" -c "exit" -- cgit v1.2.3