From ac2357b001b970ff281d05566697c3d73f66ea4a Mon Sep 17 00:00:00 2001
From: Fredrik Thulin <fredrik@thulin.net>
Date: Sat, 21 May 2016 14:40:11 +0200
Subject: Add code to test reading, writing and erasing keystore data.

---
 projects/cli-test/cli-test.c | 49 ++++++++++++++++++++++++++++++++++++++++++++
 spiflash_n25q128.c           | 19 +++++++++++++++++
 spiflash_n25q128.h           |  1 +
 stm-keystore.c               |  5 +++++
 stm-keystore.h               |  4 ++++
 5 files changed, 78 insertions(+)

diff --git a/projects/cli-test/cli-test.c b/projects/cli-test/cli-test.c
index 6bc70dd..152c121 100644
--- a/projects/cli-test/cli-test.c
+++ b/projects/cli-test/cli-test.c
@@ -133,6 +133,54 @@ int cmd_show_keystore_status(struct cli_def *cli, const char *command, char *arg
     return CLI_OK;
 }
 
+int cmd_show_keystore_data(struct cli_def *cli, const char *command, char *argv[], int argc)
+{
+    uint8_t buf[KEYSTORE_PAGE_SIZE];
+    uint32_t i;
+
+    if (keystore_check_id() != 1) {
+	cli_print(cli, "ERROR: The keystore memory is not accessible.");
+    }
+
+    memset(buf, 0, sizeof(buf));
+    if ((i = keystore_read_data(0, buf, sizeof(buf))) != 1) {
+	cli_print(cli, "Failed reading first page from keystore memory: %li", i);
+	return CLI_ERROR;
+    }
+
+    cli_print(cli, "First page from keystore memory:\r\n");
+    uart_send_hexdump(STM_UART_MGMT, buf, 0, sizeof(buf) - 1);
+    uart_send_string2(STM_UART_MGMT, (char *) "\r\n\r\n");
+
+    for (i = 0; i < 8; i++) {
+	if (buf[i] == 0xff) break;  /* never written */
+	if (buf[i] != 0x55) break;  /* something other than a tombstone */
+    }
+    /* As a demo, tombstone byte after byte of the first 8 bytes in the keystore memory
+     * (as long as they do not appear to contain real data).
+     * If all of them are tombstones, erase the first sector to start over.
+     */
+    if (i < 8) {
+	if (buf[i] == 0xff) {
+	    cli_print(cli, "Tombstoning byte %li", i);
+	    buf[i] = 0x55;
+	    if ((i = keystore_write_data(0, buf, sizeof(buf))) != 1) {
+		cli_print(cli, "Failed writing data at offset 0: %li", i);
+		return CLI_ERROR;
+	    }
+	}
+    } else {
+	cli_print(cli, "Erasing first sector since all the first 8 bytes are tombstones");
+	if ((i = keystore_erase_sectors(1)) != 1) {
+	    cli_print(cli, "Failed erasing the first sector: %li", i);
+	    return CLI_ERROR;
+	}
+	cli_print(cli, "Erase result: %li", i);
+    }
+
+    return CLI_OK;
+}
+
 /* The chunk size have to be a multiple of the SPI flash page size (256 bytes),
    and it has to match the chunk size in the program sending the bitstream over the UART.
 */
@@ -282,6 +330,7 @@ void configure_cli_show(struct cli_def *cli)
     cli_command_branch(show, keystore);
     /* show keystore status*/
     cli_command_node(show_keystore, status, "Show status of the keystore memory");
+    cli_command_node(show_keystore, data, "Show the first page of the keystore memory");
 }
 
 void configure_cli_fpga(struct cli_def *cli)
diff --git a/spiflash_n25q128.c b/spiflash_n25q128.c
index 985e727..6e35a41 100644
--- a/spiflash_n25q128.c
+++ b/spiflash_n25q128.c
@@ -333,3 +333,22 @@ int n25q128_write_data(struct spiflash_ctx *ctx, uint32_t offset, const uint8_t
     return 1;
 }
 
+/* This function reads zero or more pages from the SPI flash. */
+int n25q128_read_data(struct spiflash_ctx *ctx, uint32_t offset, uint8_t *buf, const uint32_t len)
+{
+    uint32_t page;
+
+    /* Ensure alignment */
+    if ((offset % N25Q128_PAGE_SIZE) != 0) return -1;
+    if ((len % N25Q128_PAGE_SIZE) != 0) return -2;
+
+    for (page = 0; page < len / N25Q128_PAGE_SIZE; page++) {
+	if (! n25q128_read_page(ctx, offset / N25Q128_PAGE_SIZE, buf)) {
+	    return -3;
+	}
+	buf += N25Q128_PAGE_SIZE;
+	offset += N25Q128_PAGE_SIZE;
+    }
+
+    return 1;
+}
diff --git a/spiflash_n25q128.h b/spiflash_n25q128.h
index 6802e22..fefcb0d 100644
--- a/spiflash_n25q128.h
+++ b/spiflash_n25q128.h
@@ -72,4 +72,5 @@ extern int n25q128_write_page(struct spiflash_ctx *ctx, uint32_t page_offset, co
 extern int n25q128_erase_sector(struct spiflash_ctx *ctx, uint32_t sector_offset);
 
 extern int n25q128_write_data(struct spiflash_ctx *ctx, uint32_t offset, const uint8_t *buf, const uint32_t len);
+extern int n25q128_read_data(struct spiflash_ctx *ctx, uint32_t offset, uint8_t *buf, const uint32_t len);
 #endif /* __STM32_SPIFLASH_N25Q128_H */
diff --git a/stm-keystore.c b/stm-keystore.c
index 19c5ccc..575cda0 100644
--- a/stm-keystore.c
+++ b/stm-keystore.c
@@ -45,6 +45,11 @@ int keystore_check_id()
     return n25q128_check_id(&keystore_ctx);
 }
 
+int keystore_read_data(uint32_t offset, uint8_t *buf, const uint32_t len)
+{
+    return n25q128_read_data(&keystore_ctx, offset, buf, len);
+}
+
 int keystore_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len)
 {
     return n25q128_write_data(&keystore_ctx, offset, buf, len);
diff --git a/stm-keystore.h b/stm-keystore.h
index 9120340..2c493d2 100644
--- a/stm-keystore.h
+++ b/stm-keystore.h
@@ -38,6 +38,9 @@
 #include "stm32f4xx_hal.h"
 #include "spiflash_n25q128.h"
 
+#define KEYSTORE_PAGE_SIZE		   N25Q128_PAGE_SIZE
+#define KEYSTORE_SECTOR_SIZE		   N25Q128_SECTOR_SIZE
+
 /* Pins connected to the FPGA config memory (SPI flash) */
 #define KSM_PROM_CS_N_Pin                  GPIO_PIN_0
 #define KSM_PROM_CS_N_GPIO_Port            GPIOB
@@ -51,6 +54,7 @@
 extern SPI_HandleTypeDef hspi_keystore;
 
 extern int keystore_check_id(void);
+extern int keystore_read_data(uint32_t offset, uint8_t *buf, const uint32_t len);
 extern int keystore_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len);
 extern int keystore_erase_sectors(int num);
 
-- 
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