Age | Commit message (Collapse) | Author |
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Sometimes, the Half-Transfer Complete and Transfer Complete events
execute in the wrong order. This happens when both the TC and HT bits
get set before HAL_DMA_IRQHandler() runs. Don't know what causes that,
but this mitigates the problem with a separate read index for the
uart_rx buffer.
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If hal_rpc_server_dispatch() returns an XDR decode error because the
request packet was too short, don't call Error_Handler() and kill the
dispatch thread, just drop the request.
Add more ibuf_queue entries, but don't panic and kill the dispatch thread
if we can't get one, just drop the incoming character (which will lead to
an XDR decode error if/when we finally get an ibuf).
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Drag in UART-related changes from master.
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receive buffer with half-complete callbacks, and raise the dma priority.
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(dropped characters, improper handoff of message buffers).
Fixed by
a) changing the uart receiver from interrupt to DMA mode, and
b) replacing the dispatch mutex and rpc semaphore with a mail queue
(memory pool + message queue).
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Also, if the UART receive callback fails to re-enable receive (because
dispatch_thread is in the middle of transmitting a response), signal
dispatch_thread to re-enable receive after it's done.
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client handle in all responses.
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Also, it turns out the linker wants to include initializers for sdram
variables in the .elf and .bin files, even though it should handle it like
bss. So now we manage sdram directly with a pseudo-malloc.
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Also rearchitect the way we handle RPC requests - have a bunch of waiting
dispatch threads rather than continually creating and deleting threads.
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