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author | Fredrik Thulin <fredrik@thulin.net> | 2016-05-23 21:59:17 +0200 |
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committer | Fredrik Thulin <fredrik@thulin.net> | 2016-05-23 21:59:17 +0200 |
commit | 6265025f7cd7f606b6da62c7add13a6008500cf7 (patch) | |
tree | 7761c2a2136ed59fab776c6e2c78427a3082fd10 /libraries/mbed/rtos/rtx/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/SVC_Table.S | |
parent | 50f9d40503e5f9cb24241c4c584db3cb94af07aa (diff) |
SDRAM initialization and test code from Pavel.
Integrated into the cli-test program as such:
cryptech> test sdram
Initializing SDRAM
Starting SDRAM test (n = 0)
Run sequential write-then-read test for the first chip
Run random write-then-read test for the first chip
Run sequential write-then-read test for the second chip
Run random write-then-read test for the second chip
Run interleaved write-then-read test for both chips at once
SDRAM test (n = 0) completed
SDRAM test completed successfully
cryptech>
Diffstat (limited to 'libraries/mbed/rtos/rtx/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/SVC_Table.S')
0 files changed, 0 insertions, 0 deletions