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/*
 * novena-eim.h
 * ------------
 * This module contains the userland magic to set up and use the EIM bus.
 *
 *
 * Author: Pavel Shatov
 * Copyright (c) 2014-2015, NORDUnet A/S All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 *
 * - Neither the name of the NORDUnet nor the names of its contributors may
 *   be used to endorse or promote products derived from this software
 *   without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _NOVENA_EIM_H_
#define _NOVENA_EIM_H_

#include <stdint.h>
#include <sys/types.h>  /* Required for off_t, at least on Debian Wheezy. */

#define EIM_BASE_ADDR 0x08000000

/*
 * Set up EIM bus.
 * Returns 0 on success, -1 on failure.
 */

int  eim_setup(void);

/*
 * Write a 32-bit word to EIM.
 * If EIM is not set up correctly, this will abort with a bus error.
 */

void eim_write_32(off_t, uint32_t *);

/*
 * Read a 32-bit word from EIM.
 * If EIM is not set up correctly, this will abort with a bus error.
 */

void eim_read_32(off_t, uint32_t *);

#endif /* _NOVENA_EIM_H_ */

/*
 * Local variables:
 * indent-tabs-mode: nil
 * End:
 */
lass="cpf">"stm-sdram.h" #include "mgmt-cli.h" #include "mgmt-test.h" #include "test_sdram.h" #include "test_mkmif.h" #include <stdlib.h> int cmd_test_sdram(struct cli_def *cli, const char *command, char *argv[], int argc) { // run external memory initialization sequence HAL_StatusTypeDef status; int ok, num_cycles = 1, i, test_completed; if (argc == 1) { num_cycles = strtol(argv[0], NULL, 0); if (num_cycles > 100) num_cycles = 100; if (num_cycles < 1) num_cycles = 1; } cli_print(cli, "Initializing SDRAM"); status = sdram_init(); if (status != HAL_OK) { cli_print(cli, "Failed initializing SDRAM: %i", (int) status); return CLI_OK; } for (i = 1; i <= num_cycles; i++) { cli_print(cli, "Starting SDRAM test (%i/%i)", i, num_cycles); test_completed = 0; // set LFSRs to some initial value, LFSRs will produce // pseudo-random 32-bit patterns to test our memories lfsr1 = 0xCCAA5533; lfsr2 = 0xCCAA5533; cli_print(cli, "Run sequential write-then-read test for the first chip"); ok = test_sdram_sequential(SDRAM_BASEADDR_CHIP1); if (!ok) break; cli_print(cli, "Run random write-then-read test for the first chip"); ok = test_sdram_random(SDRAM_BASEADDR_CHIP1); if (!ok) break; cli_print(cli, "Run sequential write-then-read test for the second chip"); ok = test_sdram_sequential(SDRAM_BASEADDR_CHIP2); if (!ok) break; cli_print(cli, "Run random write-then-read test for the second chip"); ok = test_sdram_random(SDRAM_BASEADDR_CHIP2); if (!ok) break; // turn blue led on (testing two chips at the same time) led_on(LED_BLUE); cli_print(cli, "Run interleaved write-then-read test for both chips at once"); ok = test_sdrams_interleaved(SDRAM_BASEADDR_CHIP1, SDRAM_BASEADDR_CHIP2); led_off(LED_BLUE); test_completed = 1; cli_print(cli, "SDRAM test (%i/%i) completed\r\n", i, num_cycles); } if (! test_completed) { cli_print(cli, "SDRAM test failed (%i/%i)", i, num_cycles); } else { cli_print(cli, "SDRAM test completed successfully"); } return CLI_OK; } void configure_cli_test(struct cli_def *cli) { /* test */ cli_command_root(test); /* test sdram */ cli_command_node(test, sdram, "Run SDRAM tests"); /* test mkmif */ cli_command_node(test, mkmif, "Run Master Key Memory Interface tests"); }