//====================================================================== // // tb_keywrap.v // ------------ // Testbench for the keywrap top level wrapper (and core). // // // Author: Joachim Strombergson // Copyright (c) 2018, NORDUnet A/S // All rights reserved. // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions are // met: // - Redistributions of source code must retain the above copyright notice, // this list of conditions and the following disclaimer. // // - Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the distribution. // // - Neither the name of the NORDUnet nor the names of its contributors may // be used to endorse or promote products derived from this software // without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED // TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A // PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED // TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // //====================================================================== module tb_keywrap(); parameter DEBUG = 0; parameter DUMP_TOP = 0; parameter DUMP_CORE = 0; parameter CLK_HALF_PERIOD = 1; parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD; parameter ADDR_BITS = 13; parameter MEM_BASE = {1'h1, {(ADDR_BITS - 1){1'h0}}}; // API for the core. localparam ADDR_NAME0 = 8'h00; localparam ADDR_NAME1 = 8'h01; localparam ADDR_VERSION = 8'h02; localparam ADDR_CTRL = 8'h08; localparam CTRL_INIT_BIT = 0; localparam CTRL_NEXT_BIT = 1; localparam ADDR_STATUS = 8'h09; localparam STATUS_READY_BIT = 0; localparam STATUS_VALID_BIT = 1; localparam ADDR_CONFIG = 8'h0a; localparam CTRL_ENCDEC_BIT = 0; localparam CTRL_KEYLEN_BIT = 1; localparam ADDR_RLEN = 8'h0c; localparam ADDR_R_BANK = 8'h0d; localparam ADDR_A0 = 8'h0e; localparam ADDR_A1 = 8'h0f; localparam ADDR_KEY0 = 8'h10; localparam ADDR_KEY1 = 8'h11; localparam ADDR_KEY2 = 8'h12; localparam ADDR_KEY3 = 8'h13; localparam ADDR_KEY4 = 8'h14; localparam ADDR_KEY5 = 8'h15; localparam ADDR_KEY6 = 8'h16; localparam ADDR_KEY7 = 8'h17; localparam ADDR_R_DATA0 = 8'h80; localparam ADDR_R_DATA127 = 8'hff; //---------------------------------------------------------------- // Register and Wire declarations. //---------------------------------------------------------------- reg [31 : 0] cycle_ctr; reg [31 : 0] error_ctr; reg [31 : 0] tc_ctr; reg [31 : 0] read_data; reg [127 : 0] result_data; reg tb_clk; reg tb_reset_n; wire tb_mkm_spi_sclk; wire tb_mkm_spi_cs_n; reg tb_mkm_spi_do; wire tb_mkm_spi_di; reg tb_cs; reg tb_we; reg [(ADDR_BITS -1 ) : 0] tb_address; reg [31 : 0] tb_write_data; wire [31 : 0] tb_read_data; wire tb_error; //---------------------------------------------------------------- // Device Under Test. //---------------------------------------------------------------- keywrap dut( .clk(tb_clk), .reset_n(tb_reset_n), .mkm_spi_sclk(tb_mkm_spi_sclk), .mkm_spi_cs_n(tb_mkm_spi_cs_n), .mkm_spi_do(tb_mkm_spi_do), .mkm_spi_di(tb_mkm_spi_di), .cs(tb_cs), .we(tb_we), .address(tb_address), .write_data(tb_write_data), .read_data(tb_read_data), .error(tb_error) ); //---------------------------------------------------------------- // clk_gen // // Always running clock generator process. //---------------------------------------------------------------- always begin : clk_gen #CLK_HALF_PERIOD; tb_clk = !tb_clk; end // clk_gen //---------------------------------------------------------------- // sys_monitor() // // An always running process that creates a cycle counter and // conditionally displays information about the DUT. //---------------------------------------------------------------- always begin : sys_monitor cycle_ctr = cycle_ctr + 1; if (DEBUG) dump_dut_state(); #(CLK_PERIOD); end //---------------------------------------------------------------- // read_word() // // Read a data word from the given address in the DUT. // the word read will be available in the global variable // read_data. //---------------------------------------------------------------- task read_word(input [(ADDR_BITS - 1) : 0] address); begin tb_address = address; tb_cs = 1; tb_we = 0; #(CLK_PERIOD); read_data = tb_read_data; tb_cs = 0; if (DEBUG) begin $display("*** Reading 0x%08x from 0x%02x.", read_data, address); $display(""); end end endtask // read_word //---------------------------------------------------------------- // write_word() // // Write the given word to the DUT using the DUT interface. //---------------------------------------------------------------- task write_word(input [(ADDR_BITS - 1) : 0] address, input [31 : 0] word); begin if (DEBUG) begin $display("*** Writing 0x%08x to 0x%02x.", word, address); $display(""); end tb_address = address; tb_write_data = word; tb_cs = 1; tb_we = 1; #(1 * CLK_PERIOD); tb_cs = 0; tb_we = 0; end endtask // write_word //---------------------------------------------------------------- // wait_ready // // Wait for the DUT to signal that the result is ready //---------------------------------------------------------------- task wait_ready; begin : wait_ready reg rdy; rdy = 1'b0; while (rdy != 1'b1) begin read_word(ADDR_STATUS); rdy = tb_read_data[STATUS_READY_BIT]; end end endtask // wait_ready //---------------------------------------------------------------- // dump_mem() // // Dump the n first memory positions in the dut internal memory. //---------------------------------------------------------------- task dump_mem(input integer n); begin : dump_mem integer i; for (i = 0 ; i < n ; i = i + 1) $display("mem0[0x%06x] = 0x%08x mem1[0x%06x] = 0x%08x", i, dut.core.mem.mem0[i], i, dut.core.mem.mem1[i]); $display(""); end endtask // dump_mem //---------------------------------------------------------------- // dump_dut_state() // // Dump the state of the dump when needed. //---------------------------------------------------------------- task dump_dut_state; begin $display("cycle: 0x%016x", cycle_ctr); $display("State of DUT"); $display("------------"); if (DUMP_TOP) begin $display("top level state:"); $display("init_reg = 0x%x next_reg = 0x%x", dut.init_reg, dut.next_reg); $display("endec_reg = 0x%x keylen_reg = 0x%x", dut.encdec_reg, dut.keylen_reg); $display("rlen_reg = 0x%08x", dut.rlen_reg); $display("a0_reg = 0x%08x a1_reg = 0x%08x", dut.a0_reg, dut.a1_reg); $display(""); end if (DUMP_CORE) begin $display("core level state:"); $display("init = 0x%0x next = 0x%0x ready = 0x%0x valid = 0x%0x", dut.core.init, dut.core.next, dut.core.ready, dut.core.valid); $display("api_we = 0x%0x api_addr = 0x%0x api_wr_data = 0x%0x api_rd_data = 0x%0x", dut.core.api_we, dut.core.api_addr, dut.core.api_wr_data, dut.core.api_rd_data); $display("rlen = 0x%0x", dut.core.rlen); $display("key = 0x%0x", dut.core.key); $display("a_init = 0x%0x a_result = 0x%0x", dut.core.a_init, dut.core.a_result); $display(""); $display("update_state = 0x%0x", dut.core.update_state); $display("a_reg = 0x%0x a_new = 0x%0x a_we = 0x%0x", dut.core.a_reg, dut.core.a_new, dut.core.a_we); $display("core_we = 0x%0x core_addr = 0x%0x", dut.core.core_we, dut.core.core_addr); $display("core_rd_data = 0x%0x core_wr_data = 0x%0x ", dut.core.core_rd_data, dut.core.core_wr_data); $display("xor_val = 0x%0x", dut.core.keywrap_logic.xor_val); $display(""); $display("aes_ready = 0x%0x aes_valid = 0x%0x", dut.core.aes_ready, dut.core.aes_valid); $display("aes_init = 0x%0x aes_next = 0x%0x", dut.core.aes_init, dut.core.aes_next); $display("aes_block = 0x%0x aes_result = 0x%0x", dut.core.aes_block, dut.core.aes_result); $display(""); $display("block_ctr_reg = 0x%0x iteration_ctr_reg = 0x%0x", dut.core.block_ctr_reg, dut.core.iteration_ctr_reg); $display("keywrap_core_ctrl_reg = 0x%0x", dut.core.keywrap_core_ctrl_reg); $display("keywrap_core_ctrl_new = 0x%0x", dut.core.keywrap_core_ctrl_new); $display("keywrap_core_ctrl_we = 0x%0x", dut.core.keywrap_core_ctrl_we); end $display(""); $display(""); end endtask // dump_dut_state //---------------------------------------------------------------- // display_test_results() // // Display the accumulated test results. //---------------------------------------------------------------- task display_test_results; begin if (error_ctr == 0) begin $display("*** All %02d test cases completed successfully", tc_ctr); end else begin $display("*** %02d tests completed - %02d test cases did not complete successfully.", tc_ctr, error_ctr); end end endtask // display_test_results //---------------------------------------------------------------- // init_sim() // // Initialize all counters and testbed functionality as well // as setting the DUT inputs to defined values. //---------------------------------------------------------------- task init_sim; begin cycle_ctr = 1'h0; error_ctr = 1'h0; tc_ctr = 1'h0; tb_clk = 1'h0; tb_reset_n = 1'h1; tb_mkm_spi_do = 1'h1; tb_cs = 1'h0; tb_we = 1'h0; tb_address = 8'h0; tb_write_data = 32'h0; end endtask // init_sim //---------------------------------------------------------------- // reset_dut() // // Toggle reset to put the DUT into a well known state. //---------------------------------------------------------------- task reset_dut; begin $display("** Toggling reset."); tb_reset_n = 0; #(2 * CLK_PERIOD); tb_reset_n = 1; $display(""); end endtask // reset_dut //---------------------------------------------------------------- // test_core_access // Simple test that we can perform read access to regs // in the core. //---------------------------------------------------------------- task test_core_access; begin : test_core_access $display("** TC test_core_access START."); read_word(ADDR_NAME0); $display("NAME0: %s", read_data); read_word(ADDR_NAME1); $display("NAME1: %s", read_data); read_word(ADDR_VERSION); $display("version: %s", read_data); $display("** TC test_core_access END."); $display(""); end endtask // test_core_access //---------------------------------------------------------------- // test_kwp_ae_128_1 // Implements wrap test based on NIST KWP_AE 128 bit key // with 248 bit plaintext. //---------------------------------------------------------------- task test_kwp_ae_128_1; begin : kwp_ae_128_1 integer i; integer err; err = 0; tc_ctr = tc_ctr + 1; $display("** TC kwp_ae_128_1 START."); // Write key and keylength, we also want to encrypt/wrap. write_word(ADDR_KEY0, 32'hc03db3cc); write_word(ADDR_KEY1, 32'h1416dcd1); write_word(ADDR_KEY2, 32'hc069a195); write_word(ADDR_KEY3, 32'ha8d77e3d); write_word(ADDR_CONFIG, 32'h00000001); // Initialize the AES engine (to expand the key). // Wait for init to complete. // Note, not actually needed to wait. We can write R data during init. $display("* Trying to initialize."); write_word(ADDR_CTRL, 32'h00000001); #(2 * CLK_PERIOD); wait_ready(); $display("* Init should be done."); // Set the length or R in blocks. // Write the R bank to be written to. // Write the R blocks to be processed. write_word(ADDR_RLEN, 32'h00000004); // Write the data to be wrapped. write_word(MEM_BASE + 0, 32'h46f87f58); write_word(MEM_BASE + 1, 32'hcdda4200); write_word(MEM_BASE + 2, 32'hf53d99ce); write_word(MEM_BASE + 3, 32'h2e49bdb7); write_word(MEM_BASE + 4, 32'h6212511f); write_word(MEM_BASE + 5, 32'he0cd4d0b); write_word(MEM_BASE + 6, 32'h5f37a27d); write_word(MEM_BASE + 7, 32'h45a28800); // Write magic words to A. write_word(ADDR_A0, 32'ha65959a6); write_word(ADDR_A1, 32'h0000001f); $display("* Dumping state and mem after data write and A words."); dump_dut_state(); dump_mem(6); $display("* Contents of memory and dut before wrap processing:"); dump_mem(6); // Start wrapping and wait for wrap to complete. $display("* Trying to start processing."); write_word(ADDR_CTRL, 32'h00000002);
/*
 * ks_flash.c
 * ----------
 * Keystore implementation in flash memory.
 *
 * Authors: Rob Austein, Fredrik Thulin
 * Copyright (c) 2015-2016, NORDUnet A/S All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 *
 * - Neither the name of the NORDUnet nor the names of its contributors may
 *   be used to endorse or promote products derived from this software
 *   without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#define HAL_OK LIBHAL_OK
#include "hal.h"
#include "hal_internal.h"
#undef HAL_OK

#define HAL_OK CMIS_HAL_OK
#include "stm-keystore.h"
#include "masterkey.h"
#undef HAL_OK

#include <string.h>


#define PAGE_SIZE_MASK			(KEYSTORE_PAGE_SIZE - 1)

/*
 * Use a one-element array here so that references can be pointer-based
 * as in the other implementations, to ease re-merge at some later date.
 */

static hal_ks_keydb_t db[1];

#define FLASH_SECTOR_1_OFFSET	(0 * KEYSTORE_SECTOR_SIZE)
#define FLASH_SECTOR_2_OFFSET	(1 * KEYSTORE_SECTOR_SIZE)

uint32_t _active_sector_offset()
{
    /* XXX Load status bytes from both sectors and decide which is current. */
    #warning Have not implemented two flash sectors yet
    return FLASH_SECTOR_1_OFFSET;
}

uint32_t _get_key_offset(uint32_t num)
{
    /* Reserve first two pages for flash sector state, PINs and future additions.
     * The three PINs alone currently occupy 3 * (64 + 16 + 4) bytes (252).
     */
    uint32_t offset = KEYSTORE_PAGE_SIZE * 2;
    uint32_t key_size = sizeof(*db->keys);
    uint32_t bytes_per_key = KEYSTORE_PAGE_SIZE * ((key_size / KEYSTORE_PAGE_SIZE) + 1);
    offset += num * bytes_per_key;
    return offset;
}

const hal_ks_keydb_t *hal_ks_get_keydb(void)
{
    uint32_t offset, i, idx = 0, active_sector_offset;
    hal_ks_key_t *key;
    uint8_t page_buf[KEYSTORE_PAGE_SIZE];

    memset(db, 0, sizeof(*db));

    if (keystore_check_id() != 1) return NULL;

    active_sector_offset = _active_sector_offset();

    /* The PINs are in the second page of the sector. */
    offset = active_sector_offset + KEYSTORE_PAGE_SIZE;
    if (keystore_read_data(offset, page_buf, sizeof(page_buf)) != 1) return NULL;
    offset = 0;
    memcpy(&db->wheel_pin, page_buf + offset, sizeof(db->wheel_pin));
    offset += sizeof(db->wheel_pin);
    memcpy(&db->so_pin, page_buf + offset, sizeof(db->so_pin));
    offset += sizeof(db->so_pin);
    memcpy(&db->user_pin, page_buf + offset, sizeof(db->user_pin));

    for (i = 0; i < sizeof(db->keys) / sizeof(*db->keys); i++) {
        offset = _get_key_offset(i);
        if (offset > KEYSTORE_SECTOR_SIZE) {
            idx++;
            continue;
        }

        offset += active_sector_offset;

        if (keystore_read_data(offset, page_buf, sizeof(page_buf)) != 1) return NULL;

        key = (hal_ks_key_t *) page_buf;
        if (key->in_use == 0xff) {
            /* unprogrammed data */
            idx++;
            continue;
        }

        if (key->in_use == 1) {
            uint8_t *dst = (uint8_t *) &db->keys[idx];
            uint32_t to_read = sizeof(*db->keys);

            /* We already have the first page in page_buf. Put it into place. */
            memcpy(dst, page_buf, sizeof(page_buf));
            to_read -= sizeof(page_buf);
            dst += sizeof(page_buf);

            /* Read as many more full pages as possible */
            if (keystore_read_data (offset + KEYSTORE_PAGE_SIZE, dst, to_read & ~PAGE_SIZE_MASK) != 1) return NULL;
            dst += to_read & ~PAGE_SIZE_MASK;
            to_read &= PAGE_SIZE_MASK;

            if (to_read) {
                /* Partial last page. We can only read full pages so load it into page_buf. */
                if (keystore_read_data(offset + sizeof(*db->keys) - to_read, page_buf, sizeof(page_buf)) != 1) return NULL;
                memcpy(dst, page_buf, to_read);
            }
        }
        idx++;
    }

    return db;
}

hal_error_t _write_data_to_flash(const uint32_t offset, const uint8_t *data, const size_t len)
{
    uint8_t page_buf[KEYSTORE_PAGE_SIZE];
    uint32_t to_write = len;

    if (keystore_write_data(offset, data, to_write & ~PAGE_SIZE_MASK) != 1) {
        return HAL_ERROR_KEYSTORE_ACCESS;
    }
    to_write &= PAGE_SIZE_MASK;
    if (to_write) {
        /* Use page_buf to write the remaining bytes, since we must write a full page each time. */
        memset(page_buf, 0xff, sizeof(page_buf));
        memcpy(page_buf, data + len - to_write, to_write);
        if (keystore_write_data((offset + len) & ~PAGE_SIZE_MASK, page_buf, sizeof(page_buf)) != 1) {
            return HAL_ERROR_KEYSTORE_ACCESS;
        }
    }

    return LIBHAL_OK;
}

/*
 * Write the full DB to flash, PINs and all.
 */
hal_error_t _write_db_to_flash(const uint32_t sector_offset)
{
    hal_error_t status;
    uint8_t page_buf[KEYSTORE_PAGE_SIZE];
    uint32_t i, offset;

    if (sizeof(db->wheel_pin) + sizeof(db->so_pin) + sizeof(db->user_pin) > sizeof(page_buf)) {
        return HAL_ERROR_BAD_ARGUMENTS;
    }

    /* Put the three PINs into page_buf */
    offset = 0;
    memcpy(page_buf + offset, &db->wheel_pin, sizeof(db->wheel_pin));
    offset += sizeof(db->wheel_pin);
    memcpy(page_buf + offset, &db->so_pin, sizeof(db->so_pin));
    offset += sizeof(db->so_pin);
    memcpy(page_buf + offset, &db->user_pin, sizeof(db->user_pin));

    /* Write PINs into the second of the two reserved pages at the start of the sector. */
    offset = sector_offset + KEYSTORE_PAGE_SIZE;
    if ((status = _write_data_to_flash(offset, page_buf, sizeof(page_buf))) != LIBHAL_OK) {
        return status;
    }

    for (i = 0; i < sizeof(db->keys) / sizeof(*db->keys); i++) {
        offset = _get_key_offset(i);
        if (offset > KEYSTORE_SECTOR_SIZE) {
            return HAL_ERROR_BAD_ARGUMENTS;
        }

        offset += sector_offset;

        if ((status =_write_data_to_flash(offset, (uint8_t *) &db->keys[i], sizeof(*db->keys))) != LIBHAL_OK) {
            return status;
        }
    }

    return LIBHAL_OK;
}

hal_error_t hal_ks_set_keydb(const hal_ks_key_t * const key,
                             const int loc,
                             const int updating)
{
    hal_error_t status;
    uint32_t offset, active_sector_offset;
    hal_ks_key_t *tmp_key;
    uint8_t page_buf[KEYSTORE_PAGE_SIZE];

    if (key == NULL || loc < 0 || loc >= sizeof(db->keys)/sizeof(*db->keys) || (!key->in_use != !updating))
        return HAL_ERROR_BAD_ARGUMENTS;

    offset = _get_key_offset(loc);
    if (offset > KEYSTORE_SECTOR_SIZE) return HAL_ERROR_BAD_ARGUMENTS;

    active_sector_offset = _active_sector_offset();

    offset += active_sector_offset;

    if (keystore_check_id() != 1) return HAL_ERROR_KEYSTORE_ACCESS;

    /* Check if there is a key occupying this slot in the flash already.
     * Don't trust the in-memory representation since it would mean data
     * corruption in flash if it had been altered.
     */
    if (keystore_read_data(offset, page_buf, sizeof(page_buf)) != 1) {
        return HAL_ERROR_KEYSTORE_ACCESS;
    }
    tmp_key = (hal_ks_key_t *) page_buf;

    db->keys[loc] = *key;
    db->keys[loc].in_use = 1;

    if (tmp_key->in_use == 0xff) {
        /* Key slot was unused in flash. Write the new key there. */
        if ((status = _write_data_to_flash(offset, (uint8_t *) key, sizeof(*db->keys))) != LIBHAL_OK) {
            return status;
        }
    } else {
        /* TODO: Erase and write the database to the inactive sector, and then toggle active sector. */
        if (keystore_erase_sectors(active_sector_offset / KEYSTORE_SECTOR_SIZE,
                                   active_sector_offset / KEYSTORE_SECTOR_SIZE) != 1) {
            return HAL_ERROR_KEYSTORE_ACCESS;
        }
        if ((status =_write_db_to_flash(active_sector_offset)) != LIBHAL_OK) {
            return status;
        }
    }

    return LIBHAL_OK;
}

hal_error_t hal_ks_del_keydb(const int loc)
{
    uint32_t offset;

  if (loc < 0 || loc >= sizeof(db->keys)/sizeof(*db->keys))
    return HAL_ERROR_BAD_ARGUMENTS;

  offset = _get_key_offset(loc);
  if (offset > KEYSTORE_SECTOR_SIZE) {
      return HAL_ERROR_BAD_ARGUMENTS;
  }

  offset += _active_sector_offset();

  memset(&db->keys[loc], 0, sizeof(*db->keys));

  /* Setting bits to 0 never requires erasing flash. Just write it. */
  return _write_data_to_flash(offset, (uint8_t *) &db->keys[loc], sizeof(*db->keys));
}

hal_error_t hal_ks_set_pin(const hal_user_t user,
                           const hal_ks_pin_t * const pin)
{
  uint32_t active_sector_offset;

  if (pin == NULL)
    return HAL_ERROR_BAD_ARGUMENTS;

  hal_ks_pin_t *p = NULL;

  switch (user) {
  case HAL_USER_WHEEL:  p = &db->wheel_pin;  break;
  case HAL_USER_SO:	p = &db->so_pin;     break;
  case HAL_USER_NORMAL:	p = &db->user_pin;   break;
  default:		return HAL_ERROR_BAD_ARGUMENTS;
  }

  memcpy(p, pin, sizeof(*p));

  active_sector_offset = _active_sector_offset();

  /* TODO: Could check if the PIN is currently all 0xff, in which case we wouldn't have to
   * erase and re-write the whole DB.
   */

  /* TODO: Erase and write the database to the inactive sector, and then toggle active sector. */
  if (keystore_erase_sectors(active_sector_offset / KEYSTORE_SECTOR_SIZE,
                             active_sector_offset / KEYSTORE_SECTOR_SIZE) != 1) {
      return HAL_ERROR_KEYSTORE_ACCESS;
  }
  return _write_db_to_flash(active_sector_offset);
}


hal_error_t hal_ks_get_kek(uint8_t *kek,
                           size_t *kek_len,
                           const size_t kek_max)
{
  if (kek == NULL || kek_len == NULL || kek_max < bitsToBytes(128))
    return HAL_ERROR_BAD_ARGUMENTS;

  const size_t len = ((kek_max < bitsToBytes(192)) ? bitsToBytes(128) :
                      (kek_max < bitsToBytes(256)) ? bitsToBytes(192) :
                      bitsToBytes(256));

  if (masterkey_volatile_read(kek, len) == LIBHAL_OK) {
      *kek_len = len;
      return LIBHAL_OK;
  }
  if (masterkey_flash_read(kek, len) == LIBHAL_OK) {
      *kek_len = len;
      return LIBHAL_OK;
  }

  return HAL_ERROR_KEYSTORE_ACCESS;
}



/*
 * Local variables:
 * indent-tabs-mode: nil
 * End:
 */