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/*
 * hal_io_fmc.c
 * ------------
 * This module contains common code to talk to the FPGA over the FMC bus.
 *
 * Author: Paul Selkirk
 * Copyright (c) 2014-2016, NORDUnet A/S All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 *
 * - Neither the name of the NORDUnet nor the names of its contributors may
 *   be used to endorse or promote products derived from this software
 *   without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <stdio.h>
#include <stdint.h>

#include "stm-fmc.h"

/* stm32f4xx_hal_def.h and hal.h both define HAL_OK as an enum value */
#define HAL_OK HAL_OKAY

#include "hal.h"
#include "hal_internal.h"

static int debug = 0;
static int inited = 0;

#ifndef FMC_IO_TIMEOUT
#define FMC_IO_TIMEOUT  100000000
#endif

static hal_error_t init(void)
{
  if (!inited) {
    fmc_init();
    inited = 1;
  }
  return HAL_OK;
}

/* Translate cryptech register number to FMC address.
 */
static hal_addr_t fmc_offset(hal_addr_t offset)
{
  return offset << 2;
}

void hal_io_set_debug(int onoff)
{
  debug = onoff;
}

static void dump(char *label, hal_addr_t offset, const uint8_t *buf, size_t len)
{
  if (debug) {
    size_t i;
    printf("%s %04x [", label, (unsigned int)offset);
    for (i = 0; i < len; ++i)
      printf(" %02x", buf[i]);
    printf(" ]\n");
  }
}

hal_error_t hal_io_write(const hal_core_t *core, hal_addr_t offset, const uint8_t *buf, size_t len)
{
  hal_error_t err;

  if (core == NULL)
    return HAL_ERROR_CORE_NOT_FOUND;

  if (len % 4 != 0)
    return HAL_ERROR_IO_BAD_COUNT;

  if ((err = init()) != HAL_OK)
    return err;

  dump("write ", offset + hal_core_base(core), buf, len);

  offset = fmc_offset(offset + hal_core_base(core));
  for (; len > 0; offset += 4, buf += 4, len -= 4) {
    uint32_t val;
    val = htonl(*(uint32_t *)buf);
    fmc_write_32(offset, &val);
  }

  return HAL_OK;
}

hal_error_t hal_io_read(const hal_core_t *core, hal_addr_t offset, uint8_t *buf, size_t len)
{
  uint8_t *rbuf = buf;
  int rlen = len;
  hal_addr_t orig_offset = offset;
  hal_error_t err;

  if (core == NULL)
    return HAL_ERROR_CORE_NOT_FOUND;

  if (len % 4 != 0)
    return HAL_ERROR_IO_BAD_COUNT;

  if ((err = init()) != HAL_OK)
    return err;

  offset = fmc_offset(offset + hal_core_base(core));
  for (; rlen > 0; offset += 4, rbuf += 4, rlen -= 4) {
    uint32_t val;
    fmc_read_32(offset, &val);
    *(uint32_t *)rbuf = ntohl(val);
  }

  dump("read  ", orig_offset + hal_core_base(core), buf, len);

  return HAL_OK;
}

hal_error_t hal_io_init(const hal_core_t *core)
{
  uint8_t buf[4] = { 0, 0, 0, CTRL_INIT };
  return hal_io_write(core, ADDR_CTRL, buf, sizeof(buf));
}

hal_error_t hal_io_next(const hal_core_t *core)
{
  uint8_t buf[4] = { 0, 0, 0, CTRL_NEXT };
  return hal_io_write(core, ADDR_CTRL, buf, sizeof(buf));
}

hal_error_t hal_io_wait(const hal_core_t *core, uint8_t status, int *count)
{
  hal_error_t err;
  uint8_t buf[4];
  int i;

  for (i = 1; ; ++i) {

    if (count && (*count > 0) && (i >= *count))
      return HAL_ERROR_IO_TIMEOUT;

    if ((err = hal_io_read(core, ADDR_STATUS, buf, sizeof(buf))) != HAL_OK)
      return err;

    if ((buf[3] & status) != 0) {
      if (count)
        *count = i;
      return HAL_OK;
    }
  }
}

hal_error_t hal_io_wait_ready(const hal_core_t *core)
{
  int limit = FMC_IO_TIMEOUT;
  return hal_io_wait(core, STATUS_READY, &limit);
}

hal_error_t hal_io_wait_valid(const hal_core_t *core)
{
  int limit = FMC_IO_TIMEOUT;
  return hal_io_wait(core, STATUS_VALID, &limit);
}

/*
 * Local variables:
 * indent-tabs-mode: nil
 * c-basic-offset: 2
 * End:
 */
n> To minimize the consumption In Stop mode, FLASH can be powered off before entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function. It can be switched on again by software after exiting the Stop mode using the HAL_PWREx_DisableFlashPowerDown() function. (+) Entry: The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON) function with: (++) Main regulator ON. (++) Low Power regulator ON. (+) Exit: Any EXTI Line (Internal or External) configured in Interrupt/Event mode. *** Standby mode *** ==================== [..] (+) The Standby mode allows to achieve the lowest power consumption. It is based on the Cortex-M4 deep sleep mode, with the voltage regulator disabled. The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and the HSE oscillator are also switched off. SRAM and register contents are lost except for the RTC registers, RTC backup registers, backup SRAM and Standby circuitry. The voltage regulator is OFF. (++) Entry: (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. (++) Exit: (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up, tamper event, time-stamp event, external reset in NRST pin, IWDG reset. *** Auto-wake-up (AWU) from low-power mode *** ============================================= [..] (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC Wake-up event, a tamper event or a time-stamp event, without depending on an external interrupt (Auto-wake-up mode). (+) RTC auto-wake-up (AWU) from the Stop and Standby modes (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it is necessary to configure the RTC to detect the tamper or time stamp event using the HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions. (++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTimer_IT() function. @endverbatim * @{ */ /** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration * information for the PVD. * @note Refer to the electrical characteristics of your device datasheet for * more details about the voltage threshold corresponding to each * detection level. * @retval None */ void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) { /* Check the parameters */ assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); /* Set PLS[7:5] bits according to PVDLevel value */ MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); /* Clear any previous config. Keep it clear if no event or IT mode is selected */ __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); __HAL_PWR_PVD_EXTI_DISABLE_IT(); __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); /* Configure interrupt mode */ if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) { __HAL_PWR_PVD_EXTI_ENABLE_IT(); } /* Configure event mode */ if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) { __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); } /* Configure the edge */ if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) { __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); } if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) { __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); } } /** * @brief Enables the Power Voltage Detector(PVD). * @retval None */ void HAL_PWR_EnablePVD(void) { *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE; } /** * @brief Disables the Power Voltage Detector(PVD). * @retval None */ void HAL_PWR_DisablePVD(void) { *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE; } /** * @brief Enables the Wake-up PINx functionality. * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable. * This parameter can be one of the following values: * @arg PWR_WAKEUP_PIN1 * @arg PWR_WAKEUP_PIN2 only available in case of STM32F446xx devices * @retval None */ void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) { /* Check the parameter */ assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); /* Enable the wake up pin */ SET_BIT(PWR->CSR, WakeUpPinx); } /** * @brief Disables the Wake-up PINx functionality. * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable. * This parameter can be one of the following values: * @arg PWR_WAKEUP_PIN1 * @arg PWR_WAKEUP_PIN2 only available in case of STM32F446xx devices * @retval None */ void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) { /* Check the parameter */ assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); /* Disable the wake up pin */ CLEAR_BIT(PWR->CSR, WakeUpPinx); } /** * @brief Enters Sleep mode. * * @note In Sleep mode, all I/O pins keep the same state as in Run mode. * * @note In Sleep mode, the systick is stopped to avoid exit from this mode with * systick interrupt when used as time base for Timeout * * @param Regulator: Specifies the regulator state in SLEEP mode. * This parameter can be one of the following values: * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON * @note This parameter is not used for the STM32F4 family and is kept as parameter * just to maintain compatibility with the lower power families. * @param SLEEPEntry: Specifies if SLEEP mode in entered with WFI or WFE instruction. * This parameter can be one of the following values: * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction * @retval None */ void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) { /* Check the parameters */ assert_param(IS_PWR_REGULATOR(Regulator)); assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); /* Clear SLEEPDEEP bit of Cortex System Control Register */ CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); /* Select SLEEP mode entry -------------------------------------------------*/ if(SLEEPEntry == PWR_SLEEPENTRY_WFI) { /* Request Wait For Interrupt */ __WFI(); } else { /* Request Wait For Event */ __SEV(); __WFE(); __WFE(); } } /** * @brief Enters Stop mode. * @note In Stop mode, all I/O pins keep the same state as in Run mode. * @note When exiting Stop mode by issuing an interrupt or a wake-up event, * the HSI RC oscillator is selected as system clock. * @note When the voltage regulator operates in low power mode, an additional * startup delay is incurred when waking up from Stop mode. * By keeping the internal regulator ON during Stop mode, the consumption * is higher although the startup time is reduced. * @param Regulator: Specifies the regulator state in Stop mode. * This parameter can be one of the following values: * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction. * This parameter can be one of the following values: * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction * @retval None */ void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) { /* Check the parameters */ assert_param(IS_PWR_REGULATOR(Regulator)); assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); /* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator value */ MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator); /* Set SLEEPDEEP bit of Cortex System Control Register */ SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); /* Select Stop mode entry --------------------------------------------------*/ if(STOPEntry == PWR_STOPENTRY_WFI) { /* Request Wait For Interrupt */ __WFI(); } else { /* Request Wait For Event */ __SEV(); __WFE(); __WFE(); } /* Reset SLEEPDEEP bit of Cortex System Control Register */ CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); } /** * @brief Enters Standby mode. * @note In Standby mode, all I/O pins are high impedance except for: * - Reset pad (still available) * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC * Alarm out, or RTC clock calibration out. * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp. * - WKUP pin 1 (PA0) if enabled. * @retval None */ void HAL_PWR_EnterSTANDBYMode(void) { /* Select Standby mode */ SET_BIT(PWR->CR, PWR_CR_PDDS); /* Set SLEEPDEEP bit of Cortex System Control Register */ SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); /* This option is used to ensure that store operations are completed */ #if defined ( __CC_ARM) __force_stores(); #endif /* Request Wait For Interrupt */ __WFI(); } /** * @brief This function handles the PWR PVD interrupt request. * @note This API should be called under the PVD_IRQHandler(). * @retval None */ void HAL_PWR_PVD_IRQHandler(void) { /* Check PWR Exti flag */ if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) { /* PWR PVD interrupt user callback */ HAL_PWR_PVDCallback(); /* Clear PWR Exti pending bit */ __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); } } /** * @brief PWR PVD interrupt callback * @retval None */ __weak void HAL_PWR_PVDCallback(void) { /* NOTE : This function Should not be modified, when the callback is needed, the HAL_PWR_PVDCallback could be implemented in the user file */ } /** * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor * re-enters SLEEP mode when an interruption handling is over. * Setting this bit is useful when the processor is expected to run only on * interruptions handling. * @retval None */ void HAL_PWR_EnableSleepOnExit(void) { /* Set SLEEPONEXIT bit of Cortex System Control Register */ SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); } /** * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor * re-enters SLEEP mode when an interruption handling is over. * @retval None */ void HAL_PWR_DisableSleepOnExit(void) { /* Clear SLEEPONEXIT bit of Cortex System Control Register */ CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); } /** * @brief Enables CORTEX M4 SEVONPEND bit. * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes * WFE to wake up when an interrupt moves from inactive to pended. * @retval None */ void HAL_PWR_EnableSEVOnPend(void) { /* Set SEVONPEND bit of Cortex System Control Register */ SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); } /** * @brief Disables CORTEX M4 SEVONPEND bit. * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes * WFE to wake up when an interrupt moves from inactive to pended. * @retval None */ void HAL_PWR_DisableSEVOnPend(void) { /* Clear SEVONPEND bit of Cortex System Control Register */ CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); } /** * @} */ /** * @} */ #endif /* HAL_PWR_MODULE_ENABLED */ /** * @} */ /** * @} */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/