#!/usr/bin/env python """ Securely back up private keys from one Cryptech HSM to another. This works by having the destination HSM (the one importing keys) create an RSA keypair (the "KEKEK"), the public key of which can then be imported into the source HSM (the one exporting keys) and used to encrypt AES key encryption keys (KEKs) which in turn can be used to wrap the private keys being transfered. Transfers are encoded in JSON; the underlying ASN.1 formats are SubjectPublicKeyInfo (KEKEK public key) and PKCS #8 EncryptedPrivateKeyInfo (everything else). NOTE WELL: while this process makes it POSSIBLE to back up keys securely, it is not sufficient by itself: the operator MUST make sure only to export keys using a KEKEK known to have been generated by the target HSM. See the unit tests in the source repository for an example of how to fake this in a few lines of Python. We also implement a software-based variant on this backup mechanism, for cases where there is no second HSM. The protocol is much the same, but the KEKEK is generated in software and encrypted using a symmetric key derived from a passphrase using PBKDF2. This requires the PyCrypto library, and is only as secure as memory on the machine where you're running it (so it's theoretically vulnerable to root or anybody with access to /dev/mem). Don't use this mode unless you understand the risks, and see the "NOTE WELL" above. YOU HAVE BEEN WARNED. Be careful out there. """ # Diagram of the trivial protocol we're using: # # SOURCE HSM DESTINATION HSM # # Generate and export KEKEK: # hal_rpc_pkey_generate_rsa() # hal_rpc_pkey_get_public_key() # # Load KEKEK public <--------- Export KEKEK public # hal_rpc_pkey_load() # hal_rpc_pkey_export() # # Export PKCS #8 and KEK ----------> Load PKCS #8 and KEK, import key # hal_rpc_pkey_import() import sys import json import uuid import atexit import getpass import argparse from cryptech.libhal import * def main(): parser = argparse.ArgumentParser( formatter_class = argparse.RawDescriptionHelpFormatter, description = __doc__) subparsers = parser.add_subparsers( title = "Commands (use \"--help\" after command name for help with individual commands)", metavar = "") setup_parser = defcmd(subparsers, cmd_setup) export_parser = defcmd(subparsers, cmd_export) import_parser = defcmd(subparsers, cmd_import) setup_mutex_group = setup_parser.add_mutually_exclusive_group() parser.add_argument( "-p", "--pin", help = "wheel PIN") setup_mutex_group.add_argument( "-n", "--new", action = "store_true", help = "force creation of new KEKEK") setup_mutex_group.add_argument( "-u", "--uuid", help = "UUID of existing KEKEK to use") setup_mutex_group.add_argument( "-s", "--soft-backup", action = "store_true", help = "software-based backup, see warnings") setup_parser.add_argument( "-k", "--keylen", type = int, default = 2048, help = "length of new KEKEK if we need to create one") setup_parser.add_argument( "-o", "--output", type = argparse.FileType("w"), default = "-", help = "output file") export_parser.add_argument( "-i", "--input", type = argparse.FileType("r"), default = "-", help = "input file") export_parser.add_argument( "-o", "--output", type = argparse.FileType("w"), default = "-", help = "output file") import_parser.add_argument( "-i", "--input", type = argparse.FileType("r"), default = "-", help = "input file") args = parser.parse_args() hsm = HSM() try: hsm.login(HAL_USER_WHEEL, args.pin or getpass.getpass("Wheel PIN: ")) except HALError as e: sys.exit("Couldn't log into HSM: {}".format(e)) try: sys.exit(args.func(args, hsm)) finally: hsm.logout() def defcmd(subparsers, func): assert func.__name__.startswith("cmd_") subparser = subparsers.add_parser(func.__name__[4:], description = func.__doc__, help = func.__doc__.strip().splitlines()[0]) subparser.set_defaults(func = func) return subparser def b64(bytes): return bytes.encode("base64").splitlines() def b64join(lines): return "".join(lines).decode("base64") def cmd_setup(args, hsm): """ Set up backup HSM for subsequent import. Generates an RSA keypair with appropriate usage settings to use as a key-encryption-key-encryption-key (KEKEK), and writes the KEKEK to a JSON file for transfer to primary HSM. """ result = {} uuids = [] if args.soft_backup: SoftKEKEK.generate(args, result) elif args.uuid: uuids.append(args.uuid) elif not args.new: uuids.extend(hsm.pkey_match( type = HAL_KEY_TYPE_RSA_PRIVATE, mask = HAL_KEY_FLAG_USAGE_KEYENCIPHERMENT | HAL_KEY_FLAG_TOKEN, flags = HAL_KEY_FLAG_USAGE_KEYENCIPHERMENT | HAL_KEY_FLAG_TOKEN)) for uuid in uuids: with hsm.pkey_open(uuid) as kekek: if kekek.key_type != HAL_KEY_TYPE_RSA_PRIVATE: sys.stderr.write("Key {} is not an RSA private key\n".format(uuid)) elif (kekek.key_flags & HAL_KEY_FLAG_USAGE_KEYENCIPHERMENT) == 0: sys.stderr.write("Key {} does not allow key encipherment\n".format(uuid)) else: result.update(kekek_uuid = str(kekek.uuid), kekek_pubkey = b64(kekek.public_key)) break if not result and not args.uuid: with hsm.pkey_generate_rsa( keylen = args.keylen, flags = HAL_KEY_FLAG_USAGE_KEYENCIPHERMENT | HAL_KEY_FLAG_TOKEN) as kekek: result.update(kekek_uuid = str(kekek.uuid), kekek_pubkey = b64(kekek.public_key)) if not result: sys.exit("Could not find suitable KEKEK") if args.soft_backup: result.update(comment = "KEKEK software keypair") else: result.update(comment = "KEKEK public key") json.dump(result, args.output, indent = 4, sort_keys = True) args.output.write("\n") def key_flag_names(flags): names = dict(digitalsignature = HAL_KEY_FLAG_USAGE_DIGITALSIGNATURE, keyencipherment = HAL_KEY_FLAG_USAGE_KEYENCIPHERMENT, dataencipherment = HAL_KEY_FLAG_USAGE_DATAENCIPHERMENT, token = HAL_KEY_FLAG_TOKEN, public = HAL_KEY_FLAG_PUBLIC, exportable = HAL_KEY_FLAG_EXPORTABLE) return ", ".join(sorted(k for k, v in names.iteritems() if (flags & v) != 0)) def cmd_export(args, hsm): """ Export encrypted keys from primary HSM. Takes a JSON file containing KEKEK (generated by running this script's "setup" command against the backup HSM), installs that key on the primary HSM, and backs up keys encrypted to the KEKEK by writing them to another JSON file for transfer to the backup HSM. """ db = json.load(args.input) result = [] kekek = None try: kekek = hsm.pkey_load(der = b64join(db["kekek_pubkey"]), flags = HAL_KEY_FLAG_USAGE_KEYENCIPHERMENT) for uuid in hsm.pkey_match(mask = HAL_KEY_FLAG_EXPORTABLE, flags = HAL_KEY_FLAG_EXPORTABLE): with hsm.pkey_open(uuid) as pkey: if pkey.key_type in (HAL_KEY_TYPE_RSA_PRIVATE, HAL_KEY_TYPE_EC_PRIVATE): pkcs8, kek = kekek.export_pkey(pkey) result.append(dict( comment = "Encrypted private key", pkcs8 = b64(pkcs8), kek = b64(kek), uuid = str(pkey.uuid), flags = pkey.key_flags)) elif pkey.key_type in (HAL_KEY_TYPE_RSA_PUBLIC, HAL_KEY_TYPE_EC_PUBLIC): result.append(dict( comment = "Public key", spki = b64(pkey.public_key), uuid = str(pkey.uuid), flags = pkey.key_flags)) finally: if kekek is not None: kekek.delete() db.update(comment = "Cryptech Alpha encrypted key backup", keys = result) json.dump(db, args.output, indent = 4, sort_keys = True) args.output.write("\n") def cmd_import(args, hsm): """ Import encrypted keys into backup HSM. Takes a JSON file containing a key backup (generated by running this script's "export" command against the primary HSM) and imports keys into the backup HSM. """ db = json.load(args.input) soft_key = SoftKEKEK.is_soft_key(db) with (hsm.pkey_load(SoftKEKEK.recover(db), HAL_KEY_FLAG_USAGE_KEYENCIPHERMENT) if soft_key else hsm.pkey_open(uuid.UUID(db["kekek_uuid"]).bytes) ) as kekek: for k in db["keys"]: pkcs8 = b64join(k.get("pkcs8", "")) spki = b64join(k.get("spki", "")) kek = b64join(k.get("kek", "")) flags = k.get("flags", 0) if pkcs8 and kek: with kekek.import_pkey(pkcs8 = pkcs8, kek = kek, flags = flags) as pkey: print "Imported {} as {}".format(k["uuid"], pkey.uuid) elif spki: with hsm.pkey_load(der = spki, flags = flags) as pkey: print "Loaded {} as {}".format(k["uuid"], pkey.uuid) if soft_key: kekek.delete() class AESKeyWrapWithPadding(object): """ Implementation of AES Key Wrap With Padding from RFC 5649. """ class UnwrapError(Exception): "Something went wrong during unwrap." def __init__(self, key): from Crypto.Cipher import AES self.ctx = AES.new(key, AES.MODE_ECB) def _encrypt(self, b1, b2): aes_block = self.ctx.encrypt(b1 + b2) return aes_block[:8], aes_block[8:] def _decrypt(self, b1, b2): aes_block = self.ctx.decrypt(b1 + b2) return aes_block[:8], aes_block[8:] @staticmethod def _start_stop(start, stop): # Syntactic sugar step = -1 if start > stop else 1 return xrange(start, stop + step, step) @staticmethod def _xor(R0, t): from struct import pack, unpack return pack(">Q", unpack(">Q", R0)[0] ^ t) def wrap(self, Q): "RFC 5649 section 4.1." from struct import pack m = len(Q) # Plaintext length if m % 8 != 0: # Pad Q if needed Q += "\x00" * (8 - (m % 8)) R = [pack(">LL", 0xa65959a6, m)] # Magic MSB(32,A), build LSB(32,A) R.extend(Q[i : i + 8] # Append Q for i in xrange(0, len(Q), 8)) n = len(R) - 1 if n == 1: R[0], R[1] = self._encrypt(R[0], R[1]) else: # RFC 3394 section 2.2.1 for j in self._start_stop(0, 5): for i in self._start_stop(1, n): R[0], R[i] = self._encrypt(R[0], R[i]) R[0] = self._xor(R[0], n * j + i) assert len(R) == (n + 1) and all(len(r) == 8 for r in R) return "".join(R) def unwrap(self, C): "RFC 5649 section 4.2." from struct import unpack if len(C) % 8 != 0: raise self.UnwrapError("Ciphertext length {} is not an integral number of blocks" .format(len(C))) n = (len(C) / 8) - 1 R = [C[i : i + 8] for i in xrange(0, len(C), 8)] if n == 1: R[0], R[1] = self._decrypt(R[0], R[1]) else: # RFC 3394 section 2.2.2 steps (1), (2), and part of (3) for j in self._start_stop(5, 0): for i in self._start_stop(n, 1): R[0] = self._xor(R[0], n * j + i) R[0], R[i] = self._decrypt(R[0], R[i]) magic, m = unpack(">LL", R[0]) if magic != 0xa65959a6: raise self.UnwrapError("Magic value in AIV should have been 0xa65959a6, was 0x{:02x}" .format(magic)) if m <= 8 * (n - 1) or m > 8 * n: raise self.UnwrapError("Length encoded in AIV out of range: m {}, n {}".format(m, n)) R = "".join(R[1:]) assert len(R) == 8 * n if any(r != "\x00" for r in R[m:]): raise self.UnwrapError("Nonzero trailing bytes {}".format(R[m:].encode("hex"))) return R[:m] class SoftKEKEK(object): """ Wrapper around all the goo we need to implement soft backups. Requires PyCrypto on about every other line. """ oid_aesKeyWrap = "\x60\x86\x48\x01\x65\x03\x04\x01\x30" def parse_EncryptedPrivateKeyInfo(self, der): from Crypto.Util.asn1 import DerObject, DerSequence, DerOctetString, DerObjectId encryptedPrivateKeyInfo = DerSequence() encryptedPrivateKeyInfo.decode(der) encryptionAlgorithm = DerSequence() algorithm = DerObjectId() encryptedData = DerOctetString() encryptionAlgorithm.decode(encryptedPrivateKeyInfo[0]) DerObject.decode(algorithm, encryptionAlgorithm[0]) DerObject.decode(encryptedData, encryptedPrivateKeyInfo[1]) if algorithm.payload != self.oid_aesKeyWrap: raise ValueError return encryptedData.payload def encode_EncryptedPrivateKeyInfo(self, der): from Crypto.Util.asn1 import DerSequence, DerOctetString return DerSequence([ DerSequence([ chr(0x06) + chr(len(self.oid_aesKeyWrap)) + self.oid_aesKeyWrap ]).encode(), DerOctetString(der).encode() ]).encode() def gen_salt(self, bytes = 16): from Crypto import Random return Random.new().read(bytes) def wrapper(self, salt, keylen = 256, iterations = 8000): from Crypto.Protocol.KDF import PBKDF2 from Crypto.Hash import SHA256, HMAC return AESKeyWrapWithPadding(PBKDF2( password = getpass.getpass("KEKEK Passphrase: "), salt = salt, dkLen = keylen/8, count = iterations, prf = lambda p, s: HMAC.new(p, s, SHA256).digest())) @classmethod def is_soft_key(cls, db): return all(k in db for k in ("kekek_pkcs8", "kekek_salt")) @classmethod def generate(cls, args, result): from Crypto.PublicKey import RSA self = cls() k = RSA.generate(args.keylen) salt = self.gen_salt() spki = k.publickey().exportKey(format = "DER") pkcs8 = self.encode_EncryptedPrivateKeyInfo(self.wrapper(salt).wrap( k.exportKey(format = "DER", pkcs = 8))) result.update(kekek_salt = b64(salt), kekek_pkcs8 = b64(pkcs8), kekek_pubkey = b64(spki)) @classmethod def recover(cls, db): self = cls() return self.wrapper(b64join(db["kekek_salt"])).unwrap( self.parse_EncryptedPrivateKeyInfo(b64join(db["kekek_pkcs8"]))) if __name__ == "__main__": main() 7 388 389 390 391 392 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//======================================================================
//
// tb_keywrap.v
// ------------
// Testbench for the keywrap top level wrapper (and core).
//
//
// Author: Joachim Strombergson
// Copyright (c) 2018, NORDUnet A/S
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
// - Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// - Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// - Neither the name of the NORDUnet nor the names of its contributors may
// be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
//======================================================================
module tb_keywrap();
parameter DEBUG = 0;
parameter DUMP_TOP = 1;
parameter DUMP_CORE = 1;
parameter DUMP_TIMEOUT = 1;
parameter CLK_HALF_PERIOD = 1;
parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD;
parameter ADDR_BITS = 13;
parameter MEM_BASE = {1'h1, {(ADDR_BITS - 1){1'h0}}};
// API for the core.
localparam ADDR_NAME0 = 8'h00;
localparam ADDR_NAME1 = 8'h01;
localparam ADDR_VERSION = 8'h02;
localparam ADDR_CTRL = 8'h08;
localparam CTRL_INIT_BIT = 0;
localparam CTRL_NEXT_BIT = 1;
localparam CTRL_ZEROISE_BIT = 2;
localparam ADDR_STATUS = 8'h09;
localparam STATUS_READY_BIT = 0;
localparam STATUS_VALID_BIT = 1;
localparam STATUS_LOADED_BIT = 2;
localparam ADDR_CONFIG = 8'h0a;
localparam CTRL_ENCDEC_BIT = 0;
localparam CTRL_KEYLEN_BIT = 1;
localparam ADDR_TIMEOUT = 8'h0b;
localparam ADDR_RLEN = 8'h0c;
localparam ADDR_R_BANK = 8'h0d;
localparam ADDR_A0 = 8'h0e;
localparam ADDR_A1 = 8'h0f;
localparam ADDR_KEY0 = 8'h10;
localparam ADDR_KEY1 = 8'h11;
localparam ADDR_KEY2 = 8'h12;
localparam ADDR_KEY3 = 8'h13;
localparam ADDR_KEY4 = 8'h14;
localparam ADDR_KEY5 = 8'h15;
localparam ADDR_KEY6 = 8'h16;
localparam ADDR_KEY7 = 8'h17;
localparam ADDR_R_DATA0 = 8'h80;
localparam ADDR_R_DATA127 = 8'hff;
//----------------------------------------------------------------
// Register and Wire declarations.
//----------------------------------------------------------------
reg [31 : 0] cycle_ctr;
reg [31 : 0] error_ctr;
reg [31 : 0] tc_ctr;
reg [31 : 0] read_data;
reg [127 : 0] result_data;
reg tb_clk;
reg tb_reset_n;
wire tb_mkm_spi_sclk;
wire tb_mkm_spi_cs_n;
reg tb_mkm_spi_do;
wire tb_mkm_spi_di;
reg tb_cs;
reg tb_we;
reg [(ADDR_BITS -1 ) : 0] tb_address;
reg [31 : 0] tb_write_data;
wire [31 : 0] tb_read_data;
wire tb_error;
//----------------------------------------------------------------
// Device Under Test.
//----------------------------------------------------------------
keywrap dut(
.clk(tb_clk),
.reset_n(tb_reset_n),
.mkm_spi_sclk(tb_mkm_spi_sclk),
.mkm_spi_cs_n(tb_mkm_spi_cs_n),
.mkm_spi_do(tb_mkm_spi_do),
.mkm_spi_di(tb_mkm_spi_di),
.cs(tb_cs),
.we(tb_we),
.address(tb_address),
.write_data(tb_write_data),
.read_data(tb_read_data),
.error(tb_error)
);
//----------------------------------------------------------------
// clk_gen
//
// Always running clock generator process.
//----------------------------------------------------------------
always
begin : clk_gen
#CLK_HALF_PERIOD;
tb_clk = !tb_clk;
end // clk_gen
//----------------------------------------------------------------
// sys_monitor()
//
// An always running process that creates a cycle counter and
// conditionally displays information about the DUT.
//----------------------------------------------------------------
always
begin : sys_monitor
cycle_ctr = cycle_ctr + 1;
if (DEBUG)
dump_dut_state();
#(CLK_PERIOD);
end
//----------------------------------------------------------------
// read_word()
//
// Read a data word from the given address in the DUT.
// the word read will be available in the global variable
// read_data.
//----------------------------------------------------------------
task read_word(input [(ADDR_BITS - 1) : 0] address);
begin
tb_address = address;
tb_cs = 1;
tb_we = 0;
#(CLK_PERIOD);
read_data = tb_read_data;
tb_cs = 0;
if (DEBUG)
begin
$display("*** Reading 0x%08x from 0x%02x.", read_data, address);
$display("");
end
end
endtask // read_word
//----------------------------------------------------------------
// write_word()
//
// Write the given word to the DUT using the DUT interface.
//----------------------------------------------------------------
task write_word(input [(ADDR_BITS - 1) : 0] address,
input [31 : 0] word);
begin
if (DEBUG)
begin
$display("*** Writing 0x%08x to 0x%02x.", word, address);
$display("");
end
tb_address = address;
tb_write_data = word;
tb_cs = 1;
tb_we = 1;
#(1 * CLK_PERIOD);
tb_cs = 0;
tb_we = 0;
end
endtask // write_word
//----------------------------------------------------------------
// wait_ready
//
// Wait for the DUT to signal that the result is ready
//----------------------------------------------------------------
task wait_ready;
begin : wait_ready
reg rdy;
rdy = 1'b0;
while (rdy != 1'b1)
begin
read_word(ADDR_STATUS);
rdy = tb_read_data[STATUS_READY_BIT];
end
end
endtask // wait_ready
//----------------------------------------------------------------
// dump_mem()
//
// Dump the n first memory positions in the dut internal memory.
//----------------------------------------------------------------
task dump_mem(input integer n);
begin : dump_mem
integer i;
for (i = 0 ; i < n ; i = i + 1)
$display("mem0[0x%06x] = 0x%08x mem1[0x%06x] = 0x%08x",
i, dut.core.mem.mem0[i], i, dut.core.mem.mem1[i]);
$display("");
end
endtask // dump_mem
//----------------------------------------------------------------
// dump_dut_state()
//
// Dump the state of the dump when needed.
//----------------------------------------------------------------
task dump_dut_state;
begin
$display("cycle: 0x%016x", cycle_ctr);
$display("State of DUT");
$display("------------");
if (DUMP_TOP)
begin
$display("top level state:");
$display("init_reg = 0x%x next_reg = 0x%x", dut.init_reg, dut.next_reg);
$display("endec_reg = 0x%x keylen_reg = 0x%x", dut.encdec_reg, dut.keylen_reg);
$display("rlen_reg = 0x%08x", dut.rlen_reg);
$display("a0_reg = 0x%08x a1_reg = 0x%08x", dut.a0_reg, dut.a1_reg);
$display("");
end
if (DUMP_CORE)
begin
$display("core level state:");
$display("init = 0x%0x next = 0x%0x ready = 0x%0x valid = 0x%0x",
dut.core.init, dut.core.next, dut.core.ready, dut.core.valid);
$display("api_we = 0x%0x api_addr = 0x%0x api_wr_data = 0x%0x api_rd_data = 0x%0x",
dut.core.api_we, dut.core.api_addr, dut.core.api_wr_data, dut.core.api_rd_data);
$display("rlen = 0x%0x", dut.core.rlen);
$display("key = 0x%0x", dut.core.key);
$display("a_init = 0x%0x a_result = 0x%0x", dut.core.a_init, dut.core.a_result);
$display("");
$display("update_state = 0x%0x", dut.core.update_state);
$display("a_reg = 0x%0x a_new = 0x%0x a_we = 0x%0x",
dut.core.a_reg, dut.core.a_new, dut.core.a_we);
$display("core_we = 0x%0x core_addr = 0x%0x",
dut.core.core_we, dut.core.core_addr);
$display("core_rd_data = 0x%0x core_wr_data = 0x%0x ",
dut.core.core_rd_data, dut.core.core_wr_data);
$display("xor_val = 0x%0x", dut.core.keywrap_logic.xor_val);
$display("");
$display("aes_ready = 0x%0x aes_valid = 0x%0x",
dut.core.aes_ready, dut.core.aes_valid);
$display("aes_init = 0x%0x aes_next = 0x%0x",
dut.core.aes_init, dut.core.aes_next);
$display("aes_block = 0x%0x aes_result = 0x%0x",
dut.core.aes_block, dut.core.aes_result);
$display("");
$display("block_ctr_reg = 0x%0x iteration_ctr_reg = 0x%0x",
dut.core.block_ctr_reg, dut.core.iteration_ctr_reg);
$display("keywrap_core_ctrl_reg = 0x%0x", dut.core.keywrap_core_ctrl_reg);
$display("keywrap_core_ctrl_new = 0x%0x", dut.core.keywrap_core_ctrl_new);
$display("keywrap_core_ctrl_we = 0x%0x", dut.core.keywrap_core_ctrl_we);
$display("");
end
if (DUMP_TIMEOUT)
begin
$display("timeout state:");
$display("api_timeout_reg = 0x%04x api_timeout_we = 0x%x", dut.timeout_reg, dut.timeout_we);
$display("timeout_delay = 0x%04x timeout = 0x%x ping = 0x%x zeroise = 0x%x loaded = 0x%x",
dut.core.timeout_delay, dut.core.timeout, dut.core.ping, dut.core.zeroise, dut.core.loaded);
$display("key_timeout_ctr_reg = 0x%04x key_timeout_ctr_new = 0x%04x key_timeout_ctr_we = 0x%x",
dut.core.key_timeout_ctr_reg, dut.core.key_timeout_ctr_new, dut.core.key_timeout_ctr_we);
$display("key_timeout = 0x%x key_timeout_ctr_we = 0x%x key_timeout_ctr_set = 0x%x key_timeout_ctr_dec = 0x%x",
dut.core.key_timeout, dut.core.key_timeout_ctr_we, dut.core.key_timeout_ctr_set, dut.core.key_timeout_ctr_dec);
end
$display("");
$display("");
end
endtask // dump_dut_state
//----------------------------------------------------------------
// display_test_results()
//
// Display the accumulated test results.
//----------------------------------------------------------------
task display_test_results;
begin
if (error_ctr == 0)
begin
$display("*** All %02d test cases completed successfully", tc_ctr);
end
else
begin
$display("*** %02d tests completed - %02d test cases did not complete successfully.",
tc_ctr, error_ctr);
end
end
endtask // display_test_results
//----------------------------------------------------------------
// init_sim()
//
// Initialize all counters and testbed functionality as well
// as setting the DUT inputs to defined values.
//----------------------------------------------------------------
task init_sim;
begin
cycle_ctr = 1'h0;
error_ctr = 1'h0;
tc_ctr = 1'h0;
tb_clk = 1'h0;
tb_reset_n = 1'h1;
tb_mkm_spi_do = 1'h1;
tb_cs = 1'h0;
tb_we = 1'h0;
tb_address = 8'h0;
tb_write_data = 32'h0;
end
endtask // init_sim
//----------------------------------------------------------------
// reset_dut()
//
// Toggle reset to put the DUT into a well known state.
//----------------------------------------------------------------
task reset_dut;
begin
$display("** Toggling reset.");
tb_reset_n = 0;
#(2 * CLK_PERIOD);
tb_reset_n = 1;
$display("");
end
endtask // reset_dut
//----------------------------------------------------------------
// test_core_access
// Simple test that we can perform read access to regs
// in the core.
//----------------------------------------------------------------
task test_core_access;
begin : test_core_access
$display("** TC test_core_access START.");
read_word(ADDR_NAME0);
$display("NAME0: %s", read_data);
read_word(ADDR_NAME1);
$display("NAME1: %s", read_data);
read_word(ADDR_VERSION);
$display("version: %s", read_data);
$display("** TC test_core_access END.");
$display("");
end
endtask // test_core_access
//----------------------------------------------------------------
// test_kwp_ae_128_1
// Implements wrap test based on NIST KWP_AE 128 bit key
// with 248 bit plaintext.
//----------------------------------------------------------------
task test_kwp_ae_128_1;
begin : kwp_ae_128_1
integer i;
integer err;
err = 0;
tc_ctr = tc_ctr + 1;
$display("** TC kwp_ae_128_1 START.");
// Write key and keylength, we also want to encrypt/wrap.
write_word(ADDR_KEY0, 32'hc03db3cc);
write_word(ADDR_KEY1, 32'h1416dcd1);
write_word(ADDR_KEY2, 32'hc069a195);
write_word(ADDR_KEY3, 32'ha8d77e3d);
write_word(ADDR_CONFIG, 32'h00000001);
// Initialize the AES engine (to expand the key).
// Wait for init to complete.
// Note, not actually needed to wait. We can write R data during init.
$display("* Trying to initialize.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Init should be done.");
// Set the length or R in blocks.
// Write the R bank to be written to.
// Write the R blocks to be processed.
write_word(ADDR_RLEN, 32'h00000004);
// Write the data to be wrapped.
write_word(MEM_BASE + 0, 32'h46f87f58);
write_word(MEM_BASE + 1, 32'hcdda4200);
write_word(MEM_BASE + 2, 32'hf53d99ce);
write_word(MEM_BASE + 3, 32'h2e49bdb7);
write_word(MEM_BASE + 4, 32'h6212511f);
write_word(MEM_BASE + 5, 32'he0cd4d0b);
write_word(MEM_BASE + 6, 32'h5f37a27d);
write_word(MEM_BASE + 7, 32'h45a28800);
// Write magic words to A.
write_word(ADDR_A0, 32'ha65959a6);
write_word(ADDR_A1, 32'h0000001f);
$display("* Dumping state and mem after write of data A words, but before wrap processing.");
dump_dut_state();
dump_mem(6);
// Start wrapping and wait for wrap to complete.
$display("* Trying to start processing.");
write_word(ADDR_CTRL, 32'h00000002);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Processing should be done.");
$display("Contents of memory and dut after wrap processing:");
dump_mem(6);
dump_dut_state();
// Read and check the A registers.
read_word(ADDR_A0);
if (read_data != 32'h57e3b669)
begin
$display("Error A0 after wrap: 0x%08x, expected 0x57e3b669", read_data);
err = 1;
end
read_word(ADDR_A1);
if (read_data != 32'h9c6e8177)
begin
$display("Error A1 after wrap: 0x%08x, expected 0x9c6e8177", read_data);
err = 1;
end
if (err)
begin
$display("kwp_ae_128_1 completed with errors.");
error_ctr = error_ctr + 1;
end
else
$display("kwp_ae_128_1 completed successfully.");
$display("** TC kwp_ae_128_1 END.\n");
end
endtask // test_kwp_ae_128_1
//----------------------------------------------------------------
// test_kwp_ad_128_1
// Implements unwrap test based on NIST KWP_AE 128 bit key
// with 248 bit plaintext.
//----------------------------------------------------------------
task test_kwp_ad_128_1;
begin : kwp_ad_128_1
integer i;
integer err;
err = 0;
tc_ctr = tc_ctr + 1;
$display("** TC kwp_ad_128_1 START.");
// Write key and keylength, we also want to decrypt/unwrap.
write_word(ADDR_KEY0, 32'hc03db3cc);
write_word(ADDR_KEY1, 32'h1416dcd1);
write_word(ADDR_KEY2, 32'hc069a195);
write_word(ADDR_KEY3, 32'ha8d77e3d);
write_word(ADDR_CONFIG, 32'h00000000);
// Initialize the AES engine (to expand the key).
// Wait for init to complete.
// Note, not actually needed to wait. We can write R data during init.
$display("* Trying to initialize.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Init should be done.");
// Set the length or R in blocks.
// Write the R bank to be written to.
// Write the R blocks to be processed.
write_word(ADDR_RLEN, 32'h00000004);
write_word(MEM_BASE + 0, 32'h59a69492);
write_word(MEM_BASE + 1, 32'hbb7e2cd0);
write_word(MEM_BASE + 2, 32'h0160d2eb);
write_word(MEM_BASE + 3, 32'hef9bf4d4);
write_word(MEM_BASE + 4, 32'heb16fbf7);
write_word(MEM_BASE + 5, 32'h98f1340f);
write_word(MEM_BASE + 6, 32'h6df6558a);
write_word(MEM_BASE + 7, 32'h4fb84cd0);
// Write magic words to A.
write_word(ADDR_A0, 32'h57e3b669);
write_word(ADDR_A1, 32'h9c6e8177);
$display("* Contents of memory and dut before unwrap processing:");
dump_mem(6);
// Start unwrapping and wait for unwrap to complete.
$display("* Trying to start processing.");
write_word(ADDR_CTRL, 32'h00000002);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Processing should be done.");
$display("Contents of memory and dut after unwrap processing:");
dump_mem(6);
dump_dut_state();
// Read and display the A registers.
read_word(ADDR_A0);
$display("A0 after unwrap: 0x%08x", read_data);
read_word(ADDR_A1);
$display("A1 after unwrap: 0x%08x", read_data);
// Read and display the R blocks that has been processed.
for (i = 0 ; i < 8 ; i = i + 1)
begin
read_word(MEM_BASE + i);
$display("mem[0x%08x] = 0x%08x", i, read_data);
end
// Read and check the A registers.
read_word(ADDR_A0);
if (read_data != 32'ha65959a6)
begin
$display("Error A0 after wrap: 0x%08x, expected 0xa65959a6", read_data);
err = 1;
end
read_word(ADDR_A1);
if (read_data != 32'h0000001f)
begin
$display("Error A1 after wrap: 0x%08x, expected 0x0000001f", read_data);
err = 1;
end
if (err)
begin
$display("kwp_ad_128_1 completed with errors.");
error_ctr = error_ctr + 1;
end
else
$display("kwp_ad_128_1 completed successfully.");
$display("** TC kwp_ad_128_1 END.\n");
end
endtask // test_kwp_ad_128_1
//----------------------------------------------------------------
// test_kwp_ae_128_2
// Implements wrap test based on NIST KWP_AE 128 bit key with
// 4096 bit plaintext.
//----------------------------------------------------------------
task test_kwp_ae_128_2;
begin : kwp_ae_128_2
integer i;
integer err;
err = 0;
tc_ctr = tc_ctr + 1;
$display("** TC kwp_ae_128_2 START.");
// Write key and keylength, we also want to encrypt/wrap.
write_word(ADDR_KEY0, 32'h6b8ba9cc);
write_word(ADDR_KEY1, 32'h9b31068b);
write_word(ADDR_KEY2, 32'ha175abfc);
write_word(ADDR_KEY3, 32'hc60c1338);
write_word(ADDR_CONFIG, 32'h00000001);
// Initialize the AES engine (to expand the key).
// Wait for init to complete.
$display("* Trying to initialize.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Init should be done.");
// Set the length or R in blocks.
// Write the R bank to be written to.
// Write the R blocks to be processed.
write_word(ADDR_RLEN, 32'h00000040);
write_word(MEM_BASE + 0, 32'h8af887c5);
write_word(MEM_BASE + 1, 32'h8dfbc38e);
write_word(MEM_BASE + 2, 32'he0423eef);
write_word(MEM_BASE + 3, 32'hcc0e032d);
write_word(MEM_BASE + 4, 32'hcc79dd11);
write_word(MEM_BASE + 5, 32'h6638ca65);
write_word(MEM_BASE + 6, 32'had75dca2);
write_word(MEM_BASE + 7, 32'ha2459f13);
write_word(MEM_BASE + 8, 32'h934dbe61);
write_word(MEM_BASE + 9, 32'ha62cb26d);
write_word(MEM_BASE + 10, 32'h8bbddbab);
write_word(MEM_BASE + 11, 32'hf9bf52bb);
write_word(MEM_BASE + 12, 32'he137ef1d);
write_word(MEM_BASE + 13, 32'h3e30eacf);
write_word(MEM_BASE + 14, 32'h0fe456ec);
write_word(MEM_BASE + 15, 32'h808d6798);
write_word(MEM_BASE + 16, 32'hdc29fe54);
write_word(MEM_BASE + 17, 32'hfa1f784a);
write_word(MEM_BASE + 18, 32'ha3c11cf3);
write_word(MEM_BASE + 19, 32'h94050095);
write_word(MEM_BASE + 20, 32'h81d3f1d5);
write_word(MEM_BASE + 21, 32'h96843813);
write_word(MEM_BASE + 22, 32'ha6685e50);
write_word(MEM_BASE + 23, 32'h3fac8535);
write_word(MEM_BASE + 24, 32'he0c06ecc);
write_word(MEM_BASE + 25, 32'ha8561b6a);
write_word(MEM_BASE + 26, 32'h1f22c578);
write_word(MEM_BASE + 27, 32'heefb6919);
write_word(MEM_BASE + 28, 32'h12be2e16);
write_word(MEM_BASE + 29, 32'h67946101);
write_word(MEM_BASE + 30, 32'hae8c3501);
write_word(MEM_BASE + 31, 32'he6c66eb1);
write_word(MEM_BASE + 32, 32'h7e14f260);
write_word(MEM_BASE + 33, 32'h8c9ce6fb);
write_word(MEM_BASE + 34, 32'hab4a1597);
write_word(MEM_BASE + 35, 32'hed49ccb3);
write_word(MEM_BASE + 36, 32'h930b1060);
write_word(MEM_BASE + 37, 32'hf98c97d8);
write_word(MEM_BASE + 38, 32'hdc4ce81e);
write_word(MEM_BASE + 39, 32'h35279c4d);
write_word(MEM_BASE + 40, 32'h30d1bf86);
write_word(MEM_BASE + 41, 32'hc9b919a3);
write_word(MEM_BASE + 42, 32'hce4f0109);
write_word(MEM_BASE + 43, 32'he77929e5);
write_word(MEM_BASE + 44, 32'h8c4c3aeb);
write_word(MEM_BASE + 45, 32'h5de1ec5e);
write_word(MEM_BASE + 46, 32'h0afa38ae);
write_word(MEM_BASE + 47, 32'h896df912);
write_word(MEM_BASE + 48, 32'h1c72c255);
write_word(MEM_BASE + 49, 32'h141f2f5c);
write_word(MEM_BASE + 50, 32'h9a51be50);
write_word(MEM_BASE + 51, 32'h72547cf8);
write_word(MEM_BASE + 52, 32'ha3b06740);
write_word(MEM_BASE + 53, 32'h4e62f961);
write_word(MEM_BASE + 54, 32'h5a02479c);
write_word(MEM_BASE + 55, 32'hf8c202e7);
write_word(MEM_BASE + 56, 32'hfeb2e258);
write_word(MEM_BASE + 57, 32'h314e0ebe);
write_word(MEM_BASE + 58, 32'h62878a5c);
write_word(MEM_BASE + 59, 32'h4ecd4e9d);
write_word(MEM_BASE + 60, 32'hf7dab2e1);
write_word(MEM_BASE + 61, 32'hfa9a7b53);
write_word(MEM_BASE + 62, 32'h2c2169ac);
write_word(MEM_BASE + 63, 32'hedb7998d);
write_word(MEM_BASE + 64, 32'h5cd8a711);
write_word(MEM_BASE + 65, 32'h8848ce7e);
write_word(MEM_BASE + 66, 32'he9fb2f68);
write_word(MEM_BASE + 67, 32'he28c2b27);
write_word(MEM_BASE + 68, 32'h9ddc064d);
write_word(MEM_BASE + 69, 32'hb70ad73c);
write_word(MEM_BASE + 70, 32'h6dbe10c5);
write_word(MEM_BASE + 71, 32'he1c56a70);
write_word(MEM_BASE + 72, 32'h9c1407f9);
write_word(MEM_BASE + 73, 32'h3a727cce);
write_word(MEM_BASE + 74, 32'h1075103a);
write_word(MEM_BASE + 75, 32'h4009ae2f);
write_word(MEM_BASE + 76, 32'h7731b7d7);
write_word(MEM_BASE + 77, 32'h1756eee1);
write_word(MEM_BASE + 78, 32'h19b828ef);
write_word(MEM_BASE + 79, 32'h4ed61eff);
write_word(MEM_BASE + 80, 32'h16493553);
write_word(MEM_BASE + 81, 32'h2a94fa8f);
write_word(MEM_BASE + 82, 32'he62dc2e2);
write_word(MEM_BASE + 83, 32'h2cf20f16);
write_word(MEM_BASE + 84, 32'h8ae65f4b);
write_word(MEM_BASE + 85, 32'h6785286c);
write_word(MEM_BASE + 86, 32'h253f365f);
write_word(MEM_BASE + 87, 32'h29453a47);
write_word(MEM_BASE + 88, 32'h9dc2824b);
write_word(MEM_BASE + 89, 32'h8bdabd96);
write_word(MEM_BASE + 90, 32'h2da3b76a);
write_word(MEM_BASE + 91, 32'he9c8a720);
write_word(MEM_BASE + 92, 32'h155e158f);
write_word(MEM_BASE + 93, 32'he389c8cc);
write_word(MEM_BASE + 94, 32'h7fa6ad52);
write_word(MEM_BASE + 95, 32'h2c951b5c);
write_word(MEM_BASE + 96, 32'h236bf964);
write_word(MEM_BASE + 97, 32'hb5b1bfb0);
write_word(MEM_BASE + 98, 32'h98a39835);
write_word(MEM_BASE + 99, 32'h759b9540);
write_word(MEM_BASE + 100, 32'h4b72b17f);
write_word(MEM_BASE + 101, 32'h7dbcda93);
write_word(MEM_BASE + 102, 32'h6177ae05);
write_word(MEM_BASE + 103, 32'h9269f41e);
write_word(MEM_BASE + 104, 32'hcdac81a4);
write_word(MEM_BASE + 105, 32'h9f5bbfd2);
write_word(MEM_BASE + 106, 32'he801392a);
write_word(MEM_BASE + 107, 32'h043ef068);
write_word(MEM_BASE + 108, 32'h73550a67);
write_word(MEM_BASE + 109, 32'hfcbc039f);
write_word(MEM_BASE + 110, 32'h0b5d30ce);
write_word(MEM_BASE + 111, 32'h490baa97);
write_word(MEM_BASE + 112, 32'h9dbbaf9e);
write_word(MEM_BASE + 113, 32'h53d45d7e);
write_word(MEM_BASE + 114, 32'h2dff26b2);
write_word(MEM_BASE + 115, 32'hf7e6628d);
write_word(MEM_BASE + 116, 32'hed694217);
write_word(MEM_BASE + 117, 32'ha39f454b);
write_word(MEM_BASE + 118, 32'h288e7906);
write_word(MEM_BASE + 119, 32'hb79faf4a);
write_word(MEM_BASE + 120, 32'h407a7d20);
write_word(MEM_BASE + 121, 32'h7646f930);
write_word(MEM_BASE + 122, 32'h96a157f0);
write_word(MEM_BASE + 123, 32'hd1dca05a);
write_word(MEM_BASE + 124, 32'h7f92e318);
write_word(MEM_BASE + 125, 32'hfc1ff62c);
write_word(MEM_BASE + 126, 32'he2de7f12);
write_word(MEM_BASE + 127, 32'h9b187053);
// Write magic words to A.
write_word(ADDR_A0, 32'ha65959a6);
write_word(ADDR_A1, 32'h00000200);
$display("* Contents of memory and dut before wrap processing:");
dump_mem(65);
// Start wrapping and wait for wrap to complete.
$display("* Trying to start processing.");
write_word(ADDR_CTRL, 32'h00000002);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Processing should be done.");
$display("Contents of memory and dut after wrap processing:");
dump_mem(65);
dump_dut_state();
// Read and display the A registers.
read_word(ADDR_A0);
$display("A0 after wrap: 0x%08x", read_data);
read_word(ADDR_A1);
$display("A1 after wrap: 0x%08x", read_data);
// Read and display the R blocks that has been processed.
for (i = 0 ; i < 128 ; i = i + 1)
begin
read_word(MEM_BASE + i);
$display("mem[0x%08x] = 0x%08x", i, read_data);
end
// Read and check the A registers.
read_word(ADDR_A0);
if (read_data != 32'haea19443)
begin
$display("Error A0 after wrap: 0x%08x, expected 0xaea19443", read_data);
err = 1;
end
read_word(ADDR_A1);
if (read_data != 32'hd7f8ad7d)
begin
$display("Error A1 after wrap: 0x%08x, expected 0xd7f8ad7d", read_data);
err = 1;
end
if (err)
begin
$display("kwp_ae_128_2 completed with errors.");
error_ctr = error_ctr + 1;
end
else
$display("kwp_ae_128_2 completed successfully.");
$display("** TC kwp_ae_128_2 END.\n");
end
endtask // test_kwp_ae_128_2
//----------------------------------------------------------------
// test_kwp_ad_128_2
// Implements unwrap test based on NIST KWP_AD 128 bit key with
// 4096 bit plaintext.
//----------------------------------------------------------------
task test_kwp_ad_128_2;
begin : kwp_ad_128_2
integer i;
integer err;
err = 0;
tc_ctr = tc_ctr + 1;
$display("** TC kwp_ad_128_2 START.");
// Write key and keylength, we also want to unwrap/decrypt.
write_word(ADDR_KEY0, 32'h6b8ba9cc);
write_word(ADDR_KEY1, 32'h9b31068b);
write_word(ADDR_KEY2, 32'ha175abfc);
write_word(ADDR_KEY3, 32'hc60c1338);
write_word(ADDR_CONFIG, 32'h00000000);
// Initialize the AES engine (to expand the key).
// Wait for init to complete.
$display("* Trying to initialize.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Init should be done.");
// Set the length or R in blocks.
// Write the R bank to be written to.
// Write the R blocks to be processed.
write_word(ADDR_RLEN, 32'h00000040);
write_word(MEM_BASE + 0, 32'h4501c1ec);
write_word(MEM_BASE + 1, 32'hadc6b5e3);
write_word(MEM_BASE + 2, 32'hf1c23c29);
write_word(MEM_BASE + 3, 32'heca60890);
write_word(MEM_BASE + 4, 32'h5f9cabdd);
write_word(MEM_BASE + 5, 32'h46e34a55);
write_word(MEM_BASE + 6, 32'he1f7ac83);
write_word(MEM_BASE + 7, 32'h08e75c90);
write_word(MEM_BASE + 8, 32'h3675982b);
write_word(MEM_BASE + 9, 32'hda99173a);
write_word(MEM_BASE + 10, 32'h2ba57d2c);
write_word(MEM_BASE + 11, 32'hcf2e01a0);
write_word(MEM_BASE + 12, 32'h2589f89d);
write_word(MEM_BASE + 13, 32'hfd4b3c7f);
write_word(MEM_BASE + 14, 32'hd229ec91);
write_word(MEM_BASE + 15, 32'hc9d0c46e);
write_word(MEM_BASE + 16, 32'ha5dee3c0);
write_word(MEM_BASE + 17, 32'h48cd4611);
write_word(MEM_BASE + 18, 32'hbfeadc9b);
write_word(MEM_BASE + 19, 32'hf26daa1e);
write_word(MEM_BASE + 20, 32'h02cb72e2);
write_word(MEM_BASE + 21, 32'h22cf3dab);
write_word(MEM_BASE + 22, 32'h120dd1e8);
write_word(MEM_BASE + 23, 32'hc2dd9bd5);
write_word(MEM_BASE + 24, 32'h8bbefa5d);
write_word(MEM_BASE + 25, 32'h14526abd);
write_word(MEM_BASE + 26, 32'h1e8d2170);
write_word(MEM_BASE + 27, 32'ha6ba8283);
write_word(MEM_BASE + 28, 32'hc243ec2f);
write_word(MEM_BASE + 29, 32'hd5ef0703);
write_word(MEM_BASE + 30, 32'h0b1ef5f6);
write_word(MEM_BASE + 31, 32'h9f9620e4);
write_word(MEM_BASE + 32, 32'hb17a3639);
write_word(MEM_BASE + 33, 32'h34100588);
write_word(MEM_BASE + 34, 32'h7b9ffc79);
write_word(MEM_BASE + 35, 32'h35335947);
write_word(MEM_BASE + 36, 32'h03e5dcae);
write_word(MEM_BASE + 37, 32'h67bd0ce7);
write_word(MEM_BASE + 38, 32'ha3c98ca6);
write_word(MEM_BASE + 39, 32'h5815a4d0);
write_word(MEM_BASE + 40, 32'h67f27e6e);
write_word(MEM_BASE + 41, 32'h66d6636c);
write_word(MEM_BASE + 42, 32'hebb78973);
write_word(MEM_BASE + 43, 32'h2566a52a);
write_word(MEM_BASE + 44, 32'hc3970e14);
write_word(MEM_BASE + 45, 32'hc37310dc);
write_word(MEM_BASE + 46, 32'h2fcee0e7);
write_word(MEM_BASE + 47, 32'h39a16291);
write_word(MEM_BASE + 48, 32'h029fd2b4);
write_word(MEM_BASE + 49, 32'hd534e304);
write_word(MEM_BASE + 50, 32'h45474b26);
write_word(MEM_BASE + 51, 32'h711a8b3e);
write_word(MEM_BASE + 52, 32'h1ee3cc88);
write_word(MEM_BASE + 53, 32'hb09e8b17);
write_word(MEM_BASE + 54, 32'h45b6cc0f);
write_word(MEM_BASE + 55, 32'h067624ec);
write_word(MEM_BASE + 56, 32'hb232db75);
write_word(MEM_BASE + 57, 32'h0b01fe54);
write_word(MEM_BASE + 58, 32'h57fdea77);
write_word(MEM_BASE + 59, 32'hb251b10f);
write_word(MEM_BASE + 60, 32'he95d3eee);
write_word(MEM_BASE + 61, 32'hdb083bdf);
write_word(MEM_BASE + 62, 32'h109c41db);
write_word(MEM_BASE + 63, 32'ha26cc965);
write_word(MEM_BASE + 64, 32'h4f787bf9);
write_word(MEM_BASE + 65, 32'h5735ff07);
write_word(MEM_BASE + 66, 32'h070b175c);
write_word(MEM_BASE + 67, 32'hea8b6230);
write_word(MEM_BASE + 68, 32'h2e6087b9);
write_word(MEM_BASE + 69, 32'h1a041547);
write_word(MEM_BASE + 70, 32'h46056910);
write_word(MEM_BASE + 71, 32'h99f1a9e2);
write_word(MEM_BASE + 72, 32'hb626c4b3);
write_word(MEM_BASE + 73, 32'hbb7aeb8e);
write_word(MEM_BASE + 74, 32'had9922bc);
write_word(MEM_BASE + 75, 32'h3617cb42);
write_word(MEM_BASE + 76, 32'h7c669b88);
write_word(MEM_BASE + 77, 32'hbe5f98ae);
write_word(MEM_BASE + 78, 32'ha7edb8b0);
write_word(MEM_BASE + 79, 32'h063bec80);
write_word(MEM_BASE + 80, 32'haf4c081f);
write_word(MEM_BASE + 81, 32'h89778d7c);
write_word(MEM_BASE + 82, 32'h7242ddae);
write_word(MEM_BASE + 83, 32'h88e8d3af);
write_word(MEM_BASE + 84, 32'hf1f80e57);
write_word(MEM_BASE + 85, 32'h5e1aab4a);
write_word(MEM_BASE + 86, 32'h5d115bc2);
write_word(MEM_BASE + 87, 32'h7636fd14);
write_word(MEM_BASE + 88, 32'hd19bc594);
write_word(MEM_BASE + 89, 32'h33f69763);
write_word(MEM_BASE + 90, 32'h5ecd870d);
write_word(MEM_BASE + 91, 32'h17e7f5b0);
write_word(MEM_BASE + 92, 32'h04dee400);
write_word(MEM_BASE + 93, 32'h1cddc34a);
write_word(MEM_BASE + 94, 32'hb6e377ee);
write_word(MEM_BASE + 95, 32'hb3fb08e9);
write_word(MEM_BASE + 96, 32'h47697076);
write_word(MEM_BASE + 97, 32'h5105d93e);
write_word(MEM_BASE + 98, 32'h4558fe3d);
write_word(MEM_BASE + 99, 32'h4fc6fe05);
write_word(MEM_BASE + 100, 32'h3aab9c6c);
write_word(MEM_BASE + 101, 32'hf032f111);
write_word(MEM_BASE + 102, 32'h6e70c2d6);
write_word(MEM_BASE + 103, 32'h5f7c8cde);
write_word(MEM_BASE + 104, 32'hb6ad63ac);
write_word(MEM_BASE + 105, 32'h4291f93d);
write_word(MEM_BASE + 106, 32'h467ebbb2);
write_word(MEM_BASE + 107, 32'h9ead265c);
write_word(MEM_BASE + 108, 32'h05ac684d);
write_word(MEM_BASE + 109, 32'h20a6bef0);
write_word(MEM_BASE + 110, 32'h9b71830f);
write_word(MEM_BASE + 111, 32'h717e08bc);
write_word(MEM_BASE + 112, 32'hb4f9d377);
write_word(MEM_BASE + 113, 32'h3bec928f);
write_word(MEM_BASE + 114, 32'h66eeb64d);
write_word(MEM_BASE + 115, 32'hc451e958);
write_word(MEM_BASE + 116, 32'he357ebbf);
write_word(MEM_BASE + 117, 32'hef5a342d);
write_word(MEM_BASE + 118, 32'hf28707ac);
write_word(MEM_BASE + 119, 32'h4b8e3e8c);
write_word(MEM_BASE + 120, 32'h854e8d69);
write_word(MEM_BASE + 121, 32'h1cb92e87);
write_word(MEM_BASE + 122, 32'hc0d57558);
write_word(MEM_BASE + 123, 32'he44cd754);
write_word(MEM_BASE + 124, 32'h424865c2);
write_word(MEM_BASE + 125, 32'h29c9e1ab);
write_word(MEM_BASE + 126, 32'hb28e003b);
write_word(MEM_BASE + 127, 32'h6819400b);
// Write magic words to A.
write_word(ADDR_A0, 32'haea19443);
write_word(ADDR_A1, 32'hd7f8ad7d);
$display("* Contents of memory and dut before unwrap processing:");
dump_mem(65);
// Start unwrapping and wait for unwrap to complete.
$display("* Trying to start processing.");
write_word(ADDR_CTRL, 32'h00000002);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Processing should be done.");
$display("Contents of memory and dut after unwrap processing:");
dump_mem(65);
dump_dut_state();
// Read and display the A registers.
read_word(ADDR_A0);
$display("A0 after unwrap: 0x%08x", read_data);
read_word(ADDR_A1);
$display("A1 after unwrap: 0x%08x", read_data);
// Read and display the R blocks that has been processed.
for (i = 0 ; i < 128 ; i = i + 1)
begin
read_word(MEM_BASE + i);
$display("mem[0x%08x] = 0x%08x", i, read_data);
end
// Read and check the A registers.
read_word(ADDR_A0);
if (read_data != 32'ha65959a6)
begin
$display("Error A0 after wrap: 0x%08x, expected 0xa65959a6", read_data);
err = 1;
end
read_word(ADDR_A1);
if (read_data != 32'h00000200)
begin
$display("Error A1 after wrap: 0x%08x, expected 0x00000200", read_data);
err = 1;
end
if (err)
begin
$display("kwp_ad_128_2 completed with errors.");
error_ctr = error_ctr + 1;
end
else
$display("kwp_ad_128_2 completed successfully.");
$display("** TC kwp_ad_128_2 END.\n");
end
endtask // test_kwp_ad_128_2
//----------------------------------------------------------------
// test_big_wrap_256
// Implements wrap test with a huge (16 kB+) data object
// and 256 bit key.
//----------------------------------------------------------------
task test_big_wrap_256;
begin : test_big_wrap_256
integer i;
integer err;
err = 0;
tc_ctr = tc_ctr + 1;
$display("** TC test_big_wrap_256 START.");
// Write key and keylength, we also want to encrypt/wrap.
write_word(ADDR_KEY0, 32'h55aa55aa);
write_word(ADDR_KEY1, 32'h55aa55aa);
write_word(ADDR_KEY2, 32'h55aa55aa);
write_word(ADDR_KEY3, 32'h55aa55aa);
write_word(ADDR_KEY4, 32'h55aa55aa);
write_word(ADDR_KEY5, 32'h55aa55aa);
write_word(ADDR_KEY6, 32'h55aa55aa);
write_word(ADDR_KEY7, 32'h55aa55aa);
write_word(ADDR_CONFIG, 32'h00000003);
// Initialize the AES engine (to expand the key).
// Wait for init to complete.
// Note, not actually needed to wait. We can write R data during init.
$display("* Trying to initialize.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Init should be done.");
// Set the length or R in blocks.
// Write the R bank to be written to.
// Write the R blocks to be processed.
write_word(ADDR_RLEN, 32'h000007f8);
// Write the data to be wrapped.
for (i = 0 ; i < 4080 ; i = i + 1)
write_word(MEM_BASE + i, 32'h01010101);
// Write magic words to A.
write_word(ADDR_A0, 32'ha65959a6);
write_word(ADDR_A1, 32'h00003fc0);
// Start wrapping and wait for wrap to complete.
$display("* Trying to start processing.");
write_word(ADDR_CTRL, 32'h00000002);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Processing should be done.");
// Read and check the A registers.
read_word(ADDR_A0);
if (read_data != 32'h53179eb9)
begin
$display("Error A0 after wrap: 0x%08x, expected 0x53179eb9", read_data);
err = 1;
end
read_word(ADDR_A1);
if (read_data != 32'ha90ce632)
begin
$display("Error A1 after wrap: 0x%08x, expected 0xa90ce632", read_data);
err = 1;
end
if (err)
begin
$display("test_big_wrap_256 completed with errors.");
error_ctr = error_ctr + 1;
end
else
$display("test_big_wrap_256 completed successfully.");
$display("** TC test_big_wrap_256 END.\n");
end
endtask // test_big_wrap_256
//----------------------------------------------------------------
// test_zeroise1
// Test the auto_zeroise functionality. We test that:
// 1. We can init a key and have it be auto zeroised.
//----------------------------------------------------------------
task test_zeroise1;
begin : test_zeroise1
$display("** TC test_zeroise1 START.");
$display("** Test of auto zeroise.");
tc_ctr = tc_ctr + 1;
// Write key and keylength, we also want to encrypt/wrap.
write_word(ADDR_KEY0, 32'h55aa55aa);
write_word(ADDR_KEY1, 32'h55aa55aa);
write_word(ADDR_KEY2, 32'h55aa55aa);
write_word(ADDR_KEY3, 32'h55aa55aa);
write_word(ADDR_KEY4, 32'h55aa55aa);
write_word(ADDR_KEY5, 32'h55aa55aa);
write_word(ADDR_KEY6, 32'h55aa55aa);
write_word(ADDR_KEY7, 32'h55aa55aa);
write_word(ADDR_CONFIG, 32'h00000003);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
// Set the key timeout to 0xdeadbeef cycles.
write_word(ADDR_TIMEOUT, 32'hdeadbeef);
read_word(ADDR_TIMEOUT);
if (read_data != 32'hdeadbeef)
begin
error_ctr = error_ctr + 1;
$display("Error. Timeout value = 0x%04x, expected 0xdeadbeef", read_data);
end
// Display contents in key expansion register 2.
$display("Contents in key_mem[2] before init: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
// Initialize the AES engine (to expand the key).
// Wait for init to complete.
$display("* Initializing.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Init done.");
// Display contents in key expansion register 2 again.
$display("Contents in key_mem[2] after init: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
// Check if key is loaded, according to the loaded flag.
read_word(ADDR_STATUS);
$display("Status register: 0b%032b", read_data);
// Display the timeout counter a few times.
$display("Status of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Status of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Status timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Status of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
$display("Contents of the API key registers:");
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[0], dut.key_reg[1], dut.key_reg[2], dut.key_reg[3]);
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[4], dut.key_reg[5], dut.key_reg[6], dut.key_reg[7]);
// Display contents in one of the key expansion registers
$display("Contents in key_mem[2]: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
// Set the key timeout to 16 cycles.
// Read status to perform ping.
$display("Setting the timeout to 0x10 cycles and checking status.");
write_word(ADDR_TIMEOUT, 32'h00000010);
read_word(ADDR_STATUS);
#(CLK_PERIOD);
read_word(ADDR_STATUS);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
$display("Waiting 0x40 cycles.");
#(64 * CLK_PERIOD);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
$display("Status of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
// Display contents in key expansion register 2 again.
$display("Contents in key_mem[2] after timeout: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
$display("Contents of the API key registers:");
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[0], dut.key_reg[1], dut.key_reg[2], dut.key_reg[3]);
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[4], dut.key_reg[5], dut.key_reg[6], dut.key_reg[7]);
if (dut.core.aes.keymem.key_mem[2] != 128'h62636363626363636263636362636363)
begin
error_ctr = error_ctr + 1;
$display("Error. Contents in key_mem[2]: 0x%016x, expected 0x62636363626363636263636362636363",
dut.core.aes.keymem.key_mem[2]);
end
$display("** TC test_zeroise1 END.\n");
end
endtask // test_zeroise1
//----------------------------------------------------------------
// test_zeroise2
// Test the auto_zeroise functionality. We test that:
// 2. We can init a key and keep it alive.
//----------------------------------------------------------------
task test_zeroise2;
begin : test_zeroise2
integer i;
integer err;
err = 0;
$display("** TC test_zeroise2 START.");
$display("** Test of key keep alive..");
tc_ctr = tc_ctr + 1;
// Write key and keylength, we also want to encrypt/wrap.
write_word(ADDR_KEY0, 32'haa55aa55);
write_word(ADDR_KEY1, 32'haa55aa55);
write_word(ADDR_KEY2, 32'haa55aa55);
write_word(ADDR_KEY3, 32'haa55aa55);
write_word(ADDR_KEY4, 32'haa55aa55);
write_word(ADDR_KEY5, 32'haa55aa55);
write_word(ADDR_KEY6, 32'haa55aa55);
write_word(ADDR_KEY7, 32'haa55aa55);
write_word(ADDR_CONFIG, 32'h00000003);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
// Initialize the AES engine (to expand the key).
// Wait for init to complete.
// Note, not actually needed to wait. We can write R data during init.
$display("* Initializing.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Init done.");
// Display contents in key expansion register 2 again.
$display("Contents of the key_mem[2] after init: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
// Check if key is loaded, according to the loaded flag.
read_word(ADDR_STATUS);
$display("Status register: 0b%032b", read_data);
// Set the key timeout to 256 cycles.
$display("Setting timout to 16 cycles and then we keep it alive.");
write_word(ADDR_TIMEOUT, 32'h00000010);
// Display the timeout counter a few times.
// And then read status. Which should trigger reset of timout.
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
// Display the timeout counter a few times.
// And then read status. Which should trigger reset of timout.
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
$display("Contents of the API key registers:");
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[0], dut.key_reg[1], dut.key_reg[2], dut.key_reg[3]);
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[4], dut.key_reg[5], dut.key_reg[6], dut.key_reg[7]);
$display("Contents of the key_mem[2]: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
// Display the timeout counter a few times.
// And then read status. Which should trigger reset of timout.
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(2 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
$display("We now allow the timer to expire");
#(40 * CLK_PERIOD);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
$display("Contents of the API key registers:");
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[0], dut.key_reg[1], dut.key_reg[2], dut.key_reg[3]);
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[4], dut.key_reg[5], dut.key_reg[6], dut.key_reg[7]);
$display("Contents of the key_mem[2]: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
if (dut.core.aes.keymem.key_mem[2] != 128'h62636363626363636263636362636363)
begin
error_ctr = error_ctr + 1;
$display("Error. Contents in key_mem[2]: 0x%016x, expected 0x62636363626363636263636362636363",
dut.core.aes.keymem.key_mem[2]);
end
$display("** TC test_zeroise2 END.\n");
end
endtask // test_zeroise2
//----------------------------------------------------------------
// test_zeroise3
// Test the auto_zeroise functionality. We test that:
// 3. We can init a key and the force zeroisation.
//----------------------------------------------------------------
task test_zeroise3;
begin : test_zeroise3
integer i;
integer err;
err = 0;
$display("** TC test_zeroise3 START.");
$display("** Test of forceed zeroisation.");
tc_ctr = tc_ctr + 1;
// Write key and keylength, we also want to encrypt/wrap.
write_word(ADDR_KEY0, 32'h13371337);
write_word(ADDR_KEY1, 32'h13371337);
write_word(ADDR_KEY2, 32'h13371337);
write_word(ADDR_KEY3, 32'h13371337);
write_word(ADDR_KEY4, 32'h13371337);
write_word(ADDR_KEY5, 32'h13371337);
write_word(ADDR_KEY6, 32'h13371337);
write_word(ADDR_KEY7, 32'h13371337);
write_word(ADDR_CONFIG, 32'h13371337);
// Initialize the AES engine (to expand the key).
// Wait for init to complete.
$display("* Initializing.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
wait_ready();
$display("* Init done.");
// Check if key is loaded, according to the loaded flag.
read_word(ADDR_STATUS);
$display("Status register: 0b%032b", read_data);
$display("Contents of the API key registers:");
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[0], dut.key_reg[1], dut.key_reg[2], dut.key_reg[3]);
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[4], dut.key_reg[5], dut.key_reg[6], dut.key_reg[7]);
// Display contents in key expansion register 2.
$display("Contents of the key_mem[2] after init: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
#(40 * CLK_PERIOD);
$display("Contents of timeout counter: 0x%04x",
dut.core.key_timeout_ctr_reg);
$display("* Trigger zeroisation.");
write_word(ADDR_CTRL, 32'h00000004);
#(40 * CLK_PERIOD);
read_word(ADDR_STATUS);
$display("Status register: 0x%032b", read_data);
$display("Contents of the API key registers:");
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[0], dut.key_reg[1], dut.key_reg[2], dut.key_reg[3]);
$display("0x%04x 0x%04x 0x%04x 0x%04x",
dut.key_reg[4], dut.key_reg[5], dut.key_reg[6], dut.key_reg[7]);
// Display contents in key expansion register 2.
$display("Contents of the key_mem[2] after zeroisation: 0x%016x",
dut.core.aes.keymem.key_mem[2]);
if (dut.core.aes.keymem.key_mem[2] != 128'h62636363626363636263636362636363)
begin
error_ctr = error_ctr + 1;
$display("Error. Contents in key_mem[2]: 0x%016x, expected 0x62636363626363636263636362636363",
dut.core.aes.keymem.key_mem[2]);
end
$display("** TC test_zerois3 END.\n");
end
endtask // test_zeroise3
//----------------------------------------------------------------
// main
//----------------------------------------------------------------
initial
begin : main
$display(" -= Testbench for Keywrap started =-");
$display(" ==================================");
$display("");
$display("Address bits: %d", ADDR_BITS);
$display("MEM_BASE: 0x%08x", MEM_BASE);
$display("");
init_sim();
dump_dut_state();
reset_dut();
dump_dut_state();
test_core_access();
test_kwp_ae_128_1();
test_kwp_ad_128_1();
test_kwp_ae_128_2();
test_kwp_ad_128_2();
test_big_wrap_256();
reset_dut();
test_zeroise1();
test_zeroise2();
test_zeroise3();
display_test_results();
$display("");
$display(" -= Testbench for Keywrap completed =-");
$display(" ====================================");
$finish;
end // main
endmodule // tb_keywrap
//======================================================================
// EOF tb_keywrap.v
//======================================================================