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AgeCommit message (Collapse)Author
2017-09-09Start hacking for systolic modexp.Rob Austein
Work in progress. Probably won't even compile, much less run. Requires corresponding new core/math/modexpa7 core. No support (yet) for ASN.1 encoding of speedup factors or storage of same in keystore. No support (yet) for running CRT algorithm in parallel cores. Minor cleanup of ancient bus I/O code, including EIM and I2C bus code we'll probably never use again.
2015-12-23RPC interface to TRNG and (incomplete) PIN code.Rob Austein
2015-10-04Disallow NULL core argument in lowest-level HAL I/O routines.Rob Austein
2015-10-04Whack libhal API to use current configure_core_selector mechanism.Rob Austein
Compiles, not yet tested.
2015-10-04off_t => hal_addr_t.Rob Austein
2015-09-06Add ECPoint I/O functions. ASN.1 cleanup.Rob Austein
2015-06-21libcryptech -> libhal, doh.Rob Austein
2015-06-04Disable HMAC-SHA-384 tests as neither my implementation nor PyCryptoRob Austein
passes them. Add missing copyright notices, other trivial cleanup (whitespace, etc).
2015-05-21Copy Joachim's EIM timeout change, make timeout configurable atRob Austein
compile time. Detect not-multiple-of-four-byte errors before they trigger an infinite loop. Remove printfs() that don't belong in library code, along with an unnecessary malloc(). Other minor cleanup.
2015-05-20Add csprng and hash modules. Add real error codes instead of magicRob Austein
numbers, and propegate error codes up from lower layers. Whack C++-isms, add parenthesese to a lot of macro expressions for evaluation safety, other minor cleanup.
2015-05-19Import FPGA I/O code from core/platform/novena/sw, add minimalRob Austein
autoconf, whack with a club until it builds.